1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck %s
4 declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0);
6 ; In RegCall calling convention, ESI and EDI are callee saved registers.
7 ; One might think that the caller could assume that ESI value is the same before
8 ; and after calling the callee.
9 ; However, RegCall also says that a register that was used for
10 ; passing/returning arguments, can be assumed to be modified by the callee.
11 ; In other words, it is no longer a callee saved register.
12 ; In this case we want to see that EDX/ECX values are saved and EDI/ESI are assumed
13 ; to be modified by the callee.
14 ; This is a hipe CC function that doesn't save any register for the caller.
15 ; So we can be sure that there is no other reason to save EDX/ECX.
16 ; The caller arguments are expected to be passed (in the following order)
17 ; in registers: ESI, EBP, EAX, EDX and ECX.
18 define cc 11 i32 @caller(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind {
19 ; CHECK-LABEL: caller:
21 ; CHECK-NEXT: subl $12, %esp
22 ; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
23 ; CHECK-NEXT: movl %edx, %ebx
24 ; CHECK-NEXT: movl %eax, %edx
25 ; CHECK-NEXT: movl %esi, %eax
26 ; CHECK-NEXT: movl %ebp, %ecx
27 ; CHECK-NEXT: movl %ebx, %edi
28 ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
29 ; CHECK-NEXT: movl %ebp, %esi
30 ; CHECK-NEXT: calll callee@PLT
31 ; CHECK-NEXT: addl %ebp, %ebx
32 ; CHECK-NEXT: addl %eax, %ebx
33 ; CHECK-NEXT: movl %ebx, %esi
34 ; CHECK-NEXT: addl $12, %esp
36 %b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)
37 %b2 = add i32 %b1, %d0
38 %b3 = add i32 %b2, %e0
41 !hipe.literals = !{ !0, !1, !2 }
42 !0 = !{ !"P_NSP_LIMIT", i32 120 }
43 !1 = !{ !"X86_LEAF_WORDS", i32 24 }
44 !2 = !{ !"AMD64_LEAF_WORDS", i32 18 }
46 ; Make sure that the callee doesn't save parameters that were passed as arguments.
47 ; The caller arguments are expected to be passed (in the following order)
48 ; in registers: EAX, ECX, EDX, EDI and ESI.
49 ; The result will return in EAX, ECX and EDX.
50 define x86_regcallcc {i32, i32, i32} @test_callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind {
51 ; CHECK-LABEL: test_callee:
53 ; CHECK-NEXT: leal (,%esi,8), %ecx
54 ; CHECK-NEXT: subl %esi, %ecx
55 ; CHECK-NEXT: movl $5, %eax
56 ; CHECK-NEXT: xorl %edx, %edx
57 ; CHECK-NEXT: divl %esi
58 ; CHECK-NEXT: movl %eax, %esi
59 ; CHECK-NEXT: leal (,%edi,8), %edx
60 ; CHECK-NEXT: subl %edi, %edx
61 ; CHECK-NEXT: movl %ecx, %eax
62 ; CHECK-NEXT: movl %esi, %ecx
67 %b4 = insertvalue {i32, i32, i32} undef, i32 %b1, 0
68 %b5 = insertvalue {i32, i32, i32} %b4, i32 %b2, 1
69 %b6 = insertvalue {i32, i32, i32} %b5, i32 %b3, 2
70 ret {i32, i32, i32} %b6