1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --default-march x86_64-unknown-linux-gnu --version 5
2 ; RUN: llc -mattr=+sse2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=SSE
3 ; RUN: llc -mattr=+avx -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX1
4 ; RUN: llc -mattr=+avx2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX2
5 ; RUN: llc -mattr=+avx512f -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512F
6 ; RUN: llc -mattr=+avx512bw -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512BW
8 define void @v_test_canonicalize__half(half addrspace(1)* %out) nounwind {
9 ; SSE-LABEL: v_test_canonicalize__half:
10 ; SSE: # %bb.0: # %entry
11 ; SSE-NEXT: pushq %rbx
12 ; SSE-NEXT: subq $16, %rsp
13 ; SSE-NEXT: movq %rdi, %rbx
14 ; SSE-NEXT: pinsrw $0, (%rdi), %xmm0
15 ; SSE-NEXT: callq __extendhfsf2@PLT
16 ; SSE-NEXT: movd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
17 ; SSE-NEXT: pinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
18 ; SSE-NEXT: callq __extendhfsf2@PLT
19 ; SSE-NEXT: mulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
20 ; SSE-NEXT: callq __truncsfhf2@PLT
21 ; SSE-NEXT: pextrw $0, %xmm0, %eax
22 ; SSE-NEXT: movw %ax, (%rbx)
23 ; SSE-NEXT: addq $16, %rsp
27 ; AVX-LABEL: v_test_canonicalize__half:
28 ; AVX: # %bb.0: # %entry
29 ; AVX-NEXT: pushq %rbx
30 ; AVX-NEXT: subq $16, %rsp
31 ; AVX-NEXT: movq %rdi, %rbx
32 ; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
33 ; AVX-NEXT: callq __extendhfsf2@PLT
34 ; AVX-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
35 ; AVX-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
36 ; AVX-NEXT: callq __extendhfsf2@PLT
37 ; AVX-NEXT: vmulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload
38 ; AVX-NEXT: callq __truncsfhf2@PLT
39 ; AVX-NEXT: vpextrw $0, %xmm0, (%rbx)
40 ; AVX-NEXT: addq $16, %rsp
44 ; AVX512-LABEL: v_test_canonicalize__half:
45 ; AVX512: # %bb.0: # %entry
46 ; AVX512-NEXT: movzwl (%rdi), %eax
47 ; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx
48 ; AVX512-NEXT: vmovd %ecx, %xmm0
49 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
50 ; AVX512-NEXT: vmovd %eax, %xmm1
51 ; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
52 ; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0
53 ; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
54 ; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
55 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
56 ; AVX512-NEXT: vmovd %xmm0, %eax
57 ; AVX512-NEXT: movw %ax, (%rdi)
60 %val = load half, half addrspace(1)* %out
61 %canonicalized = call half @llvm.canonicalize.f16(half %val)
62 store half %canonicalized, half addrspace(1)* %out
66 define half @complex_canonicalize_fmul_half(half %a, half %b) nounwind {
67 ; SSE-LABEL: complex_canonicalize_fmul_half:
68 ; SSE: # %bb.0: # %entry
69 ; SSE-NEXT: pushq %rax
70 ; SSE-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
71 ; SSE-NEXT: callq __extendhfsf2@PLT
72 ; SSE-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
73 ; SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
74 ; SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
75 ; SSE-NEXT: callq __extendhfsf2@PLT
76 ; SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
77 ; SSE-NEXT: movss (%rsp), %xmm1 # 4-byte Reload
78 ; SSE-NEXT: # xmm1 = mem[0],zero,zero,zero
79 ; SSE-NEXT: subss %xmm0, %xmm1
80 ; SSE-NEXT: movaps %xmm1, %xmm0
81 ; SSE-NEXT: callq __truncsfhf2@PLT
82 ; SSE-NEXT: callq __extendhfsf2@PLT
83 ; SSE-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
84 ; SSE-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
85 ; SSE-NEXT: callq __truncsfhf2@PLT
86 ; SSE-NEXT: callq __extendhfsf2@PLT
87 ; SSE-NEXT: subss (%rsp), %xmm0 # 4-byte Folded Reload
88 ; SSE-NEXT: callq __truncsfhf2@PLT
89 ; SSE-NEXT: callq __extendhfsf2@PLT
90 ; SSE-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
91 ; SSE-NEXT: pinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
92 ; SSE-NEXT: callq __extendhfsf2@PLT
93 ; SSE-NEXT: mulss (%rsp), %xmm0 # 4-byte Folded Reload
94 ; SSE-NEXT: callq __truncsfhf2@PLT
95 ; SSE-NEXT: callq __extendhfsf2@PLT
96 ; SSE-NEXT: subss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
97 ; SSE-NEXT: callq __truncsfhf2@PLT
101 ; AVX-LABEL: complex_canonicalize_fmul_half:
102 ; AVX: # %bb.0: # %entry
103 ; AVX-NEXT: pushq %rax
104 ; AVX-NEXT: vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
105 ; AVX-NEXT: callq __extendhfsf2@PLT
106 ; AVX-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
107 ; AVX-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
108 ; AVX-NEXT: # xmm0 = mem[0],zero,zero,zero
109 ; AVX-NEXT: callq __extendhfsf2@PLT
110 ; AVX-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
111 ; AVX-NEXT: vmovss (%rsp), %xmm1 # 4-byte Reload
112 ; AVX-NEXT: # xmm1 = mem[0],zero,zero,zero
113 ; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0
114 ; AVX-NEXT: callq __truncsfhf2@PLT
115 ; AVX-NEXT: callq __extendhfsf2@PLT
116 ; AVX-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
117 ; AVX-NEXT: vaddss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload
118 ; AVX-NEXT: callq __truncsfhf2@PLT
119 ; AVX-NEXT: callq __extendhfsf2@PLT
120 ; AVX-NEXT: vsubss (%rsp), %xmm0, %xmm0 # 4-byte Folded Reload
121 ; AVX-NEXT: callq __truncsfhf2@PLT
122 ; AVX-NEXT: callq __extendhfsf2@PLT
123 ; AVX-NEXT: vmovss %xmm0, (%rsp) # 4-byte Spill
124 ; AVX-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
125 ; AVX-NEXT: callq __extendhfsf2@PLT
126 ; AVX-NEXT: vmulss (%rsp), %xmm0, %xmm0 # 4-byte Folded Reload
127 ; AVX-NEXT: callq __truncsfhf2@PLT
128 ; AVX-NEXT: callq __extendhfsf2@PLT
129 ; AVX-NEXT: vsubss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload
130 ; AVX-NEXT: callq __truncsfhf2@PLT
131 ; AVX-NEXT: popq %rax
134 ; AVX512-LABEL: complex_canonicalize_fmul_half:
135 ; AVX512: # %bb.0: # %entry
136 ; AVX512-NEXT: vpextrw $0, %xmm1, %eax
137 ; AVX512-NEXT: vpextrw $0, %xmm0, %ecx
138 ; AVX512-NEXT: vmovd %ecx, %xmm0
139 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
140 ; AVX512-NEXT: vmovd %eax, %xmm1
141 ; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
142 ; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0
143 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
144 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
145 ; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm2
146 ; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
147 ; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
148 ; AVX512-NEXT: vsubss %xmm0, %xmm2, %xmm0
149 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
150 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
151 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
152 ; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
153 ; AVX512-NEXT: vmovd %eax, %xmm2
154 ; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
155 ; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0
156 ; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2
157 ; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
158 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
159 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
160 ; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0
161 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
162 ; AVX512-NEXT: vmovd %xmm0, %eax
163 ; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
167 %mul1 = fsub half %a, %b
168 %add = fadd half %mul1, %b
169 %mul2 = fsub half %add, %mul1
170 %canonicalized = call half @llvm.canonicalize.f16(half %mul2)
171 %result = fsub half %canonicalized, %b
175 define void @v_test_canonicalize_v2half(<2 x half> addrspace(1)* %out) nounwind {
176 ; SSE-LABEL: v_test_canonicalize_v2half:
177 ; SSE: # %bb.0: # %entry
178 ; SSE-NEXT: pushq %rbx
179 ; SSE-NEXT: subq $48, %rsp
180 ; SSE-NEXT: movq %rdi, %rbx
181 ; SSE-NEXT: pinsrw $0, 2(%rdi), %xmm0
182 ; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
183 ; SSE-NEXT: pinsrw $0, (%rdi), %xmm0
184 ; SSE-NEXT: callq __extendhfsf2@PLT
185 ; SSE-NEXT: movd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
186 ; SSE-NEXT: pinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
187 ; SSE-NEXT: callq __extendhfsf2@PLT
188 ; SSE-NEXT: movd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
189 ; SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 4-byte Reload
190 ; SSE-NEXT: # xmm1 = mem[0],zero,zero,zero
191 ; SSE-NEXT: mulss %xmm0, %xmm1
192 ; SSE-NEXT: movaps %xmm1, %xmm0
193 ; SSE-NEXT: callq __truncsfhf2@PLT
194 ; SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
195 ; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
196 ; SSE-NEXT: callq __extendhfsf2@PLT
197 ; SSE-NEXT: mulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
198 ; SSE-NEXT: callq __truncsfhf2@PLT
199 ; SSE-NEXT: pextrw $0, %xmm0, %eax
200 ; SSE-NEXT: movw %ax, 2(%rbx)
201 ; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
202 ; SSE-NEXT: pextrw $0, %xmm0, %eax
203 ; SSE-NEXT: movw %ax, (%rbx)
204 ; SSE-NEXT: addq $48, %rsp
205 ; SSE-NEXT: popq %rbx
208 ; AVX-LABEL: v_test_canonicalize_v2half:
209 ; AVX: # %bb.0: # %entry
210 ; AVX-NEXT: pushq %rbx
211 ; AVX-NEXT: subq $48, %rsp
212 ; AVX-NEXT: movq %rdi, %rbx
213 ; AVX-NEXT: vpinsrw $0, 2(%rdi), %xmm0, %xmm0
214 ; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
215 ; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
216 ; AVX-NEXT: callq __extendhfsf2@PLT
217 ; AVX-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
218 ; AVX-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
219 ; AVX-NEXT: callq __extendhfsf2@PLT
220 ; AVX-NEXT: vmovd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
221 ; AVX-NEXT: vmulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload
222 ; AVX-NEXT: callq __truncsfhf2@PLT
223 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
224 ; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
225 ; AVX-NEXT: callq __extendhfsf2@PLT
226 ; AVX-NEXT: vmulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload
227 ; AVX-NEXT: callq __truncsfhf2@PLT
228 ; AVX-NEXT: vpextrw $0, %xmm0, 2(%rbx)
229 ; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
230 ; AVX-NEXT: vpextrw $0, %xmm0, (%rbx)
231 ; AVX-NEXT: addq $48, %rsp
232 ; AVX-NEXT: popq %rbx
235 ; AVX512-LABEL: v_test_canonicalize_v2half:
236 ; AVX512: # %bb.0: # %entry
237 ; AVX512-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
238 ; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
239 ; AVX512-NEXT: vmovd %eax, %xmm1
240 ; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
241 ; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
242 ; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
243 ; AVX512-NEXT: vmulss %xmm1, %xmm2, %xmm2
244 ; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
245 ; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
246 ; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
247 ; AVX512-NEXT: vmovd %xmm2, %eax
248 ; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm2
249 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
250 ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
251 ; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
252 ; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
253 ; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
254 ; AVX512-NEXT: vmovd %xmm0, %eax
255 ; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
256 ; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
257 ; AVX512-NEXT: vmovd %xmm0, (%rdi)
260 %val = load <2 x half>, <2 x half> addrspace(1)* %out
261 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %val)
262 store <2 x half> %canonicalized, <2 x half> addrspace(1)* %out
266 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: