1 # RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=btver2 -run-pass=post-RA-sched -o - %s | FileCheck %s
2 # RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=btver2 -run-pass=post-RA-sched -o - %s -experimental-debug-variable-locations| FileCheck %s
4 # Test that multiple DBG_VALUE's and DBG_PHIs following an instruction whose
5 # register needs # to be changed during the post-RA scheduler pass are updated
8 # Test case was derived from the output from the following command and
9 # the source code below. DBG_PHIs added manually later:
11 # clang -S -emit-llvm -target x86_64 -march=btver2 -O2 -g -o - <srcfile> |
12 # llc -stop-before=post-RA-sched -o -
14 # Source code reduced from the original 8MB source file:
20 # unsigned *d() { return (unsigned *)c; }
24 # template <typename f> f *g(f *h, f *i) {
25 # long j = long(i), k = -!h;
26 # return reinterpret_cast<f *>(long(h) | k & j);
47 # s(int h) : l(h), ab(t), ac(~0 << h) { ae(); }
52 # const unsigned u = 0;
54 # const unsigned *x = g(v, &u);
57 # int z = (ab.aa() - 1) / e;
85 # static unsigned am(ai);
87 # template <int> struct an : al { static aj ao; };
88 # template <> aj an<0>::ao(am);
92 %class.s = type <{ %class.l, [4 x i8], %class.p, ptr, i32, [4 x i8] }>
93 %class.l = type { i32 }
94 %class.p = type { %class.b }
95 %class.b = type { ptr, ptr }
96 %struct.a = type opaque
98 @n = local_unnamed_addr global ptr null, align 8
99 @o = global i32 0, align 4
101 define linkonce_odr void @_ZN1sC2Ei(ptr, i32) unnamed_addr #0 align 2 !dbg !4 {
102 %3 = alloca i32, align 4
103 %4 = bitcast ptr %0 to ptr
104 tail call void @_ZN1lC2Ei(ptr %4, i32 %1)
105 %5 = getelementptr inbounds %class.s, ptr %0, i64 0, i32 2
106 tail call void @llvm.dbg.value(metadata ptr %5, i64 0, metadata !10, metadata !17), !dbg !18
107 tail call void @llvm.dbg.value(metadata ptr %5, i64 0, metadata !20, metadata !17), !dbg !27
108 %6 = getelementptr inbounds %class.s, ptr %0, i64 0, i32 2, i32 0, i32 1
109 %7 = bitcast ptr %6 to ptr
110 %8 = load i64, ptr %7, align 8
111 %9 = bitcast ptr %5 to ptr
112 store i64 %8, ptr %9, align 8
113 %10 = getelementptr inbounds %class.s, ptr %0, i64 0, i32 3
114 store ptr %5, ptr %10, align 8
115 %11 = getelementptr inbounds %class.s, ptr %0, i64 0, i32 4
117 store i32 %12, ptr %11, align 8
118 store i32 0, ptr %3, align 4
119 %13 = bitcast ptr %5 to ptr
120 %14 = load ptr, ptr %13, align 8
121 store ptr %14, ptr @n, align 8
122 %15 = icmp eq ptr %14, null
123 %16 = ptrtoint ptr %14 to i64
124 %17 = select i1 %15, i64 ptrtoint (ptr @o to i64), i64 0
125 %18 = or i64 %17, %16
126 tail call void @llvm.dbg.value(metadata ptr %3, i64 0, metadata !29, metadata !35), !dbg !36
127 tail call void @llvm.dbg.value(metadata ptr %3, i64 0, metadata !39, metadata !17), !dbg !44
128 %19 = ptrtoint ptr %3 to i64
129 call void @llvm.dbg.value(metadata i64 %19, i64 0, metadata !46, metadata !17), !dbg !48
130 %20 = icmp eq i64 %18, 0
131 %21 = select i1 %20, i64 %19, i64 0
132 %22 = or i64 %21, %18
133 %23 = inttoptr i64 %22 to ptr
134 %24 = bitcast ptr %0 to ptr
135 %25 = load i32, ptr %24, align 8
136 %26 = sext i32 %25 to i64
137 %27 = getelementptr inbounds i32, ptr %23, i64 %26
138 %28 = load i32, ptr %27, align 4
139 %29 = and i32 %12, %28
140 %30 = icmp eq i32 %29, 0
141 br i1 %30, label %47, label %31
143 ; <label>:31: ; preds = %2
144 %32 = bitcast ptr %0 to ptr
145 %33 = call i32 @_ZN1p2aaEv(ptr %5)
146 %34 = add nsw i32 %33, -1
147 %35 = sdiv i32 %34, 2
148 %36 = load i32, ptr %32, align 8
149 %37 = icmp sgt i32 %36, %35
150 br i1 %37, label %38, label %47
152 ; <label>:38: ; preds = %31
155 ; <label>:39: ; preds = %39, %38
156 %40 = bitcast ptr %0 to ptr
157 %sunkaddr = ptrtoint ptr %0 to i64
158 %sunkaddr1 = add i64 %sunkaddr, 24
159 %sunkaddr2 = inttoptr i64 %sunkaddr1 to ptr
160 %41 = load ptr, ptr %sunkaddr2, align 8
161 %42 = call i32 @_ZN1p2aaEv(ptr %41)
162 %43 = add nsw i32 %42, -1
163 %44 = sdiv i32 %43, 2
164 %45 = load i32, ptr %40, align 8
165 %46 = icmp sgt i32 %45, %44
166 br i1 %46, label %39, label %47
168 ; <label>:47: ; preds = %39, %31, %2
172 declare void @_ZN1lC2Ei(ptr, i32) unnamed_addr #1
174 declare i32 @_ZN1p2aaEv(ptr) local_unnamed_addr #1
176 ; Function Attrs: nounwind readnone
177 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
180 !llvm.module.flags = !{!2, !3}
182 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
183 !1 = !DIFile(filename: "test.cpp", directory: "")
184 !2 = !{i32 2, !"Dwarf Version", i32 4}
185 !3 = !{i32 2, !"Debug Info Version", i32 3}
186 !4 = distinct !DISubprogram(name: "s", linkageName: "_ZN1sC2Ei", scope: !5, file: !1, line: 32, type: !6, isLocal: false, isDefinition: true, scopeLine: 32, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
187 !5 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "s", file: !1, line: 29, size: 320, identifier: "_ZTS1s")
188 !6 = !DISubroutineType(types: !7)
190 !8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !5, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
191 !9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
192 !10 = !DILocalVariable(name: "this", arg: 1, scope: !11, type: !16, flags: DIFlagArtificial | DIFlagObjectPointer)
193 !11 = distinct !DISubprogram(name: "p", linkageName: "_ZN1pC2Ev", scope: !12, file: !1, line: 20, type: !13, isLocal: false, isDefinition: true, scopeLine: 20, flags: DIFlagArtificial | DIFlagPrototyped, isOptimized: true, unit: !0)
194 !12 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "p", file: !1, line: 20, size: 128, identifier: "_ZTS1p")
195 !13 = !DISubroutineType(types: !14)
197 !15 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !12, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
198 !16 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !12, size: 64)
199 !17 = !DIExpression()
200 !18 = !DILocation(line: 0, scope: !11, inlinedAt: !19)
201 !19 = distinct !DILocation(line: 32, column: 3, scope: !4)
202 !20 = !DILocalVariable(name: "this", arg: 1, scope: !21, type: !26, flags: DIFlagArtificial | DIFlagObjectPointer)
203 !21 = distinct !DISubprogram(name: "b", linkageName: "_ZN1bC2Ev", scope: !22, file: !1, line: 2, type: !23, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagArtificial | DIFlagPrototyped, isOptimized: true, unit: !0)
204 !22 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "b", file: !1, line: 2, size: 128, identifier: "_ZTS1b")
205 !23 = !DISubroutineType(types: !24)
207 !25 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
208 !26 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64)
209 !27 = !DILocation(line: 0, scope: !21, inlinedAt: !28)
210 !28 = distinct !DILocation(line: 20, column: 7, scope: !11, inlinedAt: !19)
211 !29 = !DILocalVariable(name: "u", scope: !30, file: !1, line: 37, type: !33)
212 !30 = distinct !DISubprogram(name: "ae", linkageName: "_ZN1s2aeEv", scope: !5, file: !1, line: 35, type: !31, isLocal: false, isDefinition: true, scopeLine: 35, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
213 !31 = !DISubroutineType(types: !32)
215 !33 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !34)
216 !34 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
217 !35 = !DIExpression(DW_OP_deref)
218 !36 = !DILocation(line: 37, column: 20, scope: !30, inlinedAt: !37)
219 !37 = distinct !DILocation(line: 32, column: 41, scope: !38)
220 !38 = distinct !DILexicalBlock(scope: !4, file: !1, line: 32, column: 39)
221 !39 = !DILocalVariable(name: "i", arg: 2, scope: !40, file: !1, line: 9, type: !43)
222 !40 = distinct !DISubprogram(name: "g<const unsigned int>", linkageName: "_Z1gIKjEPT_S2_S2_", scope: !1, file: !1, line: 9, type: !41, isLocal: false, isDefinition: true, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
223 !41 = !DISubroutineType(types: !42)
224 !42 = !{!43, !43, !43}
225 !43 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !33, size: 64)
226 !44 = !DILocation(line: 9, column: 37, scope: !40, inlinedAt: !45)
227 !45 = distinct !DILocation(line: 39, column: 25, scope: !30, inlinedAt: !37)
228 !46 = !DILocalVariable(name: "j", scope: !40, file: !1, line: 10, type: !47)
229 !47 = !DIBasicType(name: "long int", size: 64, encoding: DW_ATE_signed)
230 !48 = !DILocation(line: 10, column: 8, scope: !40, inlinedAt: !45)
232 # CHECK: ![[I_VAR:[0-9]+]] = !DILocalVariable(name: "i", {{.*}}line: 9, {{.*}})
233 # CHECK: ![[I_LOC:[0-9]+]] = !DILocation(line: 9, column: 37, {{.*}})
234 # CHECK: ![[J_VAR:[0-9]+]] = !DILocalVariable(name: "j", {{.*}}line: 10, {{.*}})
235 # CHECK: ![[J_LOC:[0-9]+]] = !DILocation(line: 10, column: 8, {{.*}})
240 tracksRegLiveness: true
245 - { id: 0, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '$rbx' }
246 - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$r14' }
247 - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 16 }
249 - { id: 0, offset: -36, size: 4, alignment: 4 }
252 successors: %bb.3, %bb.2
253 liveins: $esi, $rdi, $r14, $rbx, $rbp
255 ; CHECK: [[REGISTER:\$r[a-z0-9]+]] = LEA64r {{\$r[a-z0-9]+}}, 1, $noreg, -20, $noreg
256 ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[J_VAR]], !DIExpression(), debug-location ![[J_LOC]]
257 ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
258 ; CHECK-NEXT: DBG_PHI [[REGISTER]], 0
259 ; CHECK-NEXT: DBG_PHI [[REGISTER]], 1
261 frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
262 CFI_INSTRUCTION def_cfa_offset 16
263 CFI_INSTRUCTION offset $rbp, -16
264 $rbp = frame-setup MOV64rr $rsp
265 CFI_INSTRUCTION def_cfa_register $rbp
266 frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
267 frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
268 $rsp = frame-setup SUB64ri8 $rsp, 16, implicit-def dead $eflags
269 CFI_INSTRUCTION offset $rbx, -32
270 CFI_INSTRUCTION offset $r14, -24
273 CALL64pcrel32 @_ZN1lC2Ei, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit-def $rsp
274 $rdi = LEA64r $rbx, 1, $noreg, 8, $noreg
275 DBG_VALUE $rdi, $noreg, !20, !17, debug-location !27
276 DBG_VALUE $rdi, $noreg, !10, !17, debug-location !18
277 $rax = MOV64rm $rbx, 1, $noreg, 16, $noreg :: (load (s64))
278 MOV64mr $rbx, 1, $noreg, 8, $noreg, killed $rax :: (store (s64))
279 MOV64mr $rbx, 1, $noreg, 24, $noreg, $rdi :: (store (s64))
281 $cl = MOV8rr $r14b, implicit killed $r14d
282 $eax = SHL32rCL killed $eax, implicit-def dead $eflags, implicit $cl
283 MOV32mr $rbx, 1, $noreg, 32, $noreg, $eax :: (store (s32), align 8)
284 MOV32mi $rbp, 1, $noreg, -20, $noreg, 0 :: (store (s32))
285 $rcx = MOV64rm $rbx, 1, $noreg, 8, $noreg :: (load (s64))
286 MOV64mr $rip, 1, $noreg, @n, $noreg, $rcx :: (store (s64))
287 $edx = XOR32rr undef $edx, undef $edx, implicit-def dead $eflags, implicit-def $rdx
288 TEST64rr $rcx, $rcx, implicit-def $eflags
289 $esi = MOV32ri @o, implicit-def $rsi
290 $rsi = CMOV64rr killed $rsi, $rdx, 5, implicit killed $eflags
291 $rsi = OR64rr killed $rsi, killed $rcx, implicit-def $eflags
292 $rcx = LEA64r $rbp, 1, $noreg, -20, $noreg
293 DBG_VALUE $rcx, $noreg, !46, !17, debug-location !48
294 DBG_VALUE $rcx, $noreg, !39, !17, debug-location !44
297 DBG_VALUE $rbp, -20, !29, !17, debug-location !36
298 $rcx = CMOV64rr killed $rcx, killed $rdx, 5, implicit killed $eflags
299 $rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags
300 $rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load (s32), align 8)
301 DBG_INSTR_REF !46, !17, dbg-instr-ref(1, 0), debug-location !48
302 DBG_INSTR_REF !39, !17, dbg-instr-ref(2, 0), debug-location !44
303 TEST32mr killed $rcx, 4, killed $rdx, 0, $noreg, killed $eax, implicit-def $eflags :: (load (s32))
304 JCC_1 %bb.2, 5, implicit $eflags
311 $rdi = MOV64rm $rbx, 1, $noreg, 24, $noreg :: (load (s64))
314 successors: %bb.1, %bb.3
315 liveins: $rbx, $rbp, $rsp, $rdi
317 CALL64pcrel32 @_ZN1p2aaEv, csr_64, implicit $rsp, implicit $rdi, implicit-def $rsp, implicit-def $eax
318 $eax = KILL $eax, implicit-def $rax
319 $ecx = LEA64_32r $rax, 1, $noreg, -1, $noreg, implicit-def $rcx
320 $ecx = SHR32ri $ecx, 31, implicit-def dead $eflags, implicit killed $rcx, implicit-def $rcx
321 $eax = LEA64_32r killed $rax, 1, killed $rcx, -1, $noreg
322 $eax = SAR32r1 killed $eax, implicit-def dead $eflags
323 CMP32mr $rbx, 1, $noreg, 0, $noreg, killed $eax, implicit-def $eflags :: (load (s32), align 8), (load (s32), align 8)
324 JCC_1 %bb.1, 15, implicit killed $eflags
329 $rsp = ADD64ri8 $rsp, 16, implicit-def dead $eflags
330 $rbx = POP64r implicit-def $rsp, implicit $rsp
331 $r14 = POP64r implicit-def $rsp, implicit $rsp
332 $rbp = POP64r implicit-def $rsp, implicit $rsp