1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
3 ; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
5 define void @f(ptr %0) {
8 ; AVX2-NEXT: movzbl (%rdi), %eax
9 ; AVX2-NEXT: movl %eax, %ecx
10 ; AVX2-NEXT: shrb $2, %cl
11 ; AVX2-NEXT: andb $1, %cl
12 ; AVX2-NEXT: movl %eax, %edx
13 ; AVX2-NEXT: andb $1, %dl
14 ; AVX2-NEXT: vmovd %edx, %xmm0
15 ; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0
16 ; AVX2-NEXT: movl %eax, %ecx
17 ; AVX2-NEXT: shrb $3, %cl
18 ; AVX2-NEXT: andb $1, %cl
19 ; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0
20 ; AVX2-NEXT: movl %eax, %ecx
21 ; AVX2-NEXT: shrb $4, %cl
22 ; AVX2-NEXT: andb $1, %cl
23 ; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0
24 ; AVX2-NEXT: movl %eax, %ecx
25 ; AVX2-NEXT: shrb $5, %cl
26 ; AVX2-NEXT: andb $1, %cl
27 ; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0
28 ; AVX2-NEXT: movl %eax, %ecx
29 ; AVX2-NEXT: shrb $6, %cl
30 ; AVX2-NEXT: andb $1, %cl
31 ; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0
32 ; AVX2-NEXT: shrb $7, %al
33 ; AVX2-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
34 ; AVX2-NEXT: movl $1, %eax
35 ; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0
36 ; AVX2-NEXT: vpsllw $15, %xmm0, %xmm0
37 ; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
38 ; AVX2-NEXT: vpmovmskb %xmm0, %eax
39 ; AVX2-NEXT: movb %al, (%rdi)
44 ; AVX512-NEXT: kmovb (%rdi), %k0
45 ; AVX512-NEXT: movb $-3, %al
46 ; AVX512-NEXT: kmovd %eax, %k1
47 ; AVX512-NEXT: kandb %k1, %k0, %k0
48 ; AVX512-NEXT: movb $1, %al
49 ; AVX512-NEXT: kmovd %eax, %k1
50 ; AVX512-NEXT: kshiftlb $7, %k1, %k1
51 ; AVX512-NEXT: kshiftrb $6, %k1, %k1
52 ; AVX512-NEXT: korb %k1, %k0, %k0
53 ; AVX512-NEXT: kmovb %k0, (%rdi)
55 %2 = load <8 x i1>, ptr %0
56 %3 = insertelement <8 x i1> %2, i1 true, i32 1
57 store <8 x i1> %3, ptr %0