1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s
4 define void @PR91005(ptr %0) minsize {
5 ; CHECK-LABEL: PR91005:
7 ; CHECK-NEXT: xorl %eax, %eax
8 ; CHECK-NEXT: testb %al, %al
9 ; CHECK-NEXT: je .LBB0_2
10 ; CHECK-NEXT: # %bb.1:
11 ; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [31744,31744,31744,31744]
12 ; CHECK-NEXT: vpcmpeqw %xmm0, %xmm0, %xmm0
13 ; CHECK-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
14 ; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0
15 ; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
16 ; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
17 ; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0
18 ; CHECK-NEXT: vcvtps2ph $4, %xmm0, %xmm0
19 ; CHECK-NEXT: vmovd %xmm0, %eax
20 ; CHECK-NEXT: movw %ax, (%rdi)
21 ; CHECK-NEXT: .LBB0_2: # %common.ret
23 %2 = bitcast <2 x half> poison to <2 x i16>
24 %3 = icmp eq <2 x i16> %2, <i16 31744, i16 31744>
25 br i1 poison, label %4, label %common.ret
27 common.ret: ; preds = %4, %1
31 %5 = select <2 x i1> %3, <2 x half> <half 0xH3C00, half 0xH3C00>, <2 x half> zeroinitializer
32 %6 = fmul <2 x half> %5, zeroinitializer
33 %7 = fsub <2 x half> %6, zeroinitializer
34 %8 = extractelement <2 x half> %7, i64 0
35 store half %8, ptr %0, align 2
39 declare <2 x half> @llvm.fabs.v2f16(<2 x half>)