llvm/test/CodeGen/X86/select-of-half-constants.ll

   1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
   2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512fp16  | FileCheck %s --check-prefixes=X64-AVX512FP16
   3
   4 ; This should do a single load into the fp stack for the return, not diddle with xmm registers.
   5
   6 define half @fcmp_select_fp_constants_olt(half %x) nounwind readnone {
   7 ; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_olt:
   8 ; X64-AVX512FP16:       # %bb.0:
   9 ; X64-AVX512FP16-NEXT:    vmovsh {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
  10 ; X64-AVX512FP16-NEXT:    vcmpltsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
  11 ; X64-AVX512FP16-NEXT:    vmovsh {{.*#+}} xmm0 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
  12 ; X64-AVX512FP16-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}
  13 ; X64-AVX512FP16-NEXT:    retq
  14   %c = fcmp olt half %x, -4.0
  15   %r = select i1 %c, half 42.0, half 23.0
  16   ret half %r
  17 }
  18
  19 define half @fcmp_select_fp_constants_ogt(half %x) nounwind readnone {
  20 ; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_ogt:
  21 ; X64-AVX512FP16:       # %bb.0:
  22 ; X64-AVX512FP16-NEXT:    vmovsh {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
  23 ; X64-AVX512FP16-NEXT:    vcmpgtsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
  24 ; X64-AVX512FP16-NEXT:    vmovsh {{.*#+}} xmm0 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
  25 ; X64-AVX512FP16-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}
  26 ; X64-AVX512FP16-NEXT:    retq
  27   %c = fcmp ogt half %x, -4.0
  28   %r = select i1 %c, half 42.0, half 23.0
  29   ret half %r
  30 }
  31