1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple x86_64-linux < %s | FileCheck %s
3 ; RUN: llc -verify-machineinstrs -mtriple x86_64-windows < %s | FileCheck %s --check-prefix=WIN64
5 declare i64 @llvm.x86.flags.read.u64()
6 declare void @llvm.x86.flags.write.u64(i64)
8 define i64 @read_flags() {
9 ; CHECK-LABEL: read_flags:
10 ; CHECK: # %bb.0: # %entry
12 ; CHECK-NEXT: popq %rax
15 ; WIN64-LABEL: read_flags:
16 ; WIN64: # %bb.0: # %entry
17 ; WIN64-NEXT: pushq %rbp
18 ; WIN64-NEXT: .seh_pushreg %rbp
19 ; WIN64-NEXT: movq %rsp, %rbp
20 ; WIN64-NEXT: .seh_setframe %rbp, 0
21 ; WIN64-NEXT: .seh_endprologue
23 ; WIN64-NEXT: popq %rax
24 ; WIN64-NEXT: popq %rbp
26 ; WIN64-NEXT: .seh_endproc
28 %flags = call i64 @llvm.x86.flags.read.u64()
32 define void @write_flags(i64 %arg) {
33 ; CHECK-LABEL: write_flags:
34 ; CHECK: # %bb.0: # %entry
35 ; CHECK-NEXT: pushq %rdi
39 ; WIN64-LABEL: write_flags:
40 ; WIN64: # %bb.0: # %entry
41 ; WIN64-NEXT: pushq %rbp
42 ; WIN64-NEXT: .seh_pushreg %rbp
43 ; WIN64-NEXT: movq %rsp, %rbp
44 ; WIN64-NEXT: .seh_setframe %rbp, 0
45 ; WIN64-NEXT: .seh_endprologue
46 ; WIN64-NEXT: pushq %rcx
48 ; WIN64-NEXT: popq %rbp
50 ; WIN64-NEXT: .seh_endproc
52 call void @llvm.x86.flags.write.u64(i64 %arg)
56 define i64 @read_flags_reg_pressure() nounwind {
57 ; CHECK-LABEL: read_flags_reg_pressure:
59 ; CHECK-NEXT: pushq %rbp
60 ; CHECK-NEXT: pushq %r15
61 ; CHECK-NEXT: pushq %r14
62 ; CHECK-NEXT: pushq %r13
63 ; CHECK-NEXT: pushq %r12
64 ; CHECK-NEXT: pushq %rbx
68 ; CHECK-NEXT: popq %rbp
71 ; CHECK-NEXT: movq %rbp, %rax
72 ; CHECK-NEXT: popq %rbx
73 ; CHECK-NEXT: popq %r12
74 ; CHECK-NEXT: popq %r13
75 ; CHECK-NEXT: popq %r14
76 ; CHECK-NEXT: popq %r15
77 ; CHECK-NEXT: popq %rbp
80 ; WIN64-LABEL: read_flags_reg_pressure:
82 ; WIN64-NEXT: pushq %rbp
83 ; WIN64-NEXT: pushq %r15
84 ; WIN64-NEXT: pushq %r14
85 ; WIN64-NEXT: pushq %r13
86 ; WIN64-NEXT: pushq %r12
87 ; WIN64-NEXT: pushq %rsi
88 ; WIN64-NEXT: pushq %rdi
89 ; WIN64-NEXT: pushq %rbx
90 ; WIN64-NEXT: subq $16, %rsp
91 ; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
94 ; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
96 ; WIN64-NEXT: popq %rdx
97 ; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
98 ; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
100 ; WIN64-NEXT: #NO_APP
101 ; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
102 ; WIN64-NEXT: addq $16, %rsp
103 ; WIN64-NEXT: popq %rbx
104 ; WIN64-NEXT: popq %rdi
105 ; WIN64-NEXT: popq %rsi
106 ; WIN64-NEXT: popq %r12
107 ; WIN64-NEXT: popq %r13
108 ; WIN64-NEXT: popq %r14
109 ; WIN64-NEXT: popq %r15
110 ; WIN64-NEXT: popq %rbp
112 %1 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
113 %2 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 0
114 %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 1
115 %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 2
116 %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 3
117 %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 4
118 %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 5
119 %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 6
120 %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 7
121 %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 8
122 %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 9
123 %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 10
124 %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 11
125 %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 12
126 %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 13
127 %flags = tail call i64 @llvm.x86.flags.read.u64()
128 tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15)
132 define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
133 ; CHECK-LABEL: write_flags_reg_pressure:
135 ; CHECK-NEXT: pushq %rbp
136 ; CHECK-NEXT: pushq %r15
137 ; CHECK-NEXT: pushq %r14
138 ; CHECK-NEXT: pushq %r13
139 ; CHECK-NEXT: pushq %r12
140 ; CHECK-NEXT: pushq %rbx
141 ; CHECK-NEXT: movq %rdi, %rbp
143 ; CHECK-NEXT: #NO_APP
144 ; CHECK-NEXT: pushq %rbp
147 ; CHECK-NEXT: #NO_APP
148 ; CHECK-NEXT: popq %rbx
149 ; CHECK-NEXT: popq %r12
150 ; CHECK-NEXT: popq %r13
151 ; CHECK-NEXT: popq %r14
152 ; CHECK-NEXT: popq %r15
153 ; CHECK-NEXT: popq %rbp
156 ; WIN64-LABEL: write_flags_reg_pressure:
158 ; WIN64-NEXT: pushq %rbp
159 ; WIN64-NEXT: pushq %r15
160 ; WIN64-NEXT: pushq %r14
161 ; WIN64-NEXT: pushq %r13
162 ; WIN64-NEXT: pushq %r12
163 ; WIN64-NEXT: pushq %rsi
164 ; WIN64-NEXT: pushq %rdi
165 ; WIN64-NEXT: pushq %rbx
166 ; WIN64-NEXT: subq $16, %rsp
167 ; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
168 ; WIN64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
170 ; WIN64-NEXT: #NO_APP
171 ; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
172 ; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
173 ; WIN64-NEXT: pushq %rdx
175 ; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
177 ; WIN64-NEXT: #NO_APP
178 ; WIN64-NEXT: addq $16, %rsp
179 ; WIN64-NEXT: popq %rbx
180 ; WIN64-NEXT: popq %rdi
181 ; WIN64-NEXT: popq %rsi
182 ; WIN64-NEXT: popq %r12
183 ; WIN64-NEXT: popq %r13
184 ; WIN64-NEXT: popq %r14
185 ; WIN64-NEXT: popq %r15
186 ; WIN64-NEXT: popq %rbp
188 %2 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
189 %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 0
190 %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 1
191 %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 2
192 %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 3
193 %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 4
194 %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 5
195 %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 6
196 %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 7
197 %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 8
198 %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 9
199 %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 10
200 %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 11
201 %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 12
202 %16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 13
203 tail call void @llvm.x86.flags.write.u64(i64 %0)
204 tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16)