1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2 ; Test basic address sanitizer instrumentation.
4 ; RUN: opt < %s -passes=hwasan -hwasan-mapping-offset=4398046511104 -S | FileCheck %s
7 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
8 target triple = "aarch64--linux-android9001"
10 define i8 @test_load8(ptr %a) sanitize_hwaddress {
11 ; CHECK-LABEL: define i8 @test_load8
12 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
14 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
15 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 0, i64 4398046511104)
16 ; CHECK-NEXT: [[B:%.*]] = load i8, ptr [[A]], align 4
17 ; CHECK-NEXT: ret i8 [[B]]
20 %b = load i8, ptr %a, align 4
24 define i16 @test_load16(ptr %a) sanitize_hwaddress {
25 ; CHECK-LABEL: define i16 @test_load16
26 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
28 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
29 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 1, i64 4398046511104)
30 ; CHECK-NEXT: [[B:%.*]] = load i16, ptr [[A]], align 4
31 ; CHECK-NEXT: ret i16 [[B]]
34 %b = load i16, ptr %a, align 4
38 define i32 @test_load32(ptr %a) sanitize_hwaddress {
39 ; CHECK-LABEL: define i32 @test_load32
40 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
42 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
43 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 2, i64 4398046511104)
44 ; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[A]], align 4
45 ; CHECK-NEXT: ret i32 [[B]]
48 %b = load i32, ptr %a, align 4
52 define i64 @test_load64(ptr %a) sanitize_hwaddress {
53 ; CHECK-LABEL: define i64 @test_load64
54 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
56 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
57 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 3, i64 4398046511104)
58 ; CHECK-NEXT: [[B:%.*]] = load i64, ptr [[A]], align 8
59 ; CHECK-NEXT: ret i64 [[B]]
62 %b = load i64, ptr %a, align 8
66 define i128 @test_load128(ptr %a) sanitize_hwaddress {
67 ; CHECK-LABEL: define i128 @test_load128
68 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
70 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
71 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 4, i64 4398046511104)
72 ; CHECK-NEXT: [[B:%.*]] = load i128, ptr [[A]], align 16
73 ; CHECK-NEXT: ret i128 [[B]]
76 %b = load i128, ptr %a, align 16
80 define i40 @test_load40(ptr %a) sanitize_hwaddress {
81 ; CHECK-LABEL: define i40 @test_load40
82 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
84 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
85 ; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
86 ; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP0]], i64 5)
87 ; CHECK-NEXT: [[B:%.*]] = load i40, ptr [[A]], align 4
88 ; CHECK-NEXT: ret i40 [[B]]
91 %b = load i40, ptr %a, align 4
95 define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
96 ; CHECK-LABEL: define void @test_store8
97 ; CHECK-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
99 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
100 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 16, i64 4398046511104)
101 ; CHECK-NEXT: store i8 [[B]], ptr [[A]], align 4
102 ; CHECK-NEXT: ret void
105 store i8 %b, ptr %a, align 4
109 define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
110 ; CHECK-LABEL: define void @test_store16
111 ; CHECK-SAME: (ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
113 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
114 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 17, i64 4398046511104)
115 ; CHECK-NEXT: store i16 [[B]], ptr [[A]], align 4
116 ; CHECK-NEXT: ret void
119 store i16 %b, ptr %a, align 4
123 define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
124 ; CHECK-LABEL: define void @test_store32
125 ; CHECK-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
127 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
128 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 18, i64 4398046511104)
129 ; CHECK-NEXT: store i32 [[B]], ptr [[A]], align 4
130 ; CHECK-NEXT: ret void
133 store i32 %b, ptr %a, align 4
137 define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
138 ; CHECK-LABEL: define void @test_store64
139 ; CHECK-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
141 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
142 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 19, i64 4398046511104)
143 ; CHECK-NEXT: store i64 [[B]], ptr [[A]], align 8
144 ; CHECK-NEXT: ret void
147 store i64 %b, ptr %a, align 8
151 define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
152 ; CHECK-LABEL: define void @test_store128
153 ; CHECK-SAME: (ptr [[A:%.*]], i128 [[B:%.*]]) #[[ATTR0]] {
155 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
156 ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules.fixedshadow(ptr [[A]], i32 20, i64 4398046511104)
157 ; CHECK-NEXT: store i128 [[B]], ptr [[A]], align 16
158 ; CHECK-NEXT: ret void
161 store i128 %b, ptr %a, align 16
165 define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
166 ; CHECK-LABEL: define void @test_store40
167 ; CHECK-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
169 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
170 ; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
171 ; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP0]], i64 5)
172 ; CHECK-NEXT: store i40 [[B]], ptr [[A]], align 4
173 ; CHECK-NEXT: ret void
176 store i40 %b, ptr %a, align 4
180 define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
181 ; CHECK-LABEL: define void @test_store_unaligned
182 ; CHECK-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
184 ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 4398046511104 to ptr))
185 ; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
186 ; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP0]], i64 8)
187 ; CHECK-NEXT: store i64 [[B]], ptr [[A]], align 4
188 ; CHECK-NEXT: ret void
191 store i64 %b, ptr %a, align 4
195 define i8 @test_load_noattr(ptr %a) {
196 ; CHECK-LABEL: define i8 @test_load_noattr
197 ; CHECK-SAME: (ptr [[A:%.*]]) {
199 ; CHECK-NEXT: [[B:%.*]] = load i8, ptr [[A]], align 4
200 ; CHECK-NEXT: ret i8 [[B]]
203 %b = load i8, ptr %a, align 4
207 define i8 @test_load_notmyattr(ptr %a) sanitize_address {
208 ; CHECK-LABEL: define i8 @test_load_notmyattr
209 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR1:[0-9]+]] {
211 ; CHECK-NEXT: [[B:%.*]] = load i8, ptr [[A]], align 4
212 ; CHECK-NEXT: ret i8 [[B]]
215 %b = load i8, ptr %a, align 4
219 define i8 @test_load_addrspace(ptr addrspace(256) %a) sanitize_hwaddress {
220 ; CHECK-LABEL: define i8 @test_load_addrspace
221 ; CHECK-SAME: (ptr addrspace(256) [[A:%.*]]) #[[ATTR0]] {
223 ; CHECK-NEXT: [[B:%.*]] = load i8, ptr addrspace(256) [[A]], align 4
224 ; CHECK-NEXT: ret i8 [[B]]
227 %b = load i8, ptr addrspace(256) %a, align 4