[Xtensa] Move XtensaUtils to MCTargetDesc
[llvm-project.git] / llvm / test / MC / AArch64 / FP8_SME2 / mla-diagnostics.s
blobdc3d2d1ff3f00234abb4f3532685fa0ad0b6b47c
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16,+sme-f8f32 2>&1 < %s | FileCheck %s
3 // --------------------------------------------------------------------------//
4 // Invalid vector select register
6 fmlal za.h[w8, 0:1, vgx2], {z0.h-z1.h}, z0.b
7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
8 // CHECK-NEXT: fmlal za.h[w8, 0:1, vgx2], {z0.h-z1.h}, z0.b
9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11 fmlal za.h[w11, 4:7], {z31.b-z2.b}, z15
12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
13 // CHECK-NEXT: fmlal za.h[w11, 4:7], {z31.b-z2.b}, z15
14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
16 fmlal za.h[w11, 6:7, vgx2], {z28.b-z31.b}, {z0.b-z3.b}
17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
18 // CHECK-NEXT: fmlal za.h[w11, 6:7, vgx2], {z28.b-z31.b}, {z0.b-z3.b}
19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
21 fmlall za.s[w11, 0:3], {z29.b-z30.b}, {z30.b-z31.b}
22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
23 // CHECK-NEXT: fmlall za.s[w11, 0:3], {z29.b-z30.b}, {z30.b-z31.b}
24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
26 fmlall za.s[w11, 4:7], {z30.b-z0.b}, z15.b
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
28 // CHECK-NEXT: fmlall za.s[w11, 4:7], {z30.b-z0.b}, z15.
29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 // --------------------------------------------------------------------------//
33 // Invalid vector select offset
35 fmlal za.h[w11, 1:2], {z30.b-z31.b}, z15.b[7]
36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 2 in the range [0, 6] or [0, 14] depending on the instruction, and the second immediate is immf + 1.
37 // CHECK-NEXT: fmlal za.h[w11, 1:2], {z30.b-z31.b}, z15.b[7]
38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
40 fmlal za.h[w11, 3:4], {z28.b-z31.b}, z15.b
41 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 2 in the range [0, 6] or [0, 14] depending on the instruction, and the second immediate is immf + 1.
42 // CHECK-NEXT: fmlal za.h[w11, 3:4], {z28.b-z31.b}, z15.b
43 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
45 fmlal za.h[w11, 7:8, vgx4], {z28.b-z31.b}, {z4.b-z7.b}
46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 2 in the range [0, 6] or [0, 14] depending on the instruction, and the second immediate is immf + 1.
47 // CHECK-NEXT: fmlal za.h[w11, 7:8, vgx4], {z28.b-z31.b}, {z4.b-z7.b}
48 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
50 fmlall za.s[w11, 3:6, vgx4], {z30.b-z31.b}, z15.b[3]
51 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 4 in the range [0, 4] or [0, 12] depending on the instruction, and the second immediate is immf + 3.
52 // CHECK-NEXT: fmlall za.s[w11, 3:6, vgx4], {z30.b-z31.b}, z15.b[3]
53 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
55 fmlall za.s[w8, 3:6, vgx4], {z0.b-z3.b}, z0.b
56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 4 in the range [0, 4] or [0, 12] depending on the instruction, and the second immediate is immf + 3.
57 // CHECK-NEXT: fmlall za.s[w8, 3:6, vgx4], {z0.b-z3.b}, z0.b
58 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
60 fmlall za.s[w11, 7:10, vgx4], {z30.b-z31.b}, {z12.b-z13.b}
61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector select offset must be an immediate range of the form <immf>:<imml>, where the first immediate is a multiple of 4 in the range [0, 4] or [0, 12] depending on the instruction, and the second immediate is immf + 3.
62 // CHECK-NEXT: fmlall za.s[w11, 7:10, vgx4], {z30.b-z31.b}, {z12.b-z13.b}
63 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
65 // --------------------------------------------------------------------------//
66 // Invalid vector list
68 fmlal za.h[w11, 4:7, vgx4], {z29.b-z1.b}, {z29.b-z1.b}
69 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
70 // CHECK-NEXT: fmlal za.h[w11, 4:7, vgx4], {z29.b-z1.b}, {z29.b-z1.b}
71 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
73 fmlal za.h[w11, 4:7], {z30.b-z2.b}, {z0.b-z3.b}
74 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
75 // CHECK-NEXT: fmlal za.h[w11, 4:7], {z30.b-z2.b}, {z0.b-z3.b}
76 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
78 fmlall za.s[w8, 0:1], {z31.b-z3.b}, {z31.b-z3.b}
79 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
80 // CHECK-NEXT: fmlall za.s[w8, 0:1], {z31.b-z3.b}, {z31.b-z3.b}
81 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
83 fmlall za.s[w11, 6:7, vgx2], {z30.b-z31.b}, {z0.b-z4.b}
84 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
85 // CHECK-NEXT: fmlall za.s[w11, 6:7, vgx2], {z30.b-z31.b}, {z0.b-z4.b}
86 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
88 // --------------------------------------------------------------------------//
89 // Invalid Register Suffix
90 fmlal za.d[w11, 4:5, vgx4], {z31.b-z2.b}, z15.b
91 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
92 // CHECK-NEXT: fmlal za.d[w11, 4:5, vgx4], {z31.b-z2.b}, z15.b
93 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
95 fmlal za[w11, 2:3], {z28.b-z31.b}, {z28.b-z31.b}
96 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
97 // CHECK-NEXT: fmlal za[w11, 2:3], {z28.b-z31.b}, {z28.b-z31.b}
98 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
100 fmlal za.b[w11, 6:7], {z31.b-z0.b}, z15.b
101 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
102 // CHECK-NEXT: fmlal za.b[w11, 6:7], {z31.b-z0.b}, z15.b
103 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
105 fmlall za.b[w11, 6:7, vgx2], {z30.h-z31.h}, {z30.h-z31.h}
106 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
107 // CHECK-NEXT: fmlall za.b[w11, 6:7, vgx2], {z30.h-z31.h}, {z30.h-z31.h}
108 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
110 fmlall za[w11, 4:7, vgx4], {z31.b-z2.b}, z15.b
111 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
112 // CHECK-NEXT: fmlall za[w11, 4:7, vgx4], {z31.b-z2.b}, z15.b
113 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
115 fmlall za.d[w11, 12:15], {z28.b-z31.b}, {z28.b-z31.b}
116 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
117 // CHECK-NEXT: fmlall za.d[w11, 12:15], {z28.b-z31.b}, {z28.b-z31.b}
118 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
120 // --------------------------------------------------------------------------//
121 // Invalid vector select register
123 fmlal za.h[w7, 4:7, vgx4], {z31.b-z2.b}, z15.b
124 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
125 // CHECK-NEXT: fmlal za.h[w7, 4:7, vgx4], {z31.b-z2.b}, z15.b
126 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
128 fmlal za.h[w, 0:1, vgx2], {z0.b-z1.b}, z0.b[0]
129 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
130 // CHECK-NEXT: fmlal za.h[w, 0:1, vgx2], {z0.b-z1.b}, z0.b[0]
131 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
133 fmlall za.s[w12, 0:3], {z0.b-z3.b}, {z0.b-z3.b}
134 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
135 // CHECK-NEXT: fmlall za.s[w12, 0:3], {z0.b-z3.b}, {z0.b-z3.b}
136 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
138 // --------------------------------------------------------------------------//
139 // Invalid indexed-vector or single-vector register
141 fmlal za.h[w8, 0:1], {z0.b-z1.b}, z16.b[0]
142 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z15.b
143 // CHECK-NEXT: fmlal za.h[w8, 0:1], {z0.b-z1.b}, z16.b[0]
144 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
146 fmlal za.h[w9, 14:15], z31.b, z16.b
147 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z15.b
148 // CHECK-NEXT: fmlal za.h[w9, 14:15], z31.b, z16.b
149 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
151 fmlall za.s[w11, 8:11], z9.b, z16.b[13]
152 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z15.b
153 // CHECK-NEXT: fmlall za.s[w11, 8:11], z9.b, z16.b[13]
154 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
156 fmlall za.s[w11, 12:15], z31.b, z16.b
157 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z15.b
158 // CHECK-NEXT: fmlall za.s[w11, 12:15], z31.b, z16.b
159 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
161 // --------------------------------------------------------------------------//
162 // Invalid vector grouping
164 fmlal za.h[w11, 10:11], {z28.b-z31.b}, {z0.b-z2.b}
165 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
166 // CHECK-NEXT: fmlal za.h[w11, 10:11], {z28.b-z31.b}, {z0.b-z2.b}
167 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
169 fmlall za.s[w11, 4:7, vgx4], {z31.b-z0.b}, z15.b
170 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
171 // CHECK-NEXT: fmlall za.s[w11, 4:7, vgx4], {z31.b-z0.b}, z15.b
172 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
174 // --------------------------------------------------------------------------//
175 // Invalid lane index
177 fmlal za.h[w11, 14:15], z31.b, z15.b[-1]
178 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
179 // CHECK-NEXT: fmlal za.h[w11, 14:15], z31.b, z15.b[-1]
180 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
182 fmlal za.h[w11, 2:3], {z30.b-z31.b}, z15.b[16]
183 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
184 // CHECK-NEXT: fmlal za.h[w11, 2:3], {z30.b-z31.b}, z15.b[16]
185 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
187 fmlall za.s[w9, 12:15], z12.b, z11.b[16]
188 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
189 // CHECK-NEXT: fmlall za.s[w9, 12:15], z12.b, z11.b[16]
190 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
192 fmlall za.s[w8, 4:7], {z16.b-z19.b}, z0.b[-1]
193 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
194 // CHECK-NEXT: fmlall za.s[w8, 4:7], {z16.b-z19.b}, z0.b[-1]
195 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: