llvm/test/MC/AArch64/SME2/fvdot-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid vector select register
   5
   6 fvdot za.s[w7, 0, vgx2], {z0.h-z1.h}, z0.h[0]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
   8 // CHECK-NEXT: fvdot za.s[w7, 0, vgx2], {z0.h-z1.h}, z0.h[0]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 fvdot za.s[w12, 0, vgx4], {z0.h-z3.h}, z0.h[0]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  13 // CHECK-NEXT: fvdot za.s[w12, 0, vgx4], {z0.h-z3.h}, z0.h[0]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 // --------------------------------------------------------------------------//
  17 // Invalid vector select offset
  18
  19 fvdot za.s[w8, -1, vgx2], {z0.h-z1.h}, z0.h[0]
  20 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  21 // CHECK-NEXT: fvdot za.s[w8, -1, vgx2], {z0.h-z1.h}, z0.h[0]
  22 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  23
  24 fvdot za.s[w8, 8, vgx4], {z0.h-z3.h}, z0.h[0]
  25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  26 // CHECK-NEXT: fvdot za.s[w8, 8, vgx4], {z0.h-z3.h}, z0.h[0]
  27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  28
  29 // --------------------------------------------------------------------------//
  30 // Invalid vector list
  31
  32 fvdot za.s[w8, 0, vgx2], {z0.h-z2.h}, z0.h[0]
  33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  34 // CHECK-NEXT: fvdot za.s[w8, 0, vgx2], {z0.h-z2.h}, z0.h[0]
  35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  36
  37 fvdot za.s[w8, 0, vgx2], {z1.h-z2.h}, z0.h[0]
  38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element type
  39 // CHECK-NEXT: fvdot za.s[w8, 0, vgx2], {z1.h-z2.h}, z0.h[0]
  40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  41
  42 // --------------------------------------------------------------------------//
  43 // Invalid Matrix Operand
  44
  45 fvdot za.b[w8, 0, vgx2], {z0.h-z2.h}, z0.h[0]
  46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
  47 // CHECK-NEXT: fvdot za.b[w8, 0, vgx2], {z0.h-z2.h}, z0.h[0]
  48 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  49
  50 // --------------------------------------------------------------------------//
  51 // Invalid vector grouping
  52
  53 fvdot za.s[w8, 0, vgx4], {z0.h-z1.h}, z0.h[0]
  54 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  55 // CHECK-NEXT: fvdot za.s[w8, 0, vgx4], {z0.h-z1.h}, z0.h[0]
  56 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  57
  58 // --------------------------------------------------------------------------//
  59 // Invalid lane index
  60
  61 fvdot za.s[w8, 0, vgx2], {z0.h-z1.h}, z0.h[4]
  62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]
  63 // CHECK-NEXT: fvdot za.s[w8, 0, vgx2], {z0.h-z1.h}, z0.h[4]
  64 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  65
  66 fvdot za.s[w8, 0, vgx2], {z0.h-z1.h}, z0.h[-1]
  67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]
  68 // CHECK-NEXT: fvdot za.s[w8, 0, vgx2], {z0.h-z1.h}, z0.h[-1]
  69 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: