[SLP]Reduce number of alternate instruction, where possible
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / fsubr.s
blob5ee6ce8a58b970d56a18bf3b1c99051628dd0979
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 fsubr z0.h, p0/m, z0.h, #0.500000000000000
13 // CHECK-INST: fsubr z0.h, p0/m, z0.h, #0.5
14 // CHECK-ENCODING: [0x00,0x80,0x5b,0x65]
15 // CHECK-ERROR: instruction requires: sve or sme
16 // CHECK-UNKNOWN: 655b8000 <unknown>
18 fsubr z0.h, p0/m, z0.h, #0.5
19 // CHECK-INST: fsubr z0.h, p0/m, z0.h, #0.5
20 // CHECK-ENCODING: [0x00,0x80,0x5b,0x65]
21 // CHECK-ERROR: instruction requires: sve or sme
22 // CHECK-UNKNOWN: 655b8000 <unknown>
24 fsubr z0.s, p0/m, z0.s, #0.5
25 // CHECK-INST: fsubr z0.s, p0/m, z0.s, #0.5
26 // CHECK-ENCODING: [0x00,0x80,0x9b,0x65]
27 // CHECK-ERROR: instruction requires: sve or sme
28 // CHECK-UNKNOWN: 659b8000 <unknown>
30 fsubr z0.d, p0/m, z0.d, #0.5
31 // CHECK-INST: fsubr z0.d, p0/m, z0.d, #0.5
32 // CHECK-ENCODING: [0x00,0x80,0xdb,0x65]
33 // CHECK-ERROR: instruction requires: sve or sme
34 // CHECK-UNKNOWN: 65db8000 <unknown>
36 fsubr z31.h, p7/m, z31.h, #1.000000000000000
37 // CHECK-INST: fsubr z31.h, p7/m, z31.h, #1.0
38 // CHECK-ENCODING: [0x3f,0x9c,0x5b,0x65]
39 // CHECK-ERROR: instruction requires: sve or sme
40 // CHECK-UNKNOWN: 655b9c3f <unknown>
42 fsubr z31.h, p7/m, z31.h, #1.0
43 // CHECK-INST: fsubr z31.h, p7/m, z31.h, #1.0
44 // CHECK-ENCODING: [0x3f,0x9c,0x5b,0x65]
45 // CHECK-ERROR: instruction requires: sve or sme
46 // CHECK-UNKNOWN: 655b9c3f <unknown>
48 fsubr z31.s, p7/m, z31.s, #1.0
49 // CHECK-INST: fsubr z31.s, p7/m, z31.s, #1.0
50 // CHECK-ENCODING: [0x3f,0x9c,0x9b,0x65]
51 // CHECK-ERROR: instruction requires: sve or sme
52 // CHECK-UNKNOWN: 659b9c3f <unknown>
54 fsubr z31.d, p7/m, z31.d, #1.0
55 // CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0
56 // CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65]
57 // CHECK-ERROR: instruction requires: sve or sme
58 // CHECK-UNKNOWN: 65db9c3f <unknown>
60 fsubr z0.h, p7/m, z0.h, z31.h
61 // CHECK-INST: fsubr z0.h, p7/m, z0.h, z31.h
62 // CHECK-ENCODING: [0xe0,0x9f,0x43,0x65]
63 // CHECK-ERROR: instruction requires: sve or sme
64 // CHECK-UNKNOWN: 65439fe0 <unknown>
66 fsubr z0.s, p7/m, z0.s, z31.s
67 // CHECK-INST: fsubr z0.s, p7/m, z0.s, z31.s
68 // CHECK-ENCODING: [0xe0,0x9f,0x83,0x65]
69 // CHECK-ERROR: instruction requires: sve or sme
70 // CHECK-UNKNOWN: 65839fe0 <unknown>
72 fsubr z0.d, p7/m, z0.d, z31.d
73 // CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d
74 // CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
75 // CHECK-ERROR: instruction requires: sve or sme
76 // CHECK-UNKNOWN: 65c39fe0 <unknown>
79 // --------------------------------------------------------------------------//
80 // Test compatibility with MOVPRFX instruction.
82 movprfx z31.d, p7/z, z6.d
83 // CHECK-INST: movprfx z31.d, p7/z, z6.d
84 // CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
85 // CHECK-ERROR: instruction requires: sve or sme
86 // CHECK-UNKNOWN: 04d03cdf <unknown>
88 fsubr z31.d, p7/m, z31.d, #1.0
89 // CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0
90 // CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65]
91 // CHECK-ERROR: instruction requires: sve or sme
92 // CHECK-UNKNOWN: 65db9c3f <unknown>
94 movprfx z31, z6
95 // CHECK-INST: movprfx z31, z6
96 // CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
97 // CHECK-ERROR: instruction requires: sve or sme
98 // CHECK-UNKNOWN: 0420bcdf <unknown>
100 fsubr z31.d, p7/m, z31.d, #1.0
101 // CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0
102 // CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65]
103 // CHECK-ERROR: instruction requires: sve or sme
104 // CHECK-UNKNOWN: 65db9c3f <unknown>
106 movprfx z0.d, p7/z, z7.d
107 // CHECK-INST: movprfx z0.d, p7/z, z7.d
108 // CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
109 // CHECK-ERROR: instruction requires: sve or sme
110 // CHECK-UNKNOWN: 04d03ce0 <unknown>
112 fsubr z0.d, p7/m, z0.d, z31.d
113 // CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d
114 // CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
115 // CHECK-ERROR: instruction requires: sve or sme
116 // CHECK-UNKNOWN: 65c39fe0 <unknown>
118 movprfx z0, z7
119 // CHECK-INST: movprfx z0, z7
120 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
121 // CHECK-ERROR: instruction requires: sve or sme
122 // CHECK-UNKNOWN: 0420bce0 <unknown>
124 fsubr z0.d, p7/m, z0.d, z31.d
125 // CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d
126 // CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
127 // CHECK-ERROR: instruction requires: sve or sme
128 // CHECK-UNKNOWN: 65c39fe0 <unknown>