llvm/test/MC/AArch64/SVE2p1/directive-arch-negative.s

   1 // RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
   2
   3 .arch armv9-a+sve2p1
   4 .arch armv9-a+nosve2p1
   5 sclamp z0.s, z1.s, z2.s
   6 // CHECK: error: instruction requires: sme or sve2p1
   7 // CHECK: sclamp z0.s, z1.s, z2.s
   8
   9 .arch armv9-a+sve2p1+sve-b16b16
  10 .arch armv9-a+sve2p1+nosve-b16b16
  11 bfadd   z23.h, p3/m, z23.h, z13.h
  12 // CHECK: error: instruction requires: sve-b16b16
  13 // CHECK: bfadd   z23.h, p3/m, z23.h, z13.h
  14
  15 .arch armv9-a+sve2p1+sve-aes2
  16 .arch armv9-a+nosve-aes2
  17 aesdimc {z0.b-z3.b}, {z0.b-z3.b}, z0.q[0]
  18 // CHECK: error: instruction requires: sve2p1 or ssve-aes sve-aes2
  19 // CHECK: aesdimc {z0.b-z3.b}, {z0.b-z3.b}, z0.q[0]