1 // NOTE
: Assertions have been autogenerated by utils
/update_mc_test_checks.py UTC_ARGS
: --unique
--version
5
2 // RUN
: llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=+real-true16
,+wavefrontsize32
-show-encoding
%s | FileCheck
--check-prefixes
=GFX11
%s
3 // RUN
: llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=+real-true16
,+wavefrontsize64
-show-encoding
%s | FileCheck
--check-prefixes
=GFX11
%s
5 v_bfrev_b32_dpp v5
, v1 quad_perm
:[3,2,1,0]
6 // GFX11
: v_bfrev_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff]
8 v_bfrev_b32 v5
, v1 quad_perm
:[0,1,2,3]
9 // GFX11
: v_bfrev_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0xe4,0x00,0xff]
11 v_bfrev_b32 v5
, v1 row_mirror
12 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x40,0x01,0xff]
14 v_bfrev_b32 v5
, v1 row_half_mirror
15 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x41,0x01,0xff]
17 v_bfrev_b32 v5
, v1 row_shl
:1
18 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x01,0x01,0xff]
20 v_bfrev_b32 v5
, v1 row_shl
:15
21 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x0f,0x01,0xff]
23 v_bfrev_b32 v5
, v1 row_shr
:1
24 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x11,0x01,0xff]
26 v_bfrev_b32 v5
, v1 row_shr
:15
27 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x1f,0x01,0xff]
29 v_bfrev_b32 v5
, v1 row_ror
:1
30 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x21,0x01,0xff]
32 v_bfrev_b32 v5
, v1 row_ror
:15
33 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x2f,0x01,0xff]
35 v_bfrev_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
36 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x50,0x01,0xff]
38 v_bfrev_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
39 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x5f,0x01,0x01]
41 v_bfrev_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
42 // GFX11
: v_bfrev_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x70,0x0a,0x7e,0x01,0x60,0x09,0x13]
44 v_bfrev_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
45 // GFX11
: v_bfrev_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x70,0xfe,0x7f,0xff,0x6f,0x05,0x30]
47 v_ceil_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
48 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0xff]
50 v_ceil_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
51 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0xe4,0x00,0xff]
53 v_ceil_f16 v5.
l, v1.
l row_mirror
54 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x40,0x01,0xff]
56 v_ceil_f16 v5.
l, v1.
l row_half_mirror
57 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x41,0x01,0xff]
59 v_ceil_f16 v5.
l, v1.
l row_shl
:1
60 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x01,0x01,0xff]
62 v_ceil_f16 v5.
l, v1.
l row_shl
:15
63 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x0f,0x01,0xff]
65 v_ceil_f16 v5.
l, v1.
l row_shr
:1
66 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x11,0x01,0xff]
68 v_ceil_f16 v5.
l, v1.
l row_shr
:15
69 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x1f,0x01,0xff]
71 v_ceil_f16 v5.
l, v1.
l row_ror
:1
72 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x21,0x01,0xff]
74 v_ceil_f16 v5.
l, v1.
l row_ror
:15
75 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x2f,0x01,0xff]
77 v_ceil_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
78 // GFX11
: v_ceil_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb8,0x0a,0x7e,0x01,0x50,0x01,0xff]
80 v_ceil_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
81 // GFX11
: v_ceil_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb8,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
83 v_ceil_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
84 // GFX11
: v_ceil_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb8,0x0a,0x7f,0x81,0x60,0x09,0x13]
86 v_ceil_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
87 // GFX11
: v_ceil_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb8,0xfe,0x7f,0xff,0x6f,0x35,0x30]
89 v_ceil_f32 v5
, v1 quad_perm
:[3,2,1,0]
90 // GFX11
: v_ceil_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0xff]
92 v_ceil_f32 v5
, v1 quad_perm
:[0,1,2,3]
93 // GFX11
: v_ceil_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0xff]
95 v_ceil_f32 v5
, v1 row_mirror
96 // GFX11
: v_ceil_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x40,0x01,0xff]
98 v_ceil_f32 v5
, v1 row_half_mirror
99 // GFX11
: v_ceil_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x41,0x01,0xff]
101 v_ceil_f32 v5
, v1 row_shl
:1
102 // GFX11
: v_ceil_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x01,0x01,0xff]
104 v_ceil_f32 v5
, v1 row_shl
:15
105 // GFX11
: v_ceil_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x0f,0x01,0xff]
107 v_ceil_f32 v5
, v1 row_shr
:1
108 // GFX11
: v_ceil_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x11,0x01,0xff]
110 v_ceil_f32 v5
, v1 row_shr
:15
111 // GFX11
: v_ceil_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x1f,0x01,0xff]
113 v_ceil_f32 v5
, v1 row_ror
:1
114 // GFX11
: v_ceil_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x21,0x01,0xff]
116 v_ceil_f32 v5
, v1 row_ror
:15
117 // GFX11
: v_ceil_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x2f,0x01,0xff]
119 v_ceil_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
120 // GFX11
: v_ceil_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x50,0x01,0xff]
122 v_ceil_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
123 // GFX11
: v_ceil_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x5f,0x01,0x01]
125 v_ceil_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
126 // GFX11
: v_ceil_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x44,0x0a,0x7e,0x01,0x60,0x09,0x13]
128 v_ceil_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
129 // GFX11
: v_ceil_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x44,0xfe,0x7f,0xff,0x6f,0x35,0x30]
131 v_cls_i32 v5
, v1 quad_perm
:[3,2,1,0]
132 // GFX11
: v_cls_i32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0xff]
134 v_cls_i32 v5
, v1 quad_perm
:[0,1,2,3]
135 // GFX11
: v_cls_i32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xff]
137 v_cls_i32 v5
, v1 row_mirror
138 // GFX11
: v_cls_i32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x40,0x01,0xff]
140 v_cls_i32 v5
, v1 row_half_mirror
141 // GFX11
: v_cls_i32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x41,0x01,0xff]
143 v_cls_i32 v5
, v1 row_shl
:1
144 // GFX11
: v_cls_i32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x01,0x01,0xff]
146 v_cls_i32 v5
, v1 row_shl
:15
147 // GFX11
: v_cls_i32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x0f,0x01,0xff]
149 v_cls_i32 v5
, v1 row_shr
:1
150 // GFX11
: v_cls_i32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x11,0x01,0xff]
152 v_cls_i32 v5
, v1 row_shr
:15
153 // GFX11
: v_cls_i32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x1f,0x01,0xff]
155 v_cls_i32 v5
, v1 row_ror
:1
156 // GFX11
: v_cls_i32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x21,0x01,0xff]
158 v_cls_i32 v5
, v1 row_ror
:15
159 // GFX11
: v_cls_i32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x2f,0x01,0xff]
161 v_cls_i32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
162 // GFX11
: v_cls_i32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x50,0x01,0xff]
164 v_cls_i32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
165 // GFX11
: v_cls_i32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x5f,0x01,0x01]
167 v_cls_i32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
168 // GFX11
: v_cls_i32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x60,0x09,0x13]
170 v_cls_i32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
171 // GFX11
: v_cls_i32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x76,0xfe,0x7f,0xff,0x6f,0x05,0x30]
173 v_clz_i32_u32 v5
, v1 quad_perm
:[3,2,1,0]
174 // GFX11
: v_clz_i32_u32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0xff]
176 v_clz_i32_u32 v5
, v1 quad_perm
:[0,1,2,3]
177 // GFX11
: v_clz_i32_u32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xff]
179 v_clz_i32_u32 v5
, v1 row_mirror
180 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x40,0x01,0xff]
182 v_clz_i32_u32 v5
, v1 row_half_mirror
183 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x41,0x01,0xff]
185 v_clz_i32_u32 v5
, v1 row_shl
:1
186 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x01,0x01,0xff]
188 v_clz_i32_u32 v5
, v1 row_shl
:15
189 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x0f,0x01,0xff]
191 v_clz_i32_u32 v5
, v1 row_shr
:1
192 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x11,0x01,0xff]
194 v_clz_i32_u32 v5
, v1 row_shr
:15
195 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x1f,0x01,0xff]
197 v_clz_i32_u32 v5
, v1 row_ror
:1
198 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x21,0x01,0xff]
200 v_clz_i32_u32 v5
, v1 row_ror
:15
201 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x2f,0x01,0xff]
203 v_clz_i32_u32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
204 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x50,0x01,0xff]
206 v_clz_i32_u32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
207 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x5f,0x01,0x01]
209 v_clz_i32_u32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
210 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x60,0x09,0x13]
212 v_clz_i32_u32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
213 // GFX11
: v_clz_i32_u32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x72,0xfe,0x7f,0xff,0x6f,0x05,0x30]
215 v_cos_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
216 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
218 v_cos_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
219 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
221 v_cos_f16 v5.
l, v1.
l row_mirror
222 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x40,0x01,0xff]
224 v_cos_f16 v5.
l, v1.
l row_half_mirror
225 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x41,0x01,0xff]
227 v_cos_f16 v5.
l, v1.
l row_shl
:1
228 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x01,0x01,0xff]
230 v_cos_f16 v5.
l, v1.
l row_shl
:15
231 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
233 v_cos_f16 v5.
l, v1.
l row_shr
:1
234 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x11,0x01,0xff]
236 v_cos_f16 v5.
l, v1.
l row_shr
:15
237 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
239 v_cos_f16 v5.
l, v1.
l row_ror
:1
240 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x21,0x01,0xff]
242 v_cos_f16 v5.
l, v1.
l row_ror
:15
243 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
245 v_cos_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
246 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x50,0x01,0xff]
248 v_cos_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
249 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x5f,0x01,0x01]
251 v_cos_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
252 // GFX11
: v_cos_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc2,0x0a,0x7e,0x01,0x60,0x09,0x13]
254 v_cos_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
255 // GFX11
: v_cos_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc2,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
257 v_cos_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
258 // GFX11
: v_cos_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc2,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
260 v_cos_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
261 // GFX11
: v_cos_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc2,0x0a,0x7f,0x81,0x60,0x09,0x13]
263 v_cos_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
264 // GFX11
: v_cos_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc2,0xfe,0x7f,0xff,0x6f,0x35,0x30]
266 v_cos_f32 v5
, v1 quad_perm
:[3,2,1,0]
267 // GFX11
: v_cos_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0xff]
269 v_cos_f32 v5
, v1 quad_perm
:[0,1,2,3]
270 // GFX11
: v_cos_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0xe4,0x00,0xff]
272 v_cos_f32 v5
, v1 row_mirror
273 // GFX11
: v_cos_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x40,0x01,0xff]
275 v_cos_f32 v5
, v1 row_half_mirror
276 // GFX11
: v_cos_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x41,0x01,0xff]
278 v_cos_f32 v5
, v1 row_shl
:1
279 // GFX11
: v_cos_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x01,0x01,0xff]
281 v_cos_f32 v5
, v1 row_shl
:15
282 // GFX11
: v_cos_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x0f,0x01,0xff]
284 v_cos_f32 v5
, v1 row_shr
:1
285 // GFX11
: v_cos_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x11,0x01,0xff]
287 v_cos_f32 v5
, v1 row_shr
:15
288 // GFX11
: v_cos_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x1f,0x01,0xff]
290 v_cos_f32 v5
, v1 row_ror
:1
291 // GFX11
: v_cos_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x21,0x01,0xff]
293 v_cos_f32 v5
, v1 row_ror
:15
294 // GFX11
: v_cos_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x2f,0x01,0xff]
296 v_cos_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
297 // GFX11
: v_cos_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x50,0x01,0xff]
299 v_cos_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
300 // GFX11
: v_cos_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x5f,0x01,0x01]
302 v_cos_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
303 // GFX11
: v_cos_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x6c,0x0a,0x7e,0x01,0x60,0x09,0x13]
305 v_cos_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
306 // GFX11
: v_cos_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x6c,0xfe,0x7f,0xff,0x6f,0x35,0x30]
308 v_ctz_i32_b32 v5
, v1 quad_perm
:[3,2,1,0]
309 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0xff]
311 v_ctz_i32_b32 v5
, v1 quad_perm
:[0,1,2,3]
312 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xff]
314 v_ctz_i32_b32 v5
, v1 row_mirror
315 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x40,0x01,0xff]
317 v_ctz_i32_b32 v5
, v1 row_half_mirror
318 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x41,0x01,0xff]
320 v_ctz_i32_b32 v5
, v1 row_shl
:1
321 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x01,0x01,0xff]
323 v_ctz_i32_b32 v5
, v1 row_shl
:15
324 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x0f,0x01,0xff]
326 v_ctz_i32_b32 v5
, v1 row_shr
:1
327 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x11,0x01,0xff]
329 v_ctz_i32_b32 v5
, v1 row_shr
:15
330 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x1f,0x01,0xff]
332 v_ctz_i32_b32 v5
, v1 row_ror
:1
333 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x21,0x01,0xff]
335 v_ctz_i32_b32 v5
, v1 row_ror
:15
336 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x2f,0x01,0xff]
338 v_ctz_i32_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
339 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x50,0x01,0xff]
341 v_ctz_i32_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
342 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x5f,0x01,0x01]
344 v_ctz_i32_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
345 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x60,0x09,0x13]
347 v_ctz_i32_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
348 // GFX11
: v_ctz_i32_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x74,0xfe,0x7f,0xff,0x6f,0x05,0x30]
350 v_cvt_f16_f32 v5.
l, v1 quad_perm
:[3,2,1,0]
351 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0xff]
353 v_cvt_f16_f32 v5.
l, v1 quad_perm
:[0,1,2,3]
354 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0xff]
356 v_cvt_f16_f32 v5.
l, v1 row_mirror
357 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x40,0x01,0xff]
359 v_cvt_f16_f32 v5.
l, v1 row_half_mirror
360 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x41,0x01,0xff]
362 v_cvt_f16_f32 v5.
l, v1 row_shl
:1
363 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x01,0x01,0xff]
365 v_cvt_f16_f32 v5.
l, v1 row_shl
:15
366 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x0f,0x01,0xff]
368 v_cvt_f16_f32 v5.
l, v1 row_shr
:1
369 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x11,0x01,0xff]
371 v_cvt_f16_f32 v5.
l, v1 row_shr
:15
372 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x1f,0x01,0xff]
374 v_cvt_f16_f32 v5.
l, v1 row_ror
:1
375 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x21,0x01,0xff]
377 v_cvt_f16_f32 v5.
l, v1 row_ror
:15
378 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x2f,0x01,0xff]
380 v_cvt_f16_f32 v5.
l, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
381 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x50,0x01,0xff]
383 v_cvt_f16_f32 v5.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
384 // GFX11
: v_cvt_f16_f32_dpp v5.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x14,0x0a,0x7e,0x01,0x5f,0x01,0x01]
386 v_cvt_f16_f32 v5.h
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
387 // GFX11
: v_cvt_f16_f32_dpp v5.h
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x14,0x0a,0x7f,0x01,0x60,0x09,0x13]
389 v_cvt_f16_f32 v127.h
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
390 // GFX11
: v_cvt_f16_f32_dpp v127.h
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x14,0xfe,0x7f,0xff,0x6f,0x35,0x30]
392 v_cvt_f16_i16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
393 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
395 v_cvt_f16_i16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
396 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
398 v_cvt_f16_i16 v5.
l, v1.
l row_mirror
399 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x40,0x01,0xff]
401 v_cvt_f16_i16 v5.
l, v1.
l row_half_mirror
402 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x41,0x01,0xff]
404 v_cvt_f16_i16 v5.
l, v1.
l row_shl
:1
405 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x01,0x01,0xff]
407 v_cvt_f16_i16 v5.
l, v1.
l row_shl
:15
408 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
410 v_cvt_f16_i16 v5.
l, v1.
l row_shr
:1
411 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x11,0x01,0xff]
413 v_cvt_f16_i16 v5.
l, v1.
l row_shr
:15
414 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
416 v_cvt_f16_i16 v5.
l, v1.
l row_ror
:1
417 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x21,0x01,0xff]
419 v_cvt_f16_i16 v5.
l, v1.
l row_ror
:15
420 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
422 v_cvt_f16_i16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
423 // GFX11
: v_cvt_f16_i16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa2,0x0a,0x7e,0x01,0x50,0x01,0xff]
425 v_cvt_f16_i16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
426 // GFX11
: v_cvt_f16_i16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xa2,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
428 v_cvt_f16_i16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
429 // GFX11
: v_cvt_f16_i16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xa2,0x0a,0x7f,0x81,0x60,0x09,0x13]
431 v_cvt_f16_i16 v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
432 // GFX11
: v_cvt_f16_i16_dpp v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xa2,0xfe,0x7f,0xff,0x6f,0x05,0x30]
434 v_cvt_f16_u16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
435 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0xff]
437 v_cvt_f16_u16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
438 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0xe4,0x00,0xff]
440 v_cvt_f16_u16 v5.
l, v1.
l row_mirror
441 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x40,0x01,0xff]
443 v_cvt_f16_u16 v5.
l, v1.
l row_half_mirror
444 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x41,0x01,0xff]
446 v_cvt_f16_u16 v5.
l, v1.
l row_shl
:1
447 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x01,0x01,0xff]
449 v_cvt_f16_u16 v5.
l, v1.
l row_shl
:15
450 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x0f,0x01,0xff]
452 v_cvt_f16_u16 v5.
l, v1.
l row_shr
:1
453 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x11,0x01,0xff]
455 v_cvt_f16_u16 v5.
l, v1.
l row_shr
:15
456 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x1f,0x01,0xff]
458 v_cvt_f16_u16 v5.
l, v1.
l row_ror
:1
459 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x21,0x01,0xff]
461 v_cvt_f16_u16 v5.
l, v1.
l row_ror
:15
462 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x2f,0x01,0xff]
464 v_cvt_f16_u16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
465 // GFX11
: v_cvt_f16_u16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa0,0x0a,0x7e,0x01,0x50,0x01,0xff]
467 v_cvt_f16_u16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
468 // GFX11
: v_cvt_f16_u16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xa0,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
470 v_cvt_f16_u16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
471 // GFX11
: v_cvt_f16_u16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xa0,0x0a,0x7f,0x81,0x60,0x09,0x13]
473 v_cvt_f16_u16 v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
474 // GFX11
: v_cvt_f16_u16_dpp v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xa0,0xfe,0x7f,0xff,0x6f,0x05,0x30]
476 v_cvt_f32_f16 v5
, v1.
l quad_perm
:[3,2,1,0]
477 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0xff]
479 v_cvt_f32_f16 v5
, v1.
l quad_perm
:[0,1,2,3]
480 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0xff]
482 v_cvt_f32_f16 v5
, v1.
l row_mirror
483 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x40,0x01,0xff]
485 v_cvt_f32_f16 v5
, v1.
l row_half_mirror
486 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x41,0x01,0xff]
488 v_cvt_f32_f16 v5
, v1.
l row_shl
:1
489 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x01,0x01,0xff]
491 v_cvt_f32_f16 v5
, v1.
l row_shl
:15
492 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x0f,0x01,0xff]
494 v_cvt_f32_f16 v5
, v1.
l row_shr
:1
495 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x11,0x01,0xff]
497 v_cvt_f32_f16 v5
, v1.
l row_shr
:15
498 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x1f,0x01,0xff]
500 v_cvt_f32_f16 v5
, v1.
l row_ror
:1
501 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x21,0x01,0xff]
503 v_cvt_f32_f16 v5
, v1.
l row_ror
:15
504 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x2f,0x01,0xff]
506 v_cvt_f32_f16 v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
507 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x50,0x01,0xff]
509 v_cvt_f32_f16 v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
510 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x16,0x0a,0x7e,0x01,0x5f,0x01,0x01]
512 v_cvt_f32_f16 v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
513 // GFX11
: v_cvt_f32_f16_dpp v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x16,0x0a,0x7e,0x81,0x60,0x09,0x13]
515 v_cvt_f32_f16 v255
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
516 // GFX11
: v_cvt_f32_f16_dpp v255
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x16,0xfe,0x7f,0xff,0x6f,0x35,0x30]
518 v_cvt_f32_i32 v5
, v1 quad_perm
:[3,2,1,0]
519 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
521 v_cvt_f32_i32 v5
, v1 quad_perm
:[0,1,2,3]
522 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0xff]
524 v_cvt_f32_i32 v5
, v1 row_mirror
525 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x40,0x01,0xff]
527 v_cvt_f32_i32 v5
, v1 row_half_mirror
528 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x41,0x01,0xff]
530 v_cvt_f32_i32 v5
, v1 row_shl
:1
531 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x01,0x01,0xff]
533 v_cvt_f32_i32 v5
, v1 row_shl
:15
534 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x0f,0x01,0xff]
536 v_cvt_f32_i32 v5
, v1 row_shr
:1
537 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x11,0x01,0xff]
539 v_cvt_f32_i32 v5
, v1 row_shr
:15
540 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x1f,0x01,0xff]
542 v_cvt_f32_i32 v5
, v1 row_ror
:1
543 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x21,0x01,0xff]
545 v_cvt_f32_i32 v5
, v1 row_ror
:15
546 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x2f,0x01,0xff]
548 v_cvt_f32_i32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
549 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x50,0x01,0xff]
551 v_cvt_f32_i32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
552 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x5f,0x01,0x01]
554 v_cvt_f32_i32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
555 // GFX11
: v_cvt_f32_i32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x0a,0x0a,0x7e,0x01,0x60,0x09,0x13]
557 v_cvt_f32_i32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
558 // GFX11
: v_cvt_f32_i32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x0a,0xfe,0x7f,0xff,0x6f,0x05,0x30]
560 v_cvt_f32_u32 v5
, v1 quad_perm
:[3,2,1,0]
561 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0xff]
563 v_cvt_f32_u32 v5
, v1 quad_perm
:[0,1,2,3]
564 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0xff]
566 v_cvt_f32_u32 v5
, v1 row_mirror
567 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x40,0x01,0xff]
569 v_cvt_f32_u32 v5
, v1 row_half_mirror
570 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x41,0x01,0xff]
572 v_cvt_f32_u32 v5
, v1 row_shl
:1
573 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x01,0x01,0xff]
575 v_cvt_f32_u32 v5
, v1 row_shl
:15
576 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x0f,0x01,0xff]
578 v_cvt_f32_u32 v5
, v1 row_shr
:1
579 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x11,0x01,0xff]
581 v_cvt_f32_u32 v5
, v1 row_shr
:15
582 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x1f,0x01,0xff]
584 v_cvt_f32_u32 v5
, v1 row_ror
:1
585 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x21,0x01,0xff]
587 v_cvt_f32_u32 v5
, v1 row_ror
:15
588 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x2f,0x01,0xff]
590 v_cvt_f32_u32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
591 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x50,0x01,0xff]
593 v_cvt_f32_u32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
594 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x5f,0x01,0x01]
596 v_cvt_f32_u32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
597 // GFX11
: v_cvt_f32_u32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x0c,0x0a,0x7e,0x01,0x60,0x09,0x13]
599 v_cvt_f32_u32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
600 // GFX11
: v_cvt_f32_u32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x0c,0xfe,0x7f,0xff,0x6f,0x05,0x30]
602 v_cvt_f32_ubyte0 v5
, v1 quad_perm
:[3,2,1,0]
603 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0xff]
605 v_cvt_f32_ubyte0 v5
, v1 quad_perm
:[0,1,2,3]
606 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0xff]
608 v_cvt_f32_ubyte0 v5
, v1 row_mirror
609 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x40,0x01,0xff]
611 v_cvt_f32_ubyte0 v5
, v1 row_half_mirror
612 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x41,0x01,0xff]
614 v_cvt_f32_ubyte0 v5
, v1 row_shl
:1
615 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x01,0x01,0xff]
617 v_cvt_f32_ubyte0 v5
, v1 row_shl
:15
618 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x0f,0x01,0xff]
620 v_cvt_f32_ubyte0 v5
, v1 row_shr
:1
621 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x11,0x01,0xff]
623 v_cvt_f32_ubyte0 v5
, v1 row_shr
:15
624 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x1f,0x01,0xff]
626 v_cvt_f32_ubyte0 v5
, v1 row_ror
:1
627 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x21,0x01,0xff]
629 v_cvt_f32_ubyte0 v5
, v1 row_ror
:15
630 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x2f,0x01,0xff]
632 v_cvt_f32_ubyte0 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
633 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x50,0x01,0xff]
635 v_cvt_f32_ubyte0 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
636 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x5f,0x01,0x01]
638 v_cvt_f32_ubyte0 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
639 // GFX11
: v_cvt_f32_ubyte0_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x22,0x0a,0x7e,0x01,0x60,0x09,0x13]
641 v_cvt_f32_ubyte0 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
642 // GFX11
: v_cvt_f32_ubyte0_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x22,0xfe,0x7f,0xff,0x6f,0x05,0x30]
644 v_cvt_f32_ubyte1 v5
, v1 quad_perm
:[3,2,1,0]
645 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0xff]
647 v_cvt_f32_ubyte1 v5
, v1 quad_perm
:[0,1,2,3]
648 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0xff]
650 v_cvt_f32_ubyte1 v5
, v1 row_mirror
651 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x40,0x01,0xff]
653 v_cvt_f32_ubyte1 v5
, v1 row_half_mirror
654 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x41,0x01,0xff]
656 v_cvt_f32_ubyte1 v5
, v1 row_shl
:1
657 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x01,0x01,0xff]
659 v_cvt_f32_ubyte1 v5
, v1 row_shl
:15
660 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x0f,0x01,0xff]
662 v_cvt_f32_ubyte1 v5
, v1 row_shr
:1
663 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x11,0x01,0xff]
665 v_cvt_f32_ubyte1 v5
, v1 row_shr
:15
666 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x1f,0x01,0xff]
668 v_cvt_f32_ubyte1 v5
, v1 row_ror
:1
669 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x21,0x01,0xff]
671 v_cvt_f32_ubyte1 v5
, v1 row_ror
:15
672 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x2f,0x01,0xff]
674 v_cvt_f32_ubyte1 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
675 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x50,0x01,0xff]
677 v_cvt_f32_ubyte1 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
678 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x5f,0x01,0x01]
680 v_cvt_f32_ubyte1 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
681 // GFX11
: v_cvt_f32_ubyte1_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x24,0x0a,0x7e,0x01,0x60,0x09,0x13]
683 v_cvt_f32_ubyte1 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
684 // GFX11
: v_cvt_f32_ubyte1_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x24,0xfe,0x7f,0xff,0x6f,0x05,0x30]
686 v_cvt_f32_ubyte2 v5
, v1 quad_perm
:[3,2,1,0]
687 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0xff]
689 v_cvt_f32_ubyte2 v5
, v1 quad_perm
:[0,1,2,3]
690 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0xff]
692 v_cvt_f32_ubyte2 v5
, v1 row_mirror
693 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x40,0x01,0xff]
695 v_cvt_f32_ubyte2 v5
, v1 row_half_mirror
696 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x41,0x01,0xff]
698 v_cvt_f32_ubyte2 v5
, v1 row_shl
:1
699 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x01,0x01,0xff]
701 v_cvt_f32_ubyte2 v5
, v1 row_shl
:15
702 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x0f,0x01,0xff]
704 v_cvt_f32_ubyte2 v5
, v1 row_shr
:1
705 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x11,0x01,0xff]
707 v_cvt_f32_ubyte2 v5
, v1 row_shr
:15
708 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x1f,0x01,0xff]
710 v_cvt_f32_ubyte2 v5
, v1 row_ror
:1
711 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x21,0x01,0xff]
713 v_cvt_f32_ubyte2 v5
, v1 row_ror
:15
714 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x2f,0x01,0xff]
716 v_cvt_f32_ubyte2 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
717 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x50,0x01,0xff]
719 v_cvt_f32_ubyte2 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
720 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x5f,0x01,0x01]
722 v_cvt_f32_ubyte2 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
723 // GFX11
: v_cvt_f32_ubyte2_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x26,0x0a,0x7e,0x01,0x60,0x09,0x13]
725 v_cvt_f32_ubyte2 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
726 // GFX11
: v_cvt_f32_ubyte2_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x26,0xfe,0x7f,0xff,0x6f,0x05,0x30]
728 v_cvt_f32_ubyte3 v5
, v1 quad_perm
:[3,2,1,0]
729 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0xff]
731 v_cvt_f32_ubyte3 v5
, v1 quad_perm
:[0,1,2,3]
732 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0xff]
734 v_cvt_f32_ubyte3 v5
, v1 row_mirror
735 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x40,0x01,0xff]
737 v_cvt_f32_ubyte3 v5
, v1 row_half_mirror
738 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x41,0x01,0xff]
740 v_cvt_f32_ubyte3 v5
, v1 row_shl
:1
741 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x01,0x01,0xff]
743 v_cvt_f32_ubyte3 v5
, v1 row_shl
:15
744 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x0f,0x01,0xff]
746 v_cvt_f32_ubyte3 v5
, v1 row_shr
:1
747 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x11,0x01,0xff]
749 v_cvt_f32_ubyte3 v5
, v1 row_shr
:15
750 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x1f,0x01,0xff]
752 v_cvt_f32_ubyte3 v5
, v1 row_ror
:1
753 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x21,0x01,0xff]
755 v_cvt_f32_ubyte3 v5
, v1 row_ror
:15
756 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x2f,0x01,0xff]
758 v_cvt_f32_ubyte3 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
759 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x50,0x01,0xff]
761 v_cvt_f32_ubyte3 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
762 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x5f,0x01,0x01]
764 v_cvt_f32_ubyte3 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
765 // GFX11
: v_cvt_f32_ubyte3_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x28,0x0a,0x7e,0x01,0x60,0x09,0x13]
767 v_cvt_f32_ubyte3 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
768 // GFX11
: v_cvt_f32_ubyte3_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x28,0xfe,0x7f,0xff,0x6f,0x05,0x30]
770 v_cvt_floor_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
771 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
773 v_cvt_floor_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
774 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xff]
776 v_cvt_floor_i32_f32 v5
, v1 row_mirror
777 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x40,0x01,0xff]
779 v_cvt_floor_i32_f32 v5
, v1 row_half_mirror
780 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x41,0x01,0xff]
782 v_cvt_floor_i32_f32 v5
, v1 row_shl
:1
783 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x01,0x01,0xff]
785 v_cvt_floor_i32_f32 v5
, v1 row_shl
:15
786 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x0f,0x01,0xff]
788 v_cvt_floor_i32_f32 v5
, v1 row_shr
:1
789 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x11,0x01,0xff]
791 v_cvt_floor_i32_f32 v5
, v1 row_shr
:15
792 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x1f,0x01,0xff]
794 v_cvt_floor_i32_f32 v5
, v1 row_ror
:1
795 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x21,0x01,0xff]
797 v_cvt_floor_i32_f32 v5
, v1 row_ror
:15
798 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x2f,0x01,0xff]
800 v_cvt_floor_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
801 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x50,0x01,0xff]
803 v_cvt_floor_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
804 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x5f,0x01,0x01]
806 v_cvt_floor_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
807 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x60,0x09,0x13]
809 v_cvt_floor_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
810 // GFX11
: v_cvt_floor_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x1a,0xfe,0x7f,0xff,0x6f,0x35,0x30]
812 v_cvt_flr_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
813 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
815 v_cvt_flr_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
816 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xff]
818 v_cvt_flr_i32_f32 v5
, v1 row_mirror
819 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x40,0x01,0xff]
821 v_cvt_flr_i32_f32 v5
, v1 row_half_mirror
822 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x41,0x01,0xff]
824 v_cvt_flr_i32_f32 v5
, v1 row_shl
:1
825 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x01,0x01,0xff]
827 v_cvt_flr_i32_f32 v5
, v1 row_shl
:15
828 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x0f,0x01,0xff]
830 v_cvt_flr_i32_f32 v5
, v1 row_shr
:1
831 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x11,0x01,0xff]
833 v_cvt_flr_i32_f32 v5
, v1 row_shr
:15
834 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x1f,0x01,0xff]
836 v_cvt_flr_i32_f32 v5
, v1 row_ror
:1
837 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x21,0x01,0xff]
839 v_cvt_flr_i32_f32 v5
, v1 row_ror
:15
840 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x2f,0x01,0xff]
842 v_cvt_flr_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
843 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x50,0x01,0xff]
845 v_cvt_flr_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
846 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x5f,0x01,0x01]
848 v_cvt_flr_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
849 // GFX11
: v_cvt_floor_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x1a,0x0a,0x7e,0x01,0x60,0x09,0x13]
851 v_cvt_flr_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
852 // GFX11
: v_cvt_floor_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x1a,0xfe,0x7f,0xff,0x6f,0x35,0x30]
854 v_cvt_i16_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
855 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0xff]
857 v_cvt_i16_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
858 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0xe4,0x00,0xff]
860 v_cvt_i16_f16 v5.
l, v1.
l row_mirror
861 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x40,0x01,0xff]
863 v_cvt_i16_f16 v5.
l, v1.
l row_half_mirror
864 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x41,0x01,0xff]
866 v_cvt_i16_f16 v5.
l, v1.
l row_shl
:1
867 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x01,0x01,0xff]
869 v_cvt_i16_f16 v5.
l, v1.
l row_shl
:15
870 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x0f,0x01,0xff]
872 v_cvt_i16_f16 v5.
l, v1.
l row_shr
:1
873 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x11,0x01,0xff]
875 v_cvt_i16_f16 v5.
l, v1.
l row_shr
:15
876 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x1f,0x01,0xff]
878 v_cvt_i16_f16 v5.
l, v1.
l row_ror
:1
879 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x21,0x01,0xff]
881 v_cvt_i16_f16 v5.
l, v1.
l row_ror
:15
882 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x2f,0x01,0xff]
884 v_cvt_i16_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
885 // GFX11
: v_cvt_i16_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa6,0x0a,0x7e,0x01,0x50,0x01,0xff]
887 v_cvt_i16_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
888 // GFX11
: v_cvt_i16_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xa6,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
890 v_cvt_i16_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
891 // GFX11
: v_cvt_i16_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xa6,0x0a,0x7f,0x81,0x60,0x09,0x13]
893 v_cvt_i16_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
894 // GFX11
: v_cvt_i16_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xa6,0xfe,0x7f,0xff,0x6f,0x35,0x30]
896 v_cvt_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
897 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0xff]
899 v_cvt_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
900 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0xff]
902 v_cvt_i32_f32 v5
, v1 row_mirror
903 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x40,0x01,0xff]
905 v_cvt_i32_f32 v5
, v1 row_half_mirror
906 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x41,0x01,0xff]
908 v_cvt_i32_f32 v5
, v1 row_shl
:1
909 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x01,0x01,0xff]
911 v_cvt_i32_f32 v5
, v1 row_shl
:15
912 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x0f,0x01,0xff]
914 v_cvt_i32_f32 v5
, v1 row_shr
:1
915 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x11,0x01,0xff]
917 v_cvt_i32_f32 v5
, v1 row_shr
:15
918 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x1f,0x01,0xff]
920 v_cvt_i32_f32 v5
, v1 row_ror
:1
921 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x21,0x01,0xff]
923 v_cvt_i32_f32 v5
, v1 row_ror
:15
924 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x2f,0x01,0xff]
926 v_cvt_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
927 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x50,0x01,0xff]
929 v_cvt_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
930 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x5f,0x01,0x01]
932 v_cvt_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
933 // GFX11
: v_cvt_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x10,0x0a,0x7e,0x01,0x60,0x09,0x13]
935 v_cvt_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
936 // GFX11
: v_cvt_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x10,0xfe,0x7f,0xff,0x6f,0x35,0x30]
938 v_cvt_i32_i16 v5
, v1.
l quad_perm
:[3,2,1,0]
939 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x1b,0x00,0xff]
941 v_cvt_i32_i16 v5
, v1.
l quad_perm
:[0,1,2,3]
942 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0xe4,0x00,0xff]
944 v_cvt_i32_i16 v5
, v1.
l row_mirror
945 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x40,0x01,0xff]
947 v_cvt_i32_i16 v5
, v1.
l row_half_mirror
948 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x41,0x01,0xff]
950 v_cvt_i32_i16 v5
, v1.
l row_shl
:1
951 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x01,0x01,0xff]
953 v_cvt_i32_i16 v5
, v1.
l row_shl
:15
954 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x0f,0x01,0xff]
956 v_cvt_i32_i16 v5
, v1.
l row_shr
:1
957 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x11,0x01,0xff]
959 v_cvt_i32_i16 v5
, v1.
l row_shr
:15
960 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x1f,0x01,0xff]
962 v_cvt_i32_i16 v5
, v1.
l row_ror
:1
963 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x21,0x01,0xff]
965 v_cvt_i32_i16 v5
, v1.
l row_ror
:15
966 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x2f,0x01,0xff]
968 v_cvt_i32_i16 v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
969 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x50,0x01,0xff]
971 v_cvt_i32_i16 v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
972 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x5f,0x01,0x01]
974 v_cvt_i32_i16 v5
, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
975 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x01,0x60,0x09,0x13]
977 v_cvt_i32_i16 v255
, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
978 // GFX11
: v_cvt_i32_i16_dpp v255
, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd4,0xfe,0x7f,0x7f,0x6f,0x05,0x30]
980 v_cvt_i32_i16 v5
, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
981 // GFX11
: v_cvt_i32_i16_dpp v5
, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x7f,0x5f,0x01,0x01]
983 v_cvt_i32_i16 v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
984 // GFX11
: v_cvt_i32_i16_dpp v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd4,0x0a,0x7e,0x81,0x60,0x09,0x13]
986 v_cvt_i32_i16 v255
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
987 // GFX11
: v_cvt_i32_i16_dpp v255
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd4,0xfe,0x7f,0xff,0x6f,0x05,0x30]
989 v_cvt_nearest_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
990 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0xff]
992 v_cvt_nearest_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
993 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xff]
995 v_cvt_nearest_i32_f32 v5
, v1 row_mirror
996 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x40,0x01,0xff]
998 v_cvt_nearest_i32_f32 v5
, v1 row_half_mirror
999 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x41,0x01,0xff]
1001 v_cvt_nearest_i32_f32 v5
, v1 row_shl
:1
1002 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x01,0x01,0xff]
1004 v_cvt_nearest_i32_f32 v5
, v1 row_shl
:15
1005 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1007 v_cvt_nearest_i32_f32 v5
, v1 row_shr
:1
1008 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x11,0x01,0xff]
1010 v_cvt_nearest_i32_f32 v5
, v1 row_shr
:15
1011 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1013 v_cvt_nearest_i32_f32 v5
, v1 row_ror
:1
1014 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x21,0x01,0xff]
1016 v_cvt_nearest_i32_f32 v5
, v1 row_ror
:15
1017 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1019 v_cvt_nearest_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1020 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x50,0x01,0xff]
1022 v_cvt_nearest_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1023 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1025 v_cvt_nearest_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1026 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x60,0x09,0x13]
1028 v_cvt_nearest_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1029 // GFX11
: v_cvt_nearest_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x18,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1031 v_cvt_norm_i16_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1032 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1034 v_cvt_norm_i16_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1035 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1037 v_cvt_norm_i16_f16 v5.
l, v1.
l row_mirror
1038 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x40,0x01,0xff]
1040 v_cvt_norm_i16_f16 v5.
l, v1.
l row_half_mirror
1041 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x41,0x01,0xff]
1043 v_cvt_norm_i16_f16 v5.
l, v1.
l row_shl
:1
1044 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x01,0x01,0xff]
1046 v_cvt_norm_i16_f16 v5.
l, v1.
l row_shl
:15
1047 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1049 v_cvt_norm_i16_f16 v5.
l, v1.
l row_shr
:1
1050 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x11,0x01,0xff]
1052 v_cvt_norm_i16_f16 v5.
l, v1.
l row_shr
:15
1053 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1055 v_cvt_norm_i16_f16 v5.
l, v1.
l row_ror
:1
1056 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x21,0x01,0xff]
1058 v_cvt_norm_i16_f16 v5.
l, v1.
l row_ror
:15
1059 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1061 v_cvt_norm_i16_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1062 // GFX11
: v_cvt_norm_i16_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc6,0x0a,0x7e,0x01,0x50,0x01,0xff]
1064 v_cvt_norm_i16_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1065 // GFX11
: v_cvt_norm_i16_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc6,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1067 v_cvt_norm_i16_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1068 // GFX11
: v_cvt_norm_i16_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc6,0x0a,0x7f,0x81,0x60,0x09,0x13]
1070 v_cvt_norm_i16_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1071 // GFX11
: v_cvt_norm_i16_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc6,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1073 v_cvt_norm_u16_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1074 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1076 v_cvt_norm_u16_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1077 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1079 v_cvt_norm_u16_f16 v5.
l, v1.
l row_mirror
1080 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x40,0x01,0xff]
1082 v_cvt_norm_u16_f16 v5.
l, v1.
l row_half_mirror
1083 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x41,0x01,0xff]
1085 v_cvt_norm_u16_f16 v5.
l, v1.
l row_shl
:1
1086 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x01,0x01,0xff]
1088 v_cvt_norm_u16_f16 v5.
l, v1.
l row_shl
:15
1089 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1091 v_cvt_norm_u16_f16 v5.
l, v1.
l row_shr
:1
1092 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x11,0x01,0xff]
1094 v_cvt_norm_u16_f16 v5.
l, v1.
l row_shr
:15
1095 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1097 v_cvt_norm_u16_f16 v5.
l, v1.
l row_ror
:1
1098 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x21,0x01,0xff]
1100 v_cvt_norm_u16_f16 v5.
l, v1.
l row_ror
:15
1101 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1103 v_cvt_norm_u16_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1104 // GFX11
: v_cvt_norm_u16_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc8,0x0a,0x7e,0x01,0x50,0x01,0xff]
1106 v_cvt_norm_u16_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1107 // GFX11
: v_cvt_norm_u16_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc8,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1109 v_cvt_norm_u16_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1110 // GFX11
: v_cvt_norm_u16_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc8,0x0a,0x7f,0x81,0x60,0x09,0x13]
1112 v_cvt_norm_u16_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1113 // GFX11
: v_cvt_norm_u16_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc8,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1115 v_cvt_off_f32_i4 v5
, v1 quad_perm
:[3,2,1,0]
1116 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1118 v_cvt_off_f32_i4 v5
, v1 quad_perm
:[0,1,2,3]
1119 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1121 v_cvt_off_f32_i4 v5
, v1 row_mirror
1122 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x40,0x01,0xff]
1124 v_cvt_off_f32_i4 v5
, v1 row_half_mirror
1125 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x41,0x01,0xff]
1127 v_cvt_off_f32_i4 v5
, v1 row_shl
:1
1128 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x01,0x01,0xff]
1130 v_cvt_off_f32_i4 v5
, v1 row_shl
:15
1131 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1133 v_cvt_off_f32_i4 v5
, v1 row_shr
:1
1134 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x11,0x01,0xff]
1136 v_cvt_off_f32_i4 v5
, v1 row_shr
:15
1137 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1139 v_cvt_off_f32_i4 v5
, v1 row_ror
:1
1140 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x21,0x01,0xff]
1142 v_cvt_off_f32_i4 v5
, v1 row_ror
:15
1143 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1145 v_cvt_off_f32_i4 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1146 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x50,0x01,0xff]
1148 v_cvt_off_f32_i4 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1149 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1151 v_cvt_off_f32_i4 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1152 // GFX11
: v_cvt_off_f32_i4_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x1c,0x0a,0x7e,0x01,0x60,0x09,0x13]
1154 v_cvt_off_f32_i4 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1155 // GFX11
: v_cvt_off_f32_i4_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x1c,0xfe,0x7f,0xff,0x6f,0x05,0x30]
1157 v_cvt_rpi_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
1158 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1160 v_cvt_rpi_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
1161 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1163 v_cvt_rpi_i32_f32 v5
, v1 row_mirror
1164 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x40,0x01,0xff]
1166 v_cvt_rpi_i32_f32 v5
, v1 row_half_mirror
1167 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x41,0x01,0xff]
1169 v_cvt_rpi_i32_f32 v5
, v1 row_shl
:1
1170 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x01,0x01,0xff]
1172 v_cvt_rpi_i32_f32 v5
, v1 row_shl
:15
1173 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1175 v_cvt_rpi_i32_f32 v5
, v1 row_shr
:1
1176 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x11,0x01,0xff]
1178 v_cvt_rpi_i32_f32 v5
, v1 row_shr
:15
1179 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1181 v_cvt_rpi_i32_f32 v5
, v1 row_ror
:1
1182 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x21,0x01,0xff]
1184 v_cvt_rpi_i32_f32 v5
, v1 row_ror
:15
1185 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1187 v_cvt_rpi_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1188 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x50,0x01,0xff]
1190 v_cvt_rpi_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1191 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1193 v_cvt_rpi_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1194 // GFX11
: v_cvt_nearest_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x18,0x0a,0x7e,0x01,0x60,0x09,0x13]
1196 v_cvt_rpi_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1197 // GFX11
: v_cvt_nearest_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x18,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1199 v_cvt_u16_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1200 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1202 v_cvt_u16_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1203 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1205 v_cvt_u16_f16 v5.
l, v1.
l row_mirror
1206 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x40,0x01,0xff]
1208 v_cvt_u16_f16 v5.
l, v1.
l row_half_mirror
1209 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x41,0x01,0xff]
1211 v_cvt_u16_f16 v5.
l, v1.
l row_shl
:1
1212 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x01,0x01,0xff]
1214 v_cvt_u16_f16 v5.
l, v1.
l row_shl
:15
1215 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1217 v_cvt_u16_f16 v5.
l, v1.
l row_shr
:1
1218 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x11,0x01,0xff]
1220 v_cvt_u16_f16 v5.
l, v1.
l row_shr
:15
1221 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1223 v_cvt_u16_f16 v5.
l, v1.
l row_ror
:1
1224 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x21,0x01,0xff]
1226 v_cvt_u16_f16 v5.
l, v1.
l row_ror
:15
1227 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1229 v_cvt_u16_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1230 // GFX11
: v_cvt_u16_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa4,0x0a,0x7e,0x01,0x50,0x01,0xff]
1232 v_cvt_u16_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1233 // GFX11
: v_cvt_u16_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xa4,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1235 v_cvt_u16_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1236 // GFX11
: v_cvt_u16_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xa4,0x0a,0x7f,0x81,0x60,0x09,0x13]
1238 v_cvt_u16_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1239 // GFX11
: v_cvt_u16_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xa4,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1241 v_cvt_u32_f32 v5
, v1 quad_perm
:[3,2,1,0]
1242 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1244 v_cvt_u32_f32 v5
, v1 quad_perm
:[0,1,2,3]
1245 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1247 v_cvt_u32_f32 v5
, v1 row_mirror
1248 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x40,0x01,0xff]
1250 v_cvt_u32_f32 v5
, v1 row_half_mirror
1251 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x41,0x01,0xff]
1253 v_cvt_u32_f32 v5
, v1 row_shl
:1
1254 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x01,0x01,0xff]
1256 v_cvt_u32_f32 v5
, v1 row_shl
:15
1257 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1259 v_cvt_u32_f32 v5
, v1 row_shr
:1
1260 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x11,0x01,0xff]
1262 v_cvt_u32_f32 v5
, v1 row_shr
:15
1263 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1265 v_cvt_u32_f32 v5
, v1 row_ror
:1
1266 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x21,0x01,0xff]
1268 v_cvt_u32_f32 v5
, v1 row_ror
:15
1269 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1271 v_cvt_u32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1272 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x50,0x01,0xff]
1274 v_cvt_u32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1275 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1277 v_cvt_u32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1278 // GFX11
: v_cvt_u32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x0e,0x0a,0x7e,0x01,0x60,0x09,0x13]
1280 v_cvt_u32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1281 // GFX11
: v_cvt_u32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x0e,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1283 v_cvt_u32_u16 v5
, v1.
l quad_perm
:[3,2,1,0]
1284 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1286 v_cvt_u32_u16 v5
, v1.
l quad_perm
:[0,1,2,3]
1287 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1289 v_cvt_u32_u16 v5
, v1.
l row_mirror
1290 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x40,0x01,0xff]
1292 v_cvt_u32_u16 v5
, v1.
l row_half_mirror
1293 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x41,0x01,0xff]
1295 v_cvt_u32_u16 v5
, v1.
l row_shl
:1
1296 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x01,0x01,0xff]
1298 v_cvt_u32_u16 v5
, v1.
l row_shl
:15
1299 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1301 v_cvt_u32_u16 v5
, v1.
l row_shr
:1
1302 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x11,0x01,0xff]
1304 v_cvt_u32_u16 v5
, v1.
l row_shr
:15
1305 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1307 v_cvt_u32_u16 v5
, v1.
l row_ror
:1
1308 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x21,0x01,0xff]
1310 v_cvt_u32_u16 v5
, v1.
l row_ror
:15
1311 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1313 v_cvt_u32_u16 v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1314 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x50,0x01,0xff]
1316 v_cvt_u32_u16 v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1317 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1319 v_cvt_u32_u16 v5
, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
1320 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x01,0x60,0x09,0x13]
1322 v_cvt_u32_u16 v255
, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
1323 // GFX11
: v_cvt_u32_u16_dpp v255
, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd6,0xfe,0x7f,0x7f,0x6f,0x05,0x30]
1325 v_cvt_u32_u16 v5
, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1326 // GFX11
: v_cvt_u32_u16_dpp v5
, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x7f,0x5f,0x01,0x01]
1328 v_cvt_u32_u16 v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1329 // GFX11
: v_cvt_u32_u16_dpp v5
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd6,0x0a,0x7e,0x81,0x60,0x09,0x13]
1331 v_cvt_u32_u16 v255
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1332 // GFX11
: v_cvt_u32_u16_dpp v255
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd6,0xfe,0x7f,0xff,0x6f,0x05,0x30]
1334 v_exp_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1335 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1337 v_exp_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1338 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1340 v_exp_f16 v5.
l, v1.
l row_mirror
1341 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x40,0x01,0xff]
1343 v_exp_f16 v5.
l, v1.
l row_half_mirror
1344 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x41,0x01,0xff]
1346 v_exp_f16 v5.
l, v1.
l row_shl
:1
1347 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x01,0x01,0xff]
1349 v_exp_f16 v5.
l, v1.
l row_shl
:15
1350 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1352 v_exp_f16 v5.
l, v1.
l row_shr
:1
1353 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x11,0x01,0xff]
1355 v_exp_f16 v5.
l, v1.
l row_shr
:15
1356 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1358 v_exp_f16 v5.
l, v1.
l row_ror
:1
1359 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x21,0x01,0xff]
1361 v_exp_f16 v5.
l, v1.
l row_ror
:15
1362 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1364 v_exp_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1365 // GFX11
: v_exp_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb0,0x0a,0x7e,0x01,0x50,0x01,0xff]
1367 v_exp_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1368 // GFX11
: v_exp_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb0,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1370 v_exp_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1371 // GFX11
: v_exp_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb0,0x0a,0x7f,0x81,0x60,0x09,0x13]
1373 v_exp_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1374 // GFX11
: v_exp_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb0,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1376 v_exp_f32 v5
, v1 quad_perm
:[3,2,1,0]
1377 // GFX11
: v_exp_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1379 v_exp_f32 v5
, v1 quad_perm
:[0,1,2,3]
1380 // GFX11
: v_exp_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1382 v_exp_f32 v5
, v1 row_mirror
1383 // GFX11
: v_exp_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x40,0x01,0xff]
1385 v_exp_f32 v5
, v1 row_half_mirror
1386 // GFX11
: v_exp_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x41,0x01,0xff]
1388 v_exp_f32 v5
, v1 row_shl
:1
1389 // GFX11
: v_exp_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x01,0x01,0xff]
1391 v_exp_f32 v5
, v1 row_shl
:15
1392 // GFX11
: v_exp_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1394 v_exp_f32 v5
, v1 row_shr
:1
1395 // GFX11
: v_exp_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x11,0x01,0xff]
1397 v_exp_f32 v5
, v1 row_shr
:15
1398 // GFX11
: v_exp_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1400 v_exp_f32 v5
, v1 row_ror
:1
1401 // GFX11
: v_exp_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x21,0x01,0xff]
1403 v_exp_f32 v5
, v1 row_ror
:15
1404 // GFX11
: v_exp_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1406 v_exp_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1407 // GFX11
: v_exp_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x50,0x01,0xff]
1409 v_exp_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1410 // GFX11
: v_exp_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1412 v_exp_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1413 // GFX11
: v_exp_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x4a,0x0a,0x7e,0x01,0x60,0x09,0x13]
1415 v_exp_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1416 // GFX11
: v_exp_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x4a,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1418 v_ffbh_i32 v5
, v1 quad_perm
:[3,2,1,0]
1419 // GFX11
: v_cls_i32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1421 v_ffbh_i32 v5
, v1 quad_perm
:[0,1,2,3]
1422 // GFX11
: v_cls_i32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1424 v_ffbh_i32 v5
, v1 row_mirror
1425 // GFX11
: v_cls_i32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x40,0x01,0xff]
1427 v_ffbh_i32 v5
, v1 row_half_mirror
1428 // GFX11
: v_cls_i32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x41,0x01,0xff]
1430 v_ffbh_i32 v5
, v1 row_shl
:1
1431 // GFX11
: v_cls_i32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x01,0x01,0xff]
1433 v_ffbh_i32 v5
, v1 row_shl
:15
1434 // GFX11
: v_cls_i32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1436 v_ffbh_i32 v5
, v1 row_shr
:1
1437 // GFX11
: v_cls_i32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x11,0x01,0xff]
1439 v_ffbh_i32 v5
, v1 row_shr
:15
1440 // GFX11
: v_cls_i32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1442 v_ffbh_i32 v5
, v1 row_ror
:1
1443 // GFX11
: v_cls_i32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x21,0x01,0xff]
1445 v_ffbh_i32 v5
, v1 row_ror
:15
1446 // GFX11
: v_cls_i32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1448 v_ffbh_i32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1449 // GFX11
: v_cls_i32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x50,0x01,0xff]
1451 v_ffbh_i32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1452 // GFX11
: v_cls_i32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1454 v_ffbh_i32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1455 // GFX11
: v_cls_i32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x76,0x0a,0x7e,0x01,0x60,0x09,0x13]
1457 v_ffbh_i32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1458 // GFX11
: v_cls_i32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x76,0xfe,0x7f,0xff,0x6f,0x05,0x30]
1460 v_ffbh_u32 v5
, v1 quad_perm
:[3,2,1,0]
1461 // GFX11
: v_clz_i32_u32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1463 v_ffbh_u32 v5
, v1 quad_perm
:[0,1,2,3]
1464 // GFX11
: v_clz_i32_u32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1466 v_ffbh_u32 v5
, v1 row_mirror
1467 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x40,0x01,0xff]
1469 v_ffbh_u32 v5
, v1 row_half_mirror
1470 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x41,0x01,0xff]
1472 v_ffbh_u32 v5
, v1 row_shl
:1
1473 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x01,0x01,0xff]
1475 v_ffbh_u32 v5
, v1 row_shl
:15
1476 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1478 v_ffbh_u32 v5
, v1 row_shr
:1
1479 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x11,0x01,0xff]
1481 v_ffbh_u32 v5
, v1 row_shr
:15
1482 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1484 v_ffbh_u32 v5
, v1 row_ror
:1
1485 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x21,0x01,0xff]
1487 v_ffbh_u32 v5
, v1 row_ror
:15
1488 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1490 v_ffbh_u32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1491 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x50,0x01,0xff]
1493 v_ffbh_u32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1494 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1496 v_ffbh_u32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1497 // GFX11
: v_clz_i32_u32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x72,0x0a,0x7e,0x01,0x60,0x09,0x13]
1499 v_ffbh_u32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1500 // GFX11
: v_clz_i32_u32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x72,0xfe,0x7f,0xff,0x6f,0x05,0x30]
1502 v_ffbl_b32 v5
, v1 quad_perm
:[3,2,1,0]
1503 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1505 v_ffbl_b32 v5
, v1 quad_perm
:[0,1,2,3]
1506 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1508 v_ffbl_b32 v5
, v1 row_mirror
1509 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x40,0x01,0xff]
1511 v_ffbl_b32 v5
, v1 row_half_mirror
1512 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x41,0x01,0xff]
1514 v_ffbl_b32 v5
, v1 row_shl
:1
1515 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x01,0x01,0xff]
1517 v_ffbl_b32 v5
, v1 row_shl
:15
1518 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1520 v_ffbl_b32 v5
, v1 row_shr
:1
1521 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x11,0x01,0xff]
1523 v_ffbl_b32 v5
, v1 row_shr
:15
1524 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1526 v_ffbl_b32 v5
, v1 row_ror
:1
1527 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x21,0x01,0xff]
1529 v_ffbl_b32 v5
, v1 row_ror
:15
1530 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1532 v_ffbl_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1533 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x50,0x01,0xff]
1535 v_ffbl_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1536 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1538 v_ffbl_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1539 // GFX11
: v_ctz_i32_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x74,0x0a,0x7e,0x01,0x60,0x09,0x13]
1541 v_ffbl_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1542 // GFX11
: v_ctz_i32_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x74,0xfe,0x7f,0xff,0x6f,0x05,0x30]
1544 v_floor_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1545 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1547 v_floor_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1548 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1550 v_floor_f16 v5.
l, v1.
l row_mirror
1551 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x40,0x01,0xff]
1553 v_floor_f16 v5.
l, v1.
l row_half_mirror
1554 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x41,0x01,0xff]
1556 v_floor_f16 v5.
l, v1.
l row_shl
:1
1557 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x01,0x01,0xff]
1559 v_floor_f16 v5.
l, v1.
l row_shl
:15
1560 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1562 v_floor_f16 v5.
l, v1.
l row_shr
:1
1563 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x11,0x01,0xff]
1565 v_floor_f16 v5.
l, v1.
l row_shr
:15
1566 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1568 v_floor_f16 v5.
l, v1.
l row_ror
:1
1569 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x21,0x01,0xff]
1571 v_floor_f16 v5.
l, v1.
l row_ror
:15
1572 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1574 v_floor_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1575 // GFX11
: v_floor_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb6,0x0a,0x7e,0x01,0x50,0x01,0xff]
1577 v_floor_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1578 // GFX11
: v_floor_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb6,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1580 v_floor_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1581 // GFX11
: v_floor_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb6,0x0a,0x7f,0x81,0x60,0x09,0x13]
1583 v_floor_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1584 // GFX11
: v_floor_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb6,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1586 v_floor_f32 v5
, v1 quad_perm
:[3,2,1,0]
1587 // GFX11
: v_floor_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1589 v_floor_f32 v5
, v1 quad_perm
:[0,1,2,3]
1590 // GFX11
: v_floor_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1592 v_floor_f32 v5
, v1 row_mirror
1593 // GFX11
: v_floor_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x40,0x01,0xff]
1595 v_floor_f32 v5
, v1 row_half_mirror
1596 // GFX11
: v_floor_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x41,0x01,0xff]
1598 v_floor_f32 v5
, v1 row_shl
:1
1599 // GFX11
: v_floor_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x01,0x01,0xff]
1601 v_floor_f32 v5
, v1 row_shl
:15
1602 // GFX11
: v_floor_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1604 v_floor_f32 v5
, v1 row_shr
:1
1605 // GFX11
: v_floor_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x11,0x01,0xff]
1607 v_floor_f32 v5
, v1 row_shr
:15
1608 // GFX11
: v_floor_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1610 v_floor_f32 v5
, v1 row_ror
:1
1611 // GFX11
: v_floor_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x21,0x01,0xff]
1613 v_floor_f32 v5
, v1 row_ror
:15
1614 // GFX11
: v_floor_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1616 v_floor_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1617 // GFX11
: v_floor_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x50,0x01,0xff]
1619 v_floor_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1620 // GFX11
: v_floor_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1622 v_floor_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1623 // GFX11
: v_floor_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x48,0x0a,0x7e,0x01,0x60,0x09,0x13]
1625 v_floor_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1626 // GFX11
: v_floor_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x48,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1628 v_fract_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1629 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1631 v_fract_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1632 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1634 v_fract_f16 v5.
l, v1.
l row_mirror
1635 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x40,0x01,0xff]
1637 v_fract_f16 v5.
l, v1.
l row_half_mirror
1638 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x41,0x01,0xff]
1640 v_fract_f16 v5.
l, v1.
l row_shl
:1
1641 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x01,0x01,0xff]
1643 v_fract_f16 v5.
l, v1.
l row_shl
:15
1644 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1646 v_fract_f16 v5.
l, v1.
l row_shr
:1
1647 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x11,0x01,0xff]
1649 v_fract_f16 v5.
l, v1.
l row_shr
:15
1650 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1652 v_fract_f16 v5.
l, v1.
l row_ror
:1
1653 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x21,0x01,0xff]
1655 v_fract_f16 v5.
l, v1.
l row_ror
:15
1656 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1658 v_fract_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1659 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x50,0x01,0xff]
1661 v_fract_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1662 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1664 v_fract_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
1665 // GFX11
: v_fract_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xbe,0x0a,0x7e,0x01,0x60,0x09,0x13]
1667 v_fract_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
1668 // GFX11
: v_fract_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xbe,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1670 v_fract_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1671 // GFX11
: v_fract_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xbe,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1673 v_fract_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1674 // GFX11
: v_fract_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xbe,0x0a,0x7f,0x81,0x60,0x09,0x13]
1676 v_fract_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1677 // GFX11
: v_fract_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xbe,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1679 v_fract_f32 v5
, v1 quad_perm
:[3,2,1,0]
1680 // GFX11
: v_fract_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1682 v_fract_f32 v5
, v1 quad_perm
:[0,1,2,3]
1683 // GFX11
: v_fract_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1685 v_fract_f32 v5
, v1 row_mirror
1686 // GFX11
: v_fract_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x40,0x01,0xff]
1688 v_fract_f32 v5
, v1 row_half_mirror
1689 // GFX11
: v_fract_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x41,0x01,0xff]
1691 v_fract_f32 v5
, v1 row_shl
:1
1692 // GFX11
: v_fract_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x01,0x01,0xff]
1694 v_fract_f32 v5
, v1 row_shl
:15
1695 // GFX11
: v_fract_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1697 v_fract_f32 v5
, v1 row_shr
:1
1698 // GFX11
: v_fract_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x11,0x01,0xff]
1700 v_fract_f32 v5
, v1 row_shr
:15
1701 // GFX11
: v_fract_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1703 v_fract_f32 v5
, v1 row_ror
:1
1704 // GFX11
: v_fract_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x21,0x01,0xff]
1706 v_fract_f32 v5
, v1 row_ror
:15
1707 // GFX11
: v_fract_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1709 v_fract_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1710 // GFX11
: v_fract_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x50,0x01,0xff]
1712 v_fract_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1713 // GFX11
: v_fract_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1715 v_fract_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1716 // GFX11
: v_fract_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x40,0x0a,0x7e,0x01,0x60,0x09,0x13]
1718 v_fract_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1719 // GFX11
: v_fract_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x40,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1721 v_frexp_exp_i16_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1722 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1724 v_frexp_exp_i16_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1725 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1727 v_frexp_exp_i16_f16 v5.
l, v1.
l row_mirror
1728 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x40,0x01,0xff]
1730 v_frexp_exp_i16_f16 v5.
l, v1.
l row_half_mirror
1731 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x41,0x01,0xff]
1733 v_frexp_exp_i16_f16 v5.
l, v1.
l row_shl
:1
1734 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x01,0x01,0xff]
1736 v_frexp_exp_i16_f16 v5.
l, v1.
l row_shl
:15
1737 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1739 v_frexp_exp_i16_f16 v5.
l, v1.
l row_shr
:1
1740 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x11,0x01,0xff]
1742 v_frexp_exp_i16_f16 v5.
l, v1.
l row_shr
:15
1743 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1745 v_frexp_exp_i16_f16 v5.
l, v1.
l row_ror
:1
1746 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x21,0x01,0xff]
1748 v_frexp_exp_i16_f16 v5.
l, v1.
l row_ror
:15
1749 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1751 v_frexp_exp_i16_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1752 // GFX11
: v_frexp_exp_i16_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb4,0x0a,0x7e,0x01,0x50,0x01,0xff]
1754 v_frexp_exp_i16_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1755 // GFX11
: v_frexp_exp_i16_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb4,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1757 v_frexp_exp_i16_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1758 // GFX11
: v_frexp_exp_i16_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb4,0x0a,0x7f,0x81,0x60,0x09,0x13]
1760 v_frexp_exp_i16_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1761 // GFX11
: v_frexp_exp_i16_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb4,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1763 v_frexp_exp_i32_f32 v5
, v1 quad_perm
:[3,2,1,0]
1764 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1766 v_frexp_exp_i32_f32 v5
, v1 quad_perm
:[0,1,2,3]
1767 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1769 v_frexp_exp_i32_f32 v5
, v1 row_mirror
1770 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x40,0x01,0xff]
1772 v_frexp_exp_i32_f32 v5
, v1 row_half_mirror
1773 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x41,0x01,0xff]
1775 v_frexp_exp_i32_f32 v5
, v1 row_shl
:1
1776 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x01,0x01,0xff]
1778 v_frexp_exp_i32_f32 v5
, v1 row_shl
:15
1779 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1781 v_frexp_exp_i32_f32 v5
, v1 row_shr
:1
1782 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x11,0x01,0xff]
1784 v_frexp_exp_i32_f32 v5
, v1 row_shr
:15
1785 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1787 v_frexp_exp_i32_f32 v5
, v1 row_ror
:1
1788 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x21,0x01,0xff]
1790 v_frexp_exp_i32_f32 v5
, v1 row_ror
:15
1791 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1793 v_frexp_exp_i32_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1794 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x50,0x01,0xff]
1796 v_frexp_exp_i32_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1797 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1799 v_frexp_exp_i32_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1800 // GFX11
: v_frexp_exp_i32_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x7e,0x0a,0x7e,0x01,0x60,0x09,0x13]
1802 v_frexp_exp_i32_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1803 // GFX11
: v_frexp_exp_i32_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x7e,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1805 v_frexp_mant_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1806 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1808 v_frexp_mant_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1809 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1811 v_frexp_mant_f16 v5.
l, v1.
l row_mirror
1812 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x40,0x01,0xff]
1814 v_frexp_mant_f16 v5.
l, v1.
l row_half_mirror
1815 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x41,0x01,0xff]
1817 v_frexp_mant_f16 v5.
l, v1.
l row_shl
:1
1818 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x01,0x01,0xff]
1820 v_frexp_mant_f16 v5.
l, v1.
l row_shl
:15
1821 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1823 v_frexp_mant_f16 v5.
l, v1.
l row_shr
:1
1824 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x11,0x01,0xff]
1826 v_frexp_mant_f16 v5.
l, v1.
l row_shr
:15
1827 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1829 v_frexp_mant_f16 v5.
l, v1.
l row_ror
:1
1830 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x21,0x01,0xff]
1832 v_frexp_mant_f16 v5.
l, v1.
l row_ror
:15
1833 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1835 v_frexp_mant_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1836 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x50,0x01,0xff]
1838 v_frexp_mant_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1839 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1841 v_frexp_mant_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
1842 // GFX11
: v_frexp_mant_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb2,0x0a,0x7e,0x01,0x60,0x09,0x13]
1844 v_frexp_mant_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
1845 // GFX11
: v_frexp_mant_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb2,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1847 v_frexp_mant_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1848 // GFX11
: v_frexp_mant_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xb2,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1850 v_frexp_mant_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1851 // GFX11
: v_frexp_mant_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xb2,0x0a,0x7f,0x81,0x60,0x09,0x13]
1853 v_frexp_mant_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1854 // GFX11
: v_frexp_mant_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xb2,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1856 v_frexp_mant_f32 v5
, v1 quad_perm
:[3,2,1,0]
1857 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1859 v_frexp_mant_f32 v5
, v1 quad_perm
:[0,1,2,3]
1860 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1862 v_frexp_mant_f32 v5
, v1 row_mirror
1863 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x40,0x01,0xff]
1865 v_frexp_mant_f32 v5
, v1 row_half_mirror
1866 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x41,0x01,0xff]
1868 v_frexp_mant_f32 v5
, v1 row_shl
:1
1869 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x01,0x01,0xff]
1871 v_frexp_mant_f32 v5
, v1 row_shl
:15
1872 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1874 v_frexp_mant_f32 v5
, v1 row_shr
:1
1875 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x11,0x01,0xff]
1877 v_frexp_mant_f32 v5
, v1 row_shr
:15
1878 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1880 v_frexp_mant_f32 v5
, v1 row_ror
:1
1881 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x21,0x01,0xff]
1883 v_frexp_mant_f32 v5
, v1 row_ror
:15
1884 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1886 v_frexp_mant_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1887 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x50,0x01,0xff]
1889 v_frexp_mant_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1890 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1892 v_frexp_mant_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1893 // GFX11
: v_frexp_mant_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x80,0x0a,0x7e,0x01,0x60,0x09,0x13]
1895 v_frexp_mant_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1896 // GFX11
: v_frexp_mant_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x80,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1898 v_log_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
1899 // GFX11
: v_log_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1901 v_log_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
1902 // GFX11
: v_log_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1904 v_log_f16 v5.
l, v1.
l row_mirror
1905 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x40,0x01,0xff]
1907 v_log_f16 v5.
l, v1.
l row_half_mirror
1908 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x41,0x01,0xff]
1910 v_log_f16 v5.
l, v1.
l row_shl
:1
1911 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x01,0x01,0xff]
1913 v_log_f16 v5.
l, v1.
l row_shl
:15
1914 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1916 v_log_f16 v5.
l, v1.
l row_shr
:1
1917 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x11,0x01,0xff]
1919 v_log_f16 v5.
l, v1.
l row_shr
:15
1920 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1922 v_log_f16 v5.
l, v1.
l row_ror
:1
1923 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x21,0x01,0xff]
1925 v_log_f16 v5.
l, v1.
l row_ror
:15
1926 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1928 v_log_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
1929 // GFX11
: v_log_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xae,0x0a,0x7e,0x01,0x50,0x01,0xff]
1931 v_log_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
1932 // GFX11
: v_log_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xae,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1934 v_log_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1935 // GFX11
: v_log_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xae,0x0a,0x7f,0x81,0x60,0x09,0x13]
1937 v_log_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1938 // GFX11
: v_log_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xae,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1940 v_log_f32 v5
, v1 quad_perm
:[3,2,1,0]
1941 // GFX11
: v_log_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1943 v_log_f32 v5
, v1 quad_perm
:[0,1,2,3]
1944 // GFX11
: v_log_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1946 v_log_f32 v5
, v1 row_mirror
1947 // GFX11
: v_log_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x40,0x01,0xff]
1949 v_log_f32 v5
, v1 row_half_mirror
1950 // GFX11
: v_log_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x41,0x01,0xff]
1952 v_log_f32 v5
, v1 row_shl
:1
1953 // GFX11
: v_log_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x01,0x01,0xff]
1955 v_log_f32 v5
, v1 row_shl
:15
1956 // GFX11
: v_log_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1958 v_log_f32 v5
, v1 row_shr
:1
1959 // GFX11
: v_log_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x11,0x01,0xff]
1961 v_log_f32 v5
, v1 row_shr
:15
1962 // GFX11
: v_log_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1964 v_log_f32 v5
, v1 row_ror
:1
1965 // GFX11
: v_log_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x21,0x01,0xff]
1967 v_log_f32 v5
, v1 row_ror
:15
1968 // GFX11
: v_log_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1970 v_log_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
1971 // GFX11
: v_log_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x50,0x01,0xff]
1973 v_log_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1974 // GFX11
: v_log_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1976 v_log_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1977 // GFX11
: v_log_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x4e,0x0a,0x7e,0x01,0x60,0x09,0x13]
1979 v_log_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1980 // GFX11
: v_log_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x4e,0xfe,0x7f,0xff,0x6f,0x35,0x30]
1982 v_mov_b32 v5
, v1 quad_perm
:[3,2,1,0]
1983 // GFX11
: v_mov_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1985 v_mov_b32 v5
, v1 quad_perm
:[0,1,2,3]
1986 // GFX11
: v_mov_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1988 v_mov_b32 v5
, v1 row_mirror
1989 // GFX11
: v_mov_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0xff]
1991 v_mov_b32 v5
, v1 row_half_mirror
1992 // GFX11
: v_mov_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0xff]
1994 v_mov_b32 v5
, v1 row_shl
:1
1995 // GFX11
: v_mov_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0xff]
1997 v_mov_b32 v5
, v1 row_shl
:15
1998 // GFX11
: v_mov_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2000 v_mov_b32 v5
, v1 row_shr
:1
2001 // GFX11
: v_mov_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0xff]
2003 v_mov_b32 v5
, v1 row_shr
:15
2004 // GFX11
: v_mov_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2006 v_mov_b32 v5
, v1 row_ror
:1
2007 // GFX11
: v_mov_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0xff]
2009 v_mov_b32 v5
, v1 row_ror
:15
2010 // GFX11
: v_mov_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2012 v_mov_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2013 // GFX11
: v_mov_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0xff]
2015 v_mov_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2016 // GFX11
: v_mov_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2018 v_mov_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2019 // GFX11
: v_mov_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x02,0x0a,0x7e,0x01,0x60,0x09,0x13]
2021 v_mov_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2022 // GFX11
: v_mov_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x02,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2024 v_movreld_b32 v5
, v1 quad_perm
:[3,2,1,0]
2025 // GFX11
: v_movreld_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2027 v_movreld_b32 v5
, v1 quad_perm
:[0,1,2,3]
2028 // GFX11
: v_movreld_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2030 v_movreld_b32 v5
, v1 row_mirror
2031 // GFX11
: v_movreld_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x40,0x01,0xff]
2033 v_movreld_b32 v5
, v1 row_half_mirror
2034 // GFX11
: v_movreld_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x41,0x01,0xff]
2036 v_movreld_b32 v5
, v1 row_shl
:1
2037 // GFX11
: v_movreld_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x01,0x01,0xff]
2039 v_movreld_b32 v5
, v1 row_shl
:15
2040 // GFX11
: v_movreld_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2042 v_movreld_b32 v5
, v1 row_shr
:1
2043 // GFX11
: v_movreld_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x11,0x01,0xff]
2045 v_movreld_b32 v5
, v1 row_shr
:15
2046 // GFX11
: v_movreld_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2048 v_movreld_b32 v5
, v1 row_ror
:1
2049 // GFX11
: v_movreld_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x21,0x01,0xff]
2051 v_movreld_b32 v5
, v1 row_ror
:15
2052 // GFX11
: v_movreld_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2054 v_movreld_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2055 // GFX11
: v_movreld_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x50,0x01,0xff]
2057 v_movreld_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2058 // GFX11
: v_movreld_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2060 v_movreld_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2061 // GFX11
: v_movreld_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x84,0x0a,0x7e,0x01,0x60,0x09,0x13]
2063 v_movreld_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2064 // GFX11
: v_movreld_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x84,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2066 v_movrels_b32 v5
, v1 quad_perm
:[3,2,1,0]
2067 // GFX11
: v_movrels_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2069 v_movrels_b32 v5
, v1 quad_perm
:[0,1,2,3]
2070 // GFX11
: v_movrels_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2072 v_movrels_b32 v5
, v1 row_mirror
2073 // GFX11
: v_movrels_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x40,0x01,0xff]
2075 v_movrels_b32 v5
, v1 row_half_mirror
2076 // GFX11
: v_movrels_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x41,0x01,0xff]
2078 v_movrels_b32 v5
, v1 row_shl
:1
2079 // GFX11
: v_movrels_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x01,0x01,0xff]
2081 v_movrels_b32 v5
, v1 row_shl
:15
2082 // GFX11
: v_movrels_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2084 v_movrels_b32 v5
, v1 row_shr
:1
2085 // GFX11
: v_movrels_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x11,0x01,0xff]
2087 v_movrels_b32 v5
, v1 row_shr
:15
2088 // GFX11
: v_movrels_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2090 v_movrels_b32 v5
, v1 row_ror
:1
2091 // GFX11
: v_movrels_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x21,0x01,0xff]
2093 v_movrels_b32 v5
, v1 row_ror
:15
2094 // GFX11
: v_movrels_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2096 v_movrels_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2097 // GFX11
: v_movrels_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x50,0x01,0xff]
2099 v_movrels_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2100 // GFX11
: v_movrels_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2102 v_movrels_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2103 // GFX11
: v_movrels_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x86,0x0a,0x7e,0x01,0x60,0x09,0x13]
2105 v_movrels_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2106 // GFX11
: v_movrels_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x86,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2108 v_movrelsd_2_b32 v5
, v1 quad_perm
:[3,2,1,0]
2109 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2111 v_movrelsd_2_b32 v5
, v1 quad_perm
:[0,1,2,3]
2112 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2114 v_movrelsd_2_b32 v5
, v1 row_mirror
2115 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x40,0x01,0xff]
2117 v_movrelsd_2_b32 v5
, v1 row_half_mirror
2118 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x41,0x01,0xff]
2120 v_movrelsd_2_b32 v5
, v1 row_shl
:1
2121 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x01,0x01,0xff]
2123 v_movrelsd_2_b32 v5
, v1 row_shl
:15
2124 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2126 v_movrelsd_2_b32 v5
, v1 row_shr
:1
2127 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x11,0x01,0xff]
2129 v_movrelsd_2_b32 v5
, v1 row_shr
:15
2130 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2132 v_movrelsd_2_b32 v5
, v1 row_ror
:1
2133 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x21,0x01,0xff]
2135 v_movrelsd_2_b32 v5
, v1 row_ror
:15
2136 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2138 v_movrelsd_2_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2139 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x50,0x01,0xff]
2141 v_movrelsd_2_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2142 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2144 v_movrelsd_2_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2145 // GFX11
: v_movrelsd_2_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x90,0x0a,0x7e,0x01,0x60,0x09,0x13]
2147 v_movrelsd_2_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2148 // GFX11
: v_movrelsd_2_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x90,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2150 v_movrelsd_b32 v5
, v1 quad_perm
:[3,2,1,0]
2151 // GFX11
: v_movrelsd_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2153 v_movrelsd_b32 v5
, v1 quad_perm
:[0,1,2,3]
2154 // GFX11
: v_movrelsd_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2156 v_movrelsd_b32 v5
, v1 row_mirror
2157 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x40,0x01,0xff]
2159 v_movrelsd_b32 v5
, v1 row_half_mirror
2160 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x41,0x01,0xff]
2162 v_movrelsd_b32 v5
, v1 row_shl
:1
2163 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x01,0x01,0xff]
2165 v_movrelsd_b32 v5
, v1 row_shl
:15
2166 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2168 v_movrelsd_b32 v5
, v1 row_shr
:1
2169 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x11,0x01,0xff]
2171 v_movrelsd_b32 v5
, v1 row_shr
:15
2172 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2174 v_movrelsd_b32 v5
, v1 row_ror
:1
2175 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x21,0x01,0xff]
2177 v_movrelsd_b32 v5
, v1 row_ror
:15
2178 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2180 v_movrelsd_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2181 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x50,0x01,0xff]
2183 v_movrelsd_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2184 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2186 v_movrelsd_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2187 // GFX11
: v_movrelsd_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x88,0x0a,0x7e,0x01,0x60,0x09,0x13]
2189 v_movrelsd_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2190 // GFX11
: v_movrelsd_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x88,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2192 v_not_b16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2193 // GFX11
: v_not_b16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2195 v_not_b16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2196 // GFX11
: v_not_b16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2198 v_not_b16 v5.
l, v1.
l row_mirror
2199 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x40,0x01,0xff]
2201 v_not_b16 v5.
l, v1.
l row_half_mirror
2202 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x41,0x01,0xff]
2204 v_not_b16 v5.
l, v1.
l row_shl
:1
2205 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x01,0x01,0xff]
2207 v_not_b16 v5.
l, v1.
l row_shl
:15
2208 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2210 v_not_b16 v5.
l, v1.
l row_shr
:1
2211 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x11,0x01,0xff]
2213 v_not_b16 v5.
l, v1.
l row_shr
:15
2214 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2216 v_not_b16 v5.
l, v1.
l row_ror
:1
2217 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x21,0x01,0xff]
2219 v_not_b16 v5.
l, v1.
l row_ror
:15
2220 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2222 v_not_b16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2223 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x50,0x01,0xff]
2225 v_not_b16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2226 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2228 v_not_b16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
2229 // GFX11
: v_not_b16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd2,0x0a,0x7e,0x01,0x60,0x09,0x13]
2231 v_not_b16 v127.
l, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
2232 // GFX11
: v_not_b16_dpp v127.
l, v127.
l row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd2,0xfe,0x7e,0x7f,0x6f,0x05,0x30]
2234 v_not_b16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2235 // GFX11
: v_not_b16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xd2,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2237 v_not_b16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2238 // GFX11
: v_not_b16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xd2,0x0a,0x7f,0x81,0x60,0x09,0x13]
2240 v_not_b16 v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2241 // GFX11
: v_not_b16_dpp v127.h
, v127.h row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xd2,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2243 v_not_b32 v5
, v1 quad_perm
:[3,2,1,0]
2244 // GFX11
: v_not_b32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2246 v_not_b32 v5
, v1 quad_perm
:[0,1,2,3]
2247 // GFX11
: v_not_b32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2249 v_not_b32 v5
, v1 row_mirror
2250 // GFX11
: v_not_b32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x40,0x01,0xff]
2252 v_not_b32 v5
, v1 row_half_mirror
2253 // GFX11
: v_not_b32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x41,0x01,0xff]
2255 v_not_b32 v5
, v1 row_shl
:1
2256 // GFX11
: v_not_b32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x01,0x01,0xff]
2258 v_not_b32 v5
, v1 row_shl
:15
2259 // GFX11
: v_not_b32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2261 v_not_b32 v5
, v1 row_shr
:1
2262 // GFX11
: v_not_b32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x11,0x01,0xff]
2264 v_not_b32 v5
, v1 row_shr
:15
2265 // GFX11
: v_not_b32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2267 v_not_b32 v5
, v1 row_ror
:1
2268 // GFX11
: v_not_b32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x21,0x01,0xff]
2270 v_not_b32 v5
, v1 row_ror
:15
2271 // GFX11
: v_not_b32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2273 v_not_b32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2274 // GFX11
: v_not_b32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x50,0x01,0xff]
2276 v_not_b32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2277 // GFX11
: v_not_b32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2279 v_not_b32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2280 // GFX11
: v_not_b32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x6e,0x0a,0x7e,0x01,0x60,0x09,0x13]
2282 v_not_b32 v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2283 // GFX11
: v_not_b32_dpp v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x6e,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2285 v_rcp_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2286 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2288 v_rcp_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2289 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2291 v_rcp_f16 v5.
l, v1.
l row_mirror
2292 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x40,0x01,0xff]
2294 v_rcp_f16 v5.
l, v1.
l row_half_mirror
2295 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x41,0x01,0xff]
2297 v_rcp_f16 v5.
l, v1.
l row_shl
:1
2298 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x01,0x01,0xff]
2300 v_rcp_f16 v5.
l, v1.
l row_shl
:15
2301 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2303 v_rcp_f16 v5.
l, v1.
l row_shr
:1
2304 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x11,0x01,0xff]
2306 v_rcp_f16 v5.
l, v1.
l row_shr
:15
2307 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2309 v_rcp_f16 v5.
l, v1.
l row_ror
:1
2310 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x21,0x01,0xff]
2312 v_rcp_f16 v5.
l, v1.
l row_ror
:15
2313 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2315 v_rcp_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2316 // GFX11
: v_rcp_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xa8,0x0a,0x7e,0x01,0x50,0x01,0xff]
2318 v_rcp_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2319 // GFX11
: v_rcp_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xa8,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2321 v_rcp_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2322 // GFX11
: v_rcp_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xa8,0x0a,0x7f,0x81,0x60,0x09,0x13]
2324 v_rcp_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2325 // GFX11
: v_rcp_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xa8,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2327 v_rcp_f32 v5
, v1 quad_perm
:[3,2,1,0]
2328 // GFX11
: v_rcp_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2330 v_rcp_f32 v5
, v1 quad_perm
:[0,1,2,3]
2331 // GFX11
: v_rcp_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2333 v_rcp_f32 v5
, v1 row_mirror
2334 // GFX11
: v_rcp_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x40,0x01,0xff]
2336 v_rcp_f32 v5
, v1 row_half_mirror
2337 // GFX11
: v_rcp_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x41,0x01,0xff]
2339 v_rcp_f32 v5
, v1 row_shl
:1
2340 // GFX11
: v_rcp_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x01,0x01,0xff]
2342 v_rcp_f32 v5
, v1 row_shl
:15
2343 // GFX11
: v_rcp_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2345 v_rcp_f32 v5
, v1 row_shr
:1
2346 // GFX11
: v_rcp_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x11,0x01,0xff]
2348 v_rcp_f32 v5
, v1 row_shr
:15
2349 // GFX11
: v_rcp_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2351 v_rcp_f32 v5
, v1 row_ror
:1
2352 // GFX11
: v_rcp_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x21,0x01,0xff]
2354 v_rcp_f32 v5
, v1 row_ror
:15
2355 // GFX11
: v_rcp_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2357 v_rcp_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2358 // GFX11
: v_rcp_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x50,0x01,0xff]
2360 v_rcp_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2361 // GFX11
: v_rcp_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2363 v_rcp_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2364 // GFX11
: v_rcp_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x54,0x0a,0x7e,0x01,0x60,0x09,0x13]
2366 v_rcp_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2367 // GFX11
: v_rcp_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x54,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2369 v_rcp_iflag_f32 v5
, v1 quad_perm
:[3,2,1,0]
2370 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2372 v_rcp_iflag_f32 v5
, v1 quad_perm
:[0,1,2,3]
2373 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2375 v_rcp_iflag_f32 v5
, v1 row_mirror
2376 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x40,0x01,0xff]
2378 v_rcp_iflag_f32 v5
, v1 row_half_mirror
2379 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x41,0x01,0xff]
2381 v_rcp_iflag_f32 v5
, v1 row_shl
:1
2382 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x01,0x01,0xff]
2384 v_rcp_iflag_f32 v5
, v1 row_shl
:15
2385 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2387 v_rcp_iflag_f32 v5
, v1 row_shr
:1
2388 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x11,0x01,0xff]
2390 v_rcp_iflag_f32 v5
, v1 row_shr
:15
2391 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2393 v_rcp_iflag_f32 v5
, v1 row_ror
:1
2394 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x21,0x01,0xff]
2396 v_rcp_iflag_f32 v5
, v1 row_ror
:15
2397 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2399 v_rcp_iflag_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2400 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x50,0x01,0xff]
2402 v_rcp_iflag_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2403 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2405 v_rcp_iflag_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2406 // GFX11
: v_rcp_iflag_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x56,0x0a,0x7e,0x01,0x60,0x09,0x13]
2408 v_rcp_iflag_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2409 // GFX11
: v_rcp_iflag_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x56,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2411 v_rndne_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2412 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2414 v_rndne_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2415 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2417 v_rndne_f16 v5.
l, v1.
l row_mirror
2418 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x40,0x01,0xff]
2420 v_rndne_f16 v5.
l, v1.
l row_half_mirror
2421 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x41,0x01,0xff]
2423 v_rndne_f16 v5.
l, v1.
l row_shl
:1
2424 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x01,0x01,0xff]
2426 v_rndne_f16 v5.
l, v1.
l row_shl
:15
2427 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2429 v_rndne_f16 v5.
l, v1.
l row_shr
:1
2430 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x11,0x01,0xff]
2432 v_rndne_f16 v5.
l, v1.
l row_shr
:15
2433 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2435 v_rndne_f16 v5.
l, v1.
l row_ror
:1
2436 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x21,0x01,0xff]
2438 v_rndne_f16 v5.
l, v1.
l row_ror
:15
2439 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2441 v_rndne_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2442 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x50,0x01,0xff]
2444 v_rndne_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2445 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2447 v_rndne_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
2448 // GFX11
: v_rndne_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xbc,0x0a,0x7e,0x01,0x60,0x09,0x13]
2450 v_rndne_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
2451 // GFX11
: v_rndne_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xbc,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
2453 v_rndne_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2454 // GFX11
: v_rndne_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xbc,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2456 v_rndne_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2457 // GFX11
: v_rndne_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xbc,0x0a,0x7f,0x81,0x60,0x09,0x13]
2459 v_rndne_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2460 // GFX11
: v_rndne_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xbc,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2462 v_rndne_f32 v5
, v1 quad_perm
:[3,2,1,0]
2463 // GFX11
: v_rndne_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2465 v_rndne_f32 v5
, v1 quad_perm
:[0,1,2,3]
2466 // GFX11
: v_rndne_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2468 v_rndne_f32 v5
, v1 row_mirror
2469 // GFX11
: v_rndne_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x40,0x01,0xff]
2471 v_rndne_f32 v5
, v1 row_half_mirror
2472 // GFX11
: v_rndne_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x41,0x01,0xff]
2474 v_rndne_f32 v5
, v1 row_shl
:1
2475 // GFX11
: v_rndne_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x01,0x01,0xff]
2477 v_rndne_f32 v5
, v1 row_shl
:15
2478 // GFX11
: v_rndne_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2480 v_rndne_f32 v5
, v1 row_shr
:1
2481 // GFX11
: v_rndne_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x11,0x01,0xff]
2483 v_rndne_f32 v5
, v1 row_shr
:15
2484 // GFX11
: v_rndne_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2486 v_rndne_f32 v5
, v1 row_ror
:1
2487 // GFX11
: v_rndne_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x21,0x01,0xff]
2489 v_rndne_f32 v5
, v1 row_ror
:15
2490 // GFX11
: v_rndne_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2492 v_rndne_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2493 // GFX11
: v_rndne_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x50,0x01,0xff]
2495 v_rndne_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2496 // GFX11
: v_rndne_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2498 v_rndne_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2499 // GFX11
: v_rndne_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x46,0x0a,0x7e,0x01,0x60,0x09,0x13]
2501 v_rndne_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2502 // GFX11
: v_rndne_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x46,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2504 v_rsq_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2505 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2507 v_rsq_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2508 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2510 v_rsq_f16 v5.
l, v1.
l row_mirror
2511 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x40,0x01,0xff]
2513 v_rsq_f16 v5.
l, v1.
l row_half_mirror
2514 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x41,0x01,0xff]
2516 v_rsq_f16 v5.
l, v1.
l row_shl
:1
2517 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x01,0x01,0xff]
2519 v_rsq_f16 v5.
l, v1.
l row_shl
:15
2520 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2522 v_rsq_f16 v5.
l, v1.
l row_shr
:1
2523 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x11,0x01,0xff]
2525 v_rsq_f16 v5.
l, v1.
l row_shr
:15
2526 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2528 v_rsq_f16 v5.
l, v1.
l row_ror
:1
2529 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x21,0x01,0xff]
2531 v_rsq_f16 v5.
l, v1.
l row_ror
:15
2532 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2534 v_rsq_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2535 // GFX11
: v_rsq_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xac,0x0a,0x7e,0x01,0x50,0x01,0xff]
2537 v_rsq_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2538 // GFX11
: v_rsq_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xac,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2540 v_rsq_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2541 // GFX11
: v_rsq_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xac,0x0a,0x7f,0x81,0x60,0x09,0x13]
2543 v_rsq_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2544 // GFX11
: v_rsq_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xac,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2546 v_rsq_f32 v5
, v1 quad_perm
:[3,2,1,0]
2547 // GFX11
: v_rsq_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2549 v_rsq_f32 v5
, v1 quad_perm
:[0,1,2,3]
2550 // GFX11
: v_rsq_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2552 v_rsq_f32 v5
, v1 row_mirror
2553 // GFX11
: v_rsq_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x40,0x01,0xff]
2555 v_rsq_f32 v5
, v1 row_half_mirror
2556 // GFX11
: v_rsq_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x41,0x01,0xff]
2558 v_rsq_f32 v5
, v1 row_shl
:1
2559 // GFX11
: v_rsq_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x01,0x01,0xff]
2561 v_rsq_f32 v5
, v1 row_shl
:15
2562 // GFX11
: v_rsq_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2564 v_rsq_f32 v5
, v1 row_shr
:1
2565 // GFX11
: v_rsq_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x11,0x01,0xff]
2567 v_rsq_f32 v5
, v1 row_shr
:15
2568 // GFX11
: v_rsq_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2570 v_rsq_f32 v5
, v1 row_ror
:1
2571 // GFX11
: v_rsq_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x21,0x01,0xff]
2573 v_rsq_f32 v5
, v1 row_ror
:15
2574 // GFX11
: v_rsq_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2576 v_rsq_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2577 // GFX11
: v_rsq_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x50,0x01,0xff]
2579 v_rsq_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2580 // GFX11
: v_rsq_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2582 v_rsq_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2583 // GFX11
: v_rsq_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x5c,0x0a,0x7e,0x01,0x60,0x09,0x13]
2585 v_rsq_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2586 // GFX11
: v_rsq_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x5c,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2588 v_sat_pk_u8_i16 v5.
l, v1 quad_perm
:[3,2,1,0]
2589 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2591 v_sat_pk_u8_i16 v5.
l, v1 quad_perm
:[0,1,2,3]
2592 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2594 v_sat_pk_u8_i16 v5.
l, v1 row_mirror
2595 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x40,0x01,0xff]
2597 v_sat_pk_u8_i16 v5.
l, v1 row_half_mirror
2598 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x41,0x01,0xff]
2600 v_sat_pk_u8_i16 v5.
l, v1 row_shl
:1
2601 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x01,0x01,0xff]
2603 v_sat_pk_u8_i16 v5.
l, v1 row_shl
:15
2604 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2606 v_sat_pk_u8_i16 v5.
l, v1 row_shr
:1
2607 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x11,0x01,0xff]
2609 v_sat_pk_u8_i16 v5.
l, v1 row_shr
:15
2610 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2612 v_sat_pk_u8_i16 v5.
l, v1 row_ror
:1
2613 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x21,0x01,0xff]
2615 v_sat_pk_u8_i16 v5.
l, v1 row_ror
:15
2616 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2618 v_sat_pk_u8_i16 v5.
l, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2619 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x50,0x01,0xff]
2621 v_sat_pk_u8_i16 v5.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2622 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2624 v_sat_pk_u8_i16 v5.
l, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
2625 // GFX11
: v_sat_pk_u8_i16_dpp v5.
l, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc4,0x0a,0x7e,0x01,0x60,0x09,0x13]
2627 v_sat_pk_u8_i16 v127.
l, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
2628 // GFX11
: v_sat_pk_u8_i16_dpp v127.
l, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc4,0xfe,0x7e,0xff,0x6f,0x05,0x30]
2630 v_sat_pk_u8_i16 v127.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2631 // GFX11
: v_sat_pk_u8_i16_dpp v127.
l, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc4,0xfe,0x7e,0x01,0x5f,0x01,0x01]
2633 v_sat_pk_u8_i16 v5.h
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2634 // GFX11
: v_sat_pk_u8_i16_dpp v5.h
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc4,0x0a,0x7f,0x01,0x60,0x09,0x13]
2636 v_sat_pk_u8_i16 v127.h
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2637 // GFX11
: v_sat_pk_u8_i16_dpp v127.h
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc4,0xfe,0x7f,0xff,0x6f,0x05,0x30]
2639 v_sin_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2640 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2642 v_sin_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2643 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2645 v_sin_f16 v5.
l, v1.
l row_mirror
2646 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x40,0x01,0xff]
2648 v_sin_f16 v5.
l, v1.
l row_half_mirror
2649 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x41,0x01,0xff]
2651 v_sin_f16 v5.
l, v1.
l row_shl
:1
2652 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x01,0x01,0xff]
2654 v_sin_f16 v5.
l, v1.
l row_shl
:15
2655 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2657 v_sin_f16 v5.
l, v1.
l row_shr
:1
2658 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x11,0x01,0xff]
2660 v_sin_f16 v5.
l, v1.
l row_shr
:15
2661 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2663 v_sin_f16 v5.
l, v1.
l row_ror
:1
2664 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x21,0x01,0xff]
2666 v_sin_f16 v5.
l, v1.
l row_ror
:15
2667 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2669 v_sin_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2670 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x50,0x01,0xff]
2672 v_sin_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2673 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2675 v_sin_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
2676 // GFX11
: v_sin_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc0,0x0a,0x7e,0x01,0x60,0x09,0x13]
2678 v_sin_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
2679 // GFX11
: v_sin_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc0,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
2681 v_sin_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2682 // GFX11
: v_sin_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xc0,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2684 v_sin_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2685 // GFX11
: v_sin_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xc0,0x0a,0x7f,0x81,0x60,0x09,0x13]
2687 v_sin_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2688 // GFX11
: v_sin_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xc0,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2690 v_sin_f32 v5
, v1 quad_perm
:[3,2,1,0]
2691 // GFX11
: v_sin_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2693 v_sin_f32 v5
, v1 quad_perm
:[0,1,2,3]
2694 // GFX11
: v_sin_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2696 v_sin_f32 v5
, v1 row_mirror
2697 // GFX11
: v_sin_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x40,0x01,0xff]
2699 v_sin_f32 v5
, v1 row_half_mirror
2700 // GFX11
: v_sin_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x41,0x01,0xff]
2702 v_sin_f32 v5
, v1 row_shl
:1
2703 // GFX11
: v_sin_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x01,0x01,0xff]
2705 v_sin_f32 v5
, v1 row_shl
:15
2706 // GFX11
: v_sin_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2708 v_sin_f32 v5
, v1 row_shr
:1
2709 // GFX11
: v_sin_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x11,0x01,0xff]
2711 v_sin_f32 v5
, v1 row_shr
:15
2712 // GFX11
: v_sin_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2714 v_sin_f32 v5
, v1 row_ror
:1
2715 // GFX11
: v_sin_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x21,0x01,0xff]
2717 v_sin_f32 v5
, v1 row_ror
:15
2718 // GFX11
: v_sin_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2720 v_sin_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2721 // GFX11
: v_sin_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x50,0x01,0xff]
2723 v_sin_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2724 // GFX11
: v_sin_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2726 v_sin_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2727 // GFX11
: v_sin_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x6a,0x0a,0x7e,0x01,0x60,0x09,0x13]
2729 v_sin_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2730 // GFX11
: v_sin_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x6a,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2732 v_sqrt_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2733 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2735 v_sqrt_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2736 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2738 v_sqrt_f16 v5.
l, v1.
l row_mirror
2739 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x40,0x01,0xff]
2741 v_sqrt_f16 v5.
l, v1.
l row_half_mirror
2742 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x41,0x01,0xff]
2744 v_sqrt_f16 v5.
l, v1.
l row_shl
:1
2745 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x01,0x01,0xff]
2747 v_sqrt_f16 v5.
l, v1.
l row_shl
:15
2748 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2750 v_sqrt_f16 v5.
l, v1.
l row_shr
:1
2751 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x11,0x01,0xff]
2753 v_sqrt_f16 v5.
l, v1.
l row_shr
:15
2754 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2756 v_sqrt_f16 v5.
l, v1.
l row_ror
:1
2757 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x21,0x01,0xff]
2759 v_sqrt_f16 v5.
l, v1.
l row_ror
:15
2760 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2762 v_sqrt_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2763 // GFX11
: v_sqrt_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xaa,0x0a,0x7e,0x01,0x50,0x01,0xff]
2765 v_sqrt_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2766 // GFX11
: v_sqrt_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xaa,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2768 v_sqrt_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2769 // GFX11
: v_sqrt_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xaa,0x0a,0x7f,0x81,0x60,0x09,0x13]
2771 v_sqrt_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2772 // GFX11
: v_sqrt_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xaa,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2774 v_sqrt_f32 v5
, v1 quad_perm
:[3,2,1,0]
2775 // GFX11
: v_sqrt_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2777 v_sqrt_f32 v5
, v1 quad_perm
:[0,1,2,3]
2778 // GFX11
: v_sqrt_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2780 v_sqrt_f32 v5
, v1 row_mirror
2781 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x40,0x01,0xff]
2783 v_sqrt_f32 v5
, v1 row_half_mirror
2784 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x41,0x01,0xff]
2786 v_sqrt_f32 v5
, v1 row_shl
:1
2787 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x01,0x01,0xff]
2789 v_sqrt_f32 v5
, v1 row_shl
:15
2790 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2792 v_sqrt_f32 v5
, v1 row_shr
:1
2793 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x11,0x01,0xff]
2795 v_sqrt_f32 v5
, v1 row_shr
:15
2796 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2798 v_sqrt_f32 v5
, v1 row_ror
:1
2799 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x21,0x01,0xff]
2801 v_sqrt_f32 v5
, v1 row_ror
:15
2802 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2804 v_sqrt_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2805 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x50,0x01,0xff]
2807 v_sqrt_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2808 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2810 v_sqrt_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2811 // GFX11
: v_sqrt_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x66,0x0a,0x7e,0x01,0x60,0x09,0x13]
2813 v_sqrt_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2814 // GFX11
: v_sqrt_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x66,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2816 v_trunc_f16 v5.
l, v1.
l quad_perm
:[3,2,1,0]
2817 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2819 v_trunc_f16 v5.
l, v1.
l quad_perm
:[0,1,2,3]
2820 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2822 v_trunc_f16 v5.
l, v1.
l row_mirror
2823 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x40,0x01,0xff]
2825 v_trunc_f16 v5.
l, v1.
l row_half_mirror
2826 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x41,0x01,0xff]
2828 v_trunc_f16 v5.
l, v1.
l row_shl
:1
2829 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x01,0x01,0xff]
2831 v_trunc_f16 v5.
l, v1.
l row_shl
:15
2832 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2834 v_trunc_f16 v5.
l, v1.
l row_shr
:1
2835 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x11,0x01,0xff]
2837 v_trunc_f16 v5.
l, v1.
l row_shr
:15
2838 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2840 v_trunc_f16 v5.
l, v1.
l row_ror
:1
2841 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x21,0x01,0xff]
2843 v_trunc_f16 v5.
l, v1.
l row_ror
:15
2844 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2846 v_trunc_f16 v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf
2847 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x50,0x01,0xff]
2849 v_trunc_f16 v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2850 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2852 v_trunc_f16 v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1
2853 // GFX11
: v_trunc_f16_dpp v5.
l, v1.
l row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xba,0x0a,0x7e,0x01,0x60,0x09,0x13]
2855 v_trunc_f16 v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1
2856 // GFX11
: v_trunc_f16_dpp v127.
l, -|v127.
l| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xba,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
2858 v_trunc_f16 v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1
2859 // GFX11
: v_trunc_f16_dpp v127.
l, v127.
l row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0xba,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
2861 v_trunc_f16 v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2862 // GFX11
: v_trunc_f16_dpp v5.h
, v1.h row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0xba,0x0a,0x7f,0x81,0x60,0x09,0x13]
2864 v_trunc_f16 v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2865 // GFX11
: v_trunc_f16_dpp v127.h
, -|v127.h| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0xba,0xfe,0x7f,0xff,0x6f,0x35,0x30]
2867 v_trunc_f32 v5
, v1 quad_perm
:[3,2,1,0]
2868 // GFX11
: v_trunc_f32_dpp v5
, v1 quad_perm
:[3,2,1,0] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0xff]
2870 v_trunc_f32 v5
, v1 quad_perm
:[0,1,2,3]
2871 // GFX11
: v_trunc_f32_dpp v5
, v1 quad_perm
:[0,1,2,3] row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0xff]
2873 v_trunc_f32 v5
, v1 row_mirror
2874 // GFX11
: v_trunc_f32_dpp v5
, v1 row_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x40,0x01,0xff]
2876 v_trunc_f32 v5
, v1 row_half_mirror
2877 // GFX11
: v_trunc_f32_dpp v5
, v1 row_half_mirror row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x41,0x01,0xff]
2879 v_trunc_f32 v5
, v1 row_shl
:1
2880 // GFX11
: v_trunc_f32_dpp v5
, v1 row_shl
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x01,0x01,0xff]
2882 v_trunc_f32 v5
, v1 row_shl
:15
2883 // GFX11
: v_trunc_f32_dpp v5
, v1 row_shl
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x0f,0x01,0xff]
2885 v_trunc_f32 v5
, v1 row_shr
:1
2886 // GFX11
: v_trunc_f32_dpp v5
, v1 row_shr
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x11,0x01,0xff]
2888 v_trunc_f32 v5
, v1 row_shr
:15
2889 // GFX11
: v_trunc_f32_dpp v5
, v1 row_shr
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x1f,0x01,0xff]
2891 v_trunc_f32 v5
, v1 row_ror
:1
2892 // GFX11
: v_trunc_f32_dpp v5
, v1 row_ror
:1 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x21,0x01,0xff]
2894 v_trunc_f32 v5
, v1 row_ror
:15
2895 // GFX11
: v_trunc_f32_dpp v5
, v1 row_ror
:15 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x2f,0x01,0xff]
2897 v_trunc_f32 v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf
2898 // GFX11
: v_trunc_f32_dpp v5
, v1 row_share
:0 row_mask
:0xf bank_mask
:0xf ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x50,0x01,0xff]
2900 v_trunc_f32 v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2901 // GFX11
: v_trunc_f32_dpp v5
, v1 row_share
:15 row_mask
:0x0 bank_mask
:0x1 ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x5f,0x01,0x01]
2903 v_trunc_f32 v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2904 // GFX11
: v_trunc_f32_dpp v5
, v1 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 ; encoding
: [0xfa,0x42,0x0a,0x7e,0x01,0x60,0x09,0x13]
2906 v_trunc_f32 v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2907 // GFX11
: v_trunc_f32_dpp v255
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 fi
:1 ; encoding
: [0xfa,0x42,0xfe,0x7f,0xff,0x6f,0x35,0x30]