1 // RUN
: not llvm-mc
-triple
=amdgcn
-mcpu
=gfx1200
%s
2>&1 | FileCheck
--check-prefix
=GFX12
--implicit-check-
not=error
: %s
3 // check for error with sgpr
or imm operands
5 v_dot4_f32_fp8_bf8 v0
, v1
, v2
, v3 dpp8
:[0,1,2,3,4,5,6,7] row_mask
:0x1
6 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
8 v_dot4_f32_fp8_bf8 v0
, s0
, v2
, v3 dpp8
:[0,1,2,3,4,5,6,7]
9 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
11 v_dot4_f32_bf8_fp8 v0
, v1
, s0
, v3 dpp8
:[0,1,2,3,4,5,6,7]
12 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
14 v_dot4_f32_bf8_fp8 v0
, v1
, v2
, s0 dpp8
:[0,1,2,3,4,5,6,7]
15 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
17 v_dot4_f32_fp8_fp8 v0
, 1.0, v2
, v3 dpp8
:[0,1,2,3,4,5,6,7]
18 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
20 v_dot4_f32_fp8_fp8 v0
, v1
, 1.0, v3 dpp8
:[0,1,2,3,4,5,6,7]
21 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
23 v_dot4_f32_bf8_bf8 v0
, v1
, v2
, 1.0 dpp8
:[0,1,2,3,4,5,6,7]
24 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
26 v_dot4_f32_bf8_bf8 v0
, v1
, v2
, 1 dpp8
:[0,1,2,3,4,5,6,7]
27 // GFX12
: :[[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction