llvm/test/MC/AMDGPU/hsa-gfx12-v4.s

   1 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck --check-prefix=ASM %s
   2 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1200 -filetype=obj < %s > %t
   3 // RUN: llvm-readelf -S -r -s %t | FileCheck --check-prefix=READOBJ %s
   4 // RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
   5
   6 // READOBJ: Section Headers
   7 // READOBJ: .text   PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
   8 // READOBJ: .rodata PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}}        000100 {{[0-9]+}}  A {{[0-9]+}} {{[0-9]+}} 64
   9
  10 // READOBJ: Relocation section '.rela.rodata' at offset
  11 // READOBJ: 0000000000000010 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 10
  12 // READOBJ: 0000000000000050 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 110
  13 // READOBJ: 0000000000000090 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 210
  14 // READOBJ: 00000000000000d0 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 310
  15
  16 // READOBJ: Symbol table '.symtab' contains {{[0-9]+}} entries:
  17 // READOBJ:      0000000000000000  0 FUNC    LOCAL  PROTECTED 2 minimal
  18 // READOBJ-NEXT: 0000000000000100  0 FUNC    LOCAL  PROTECTED 2 complete
  19 // READOBJ-NEXT: 0000000000000200  0 FUNC    LOCAL  PROTECTED 2 special_sgpr
  20 // READOBJ-NEXT: 0000000000000300  0 FUNC    LOCAL  PROTECTED 2 disabled_user_sgpr
  21 // READOBJ-NEXT: 0000000000000000 64 OBJECT  LOCAL  DEFAULT   3 minimal.kd
  22 // READOBJ-NEXT: 0000000000000040 64 OBJECT  LOCAL  DEFAULT   3 complete.kd
  23 // READOBJ-NEXT: 0000000000000080 64 OBJECT  LOCAL  DEFAULT   3 special_sgpr.kd
  24 // READOBJ-NEXT: 00000000000000c0 64 OBJECT  LOCAL  DEFAULT   3 disabled_user_sgpr.kd
  25
  26 // OBJDUMP: Contents of section .rodata
  27 // Note, relocation for KERNEL_CODE_ENTRY_BYTE_OFFSET is not resolved here.
  28 // minimal
  29 // OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
  30 // OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
  31 // OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
  32 // OBJDUMP-NEXT: 0030 00000c60 80000000 00040000 00000000
  33 // complete
  34 // OBJDUMP-NEXT: 0040 01000000 01000000 08000000 00000000
  35 // OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
  36 // OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00000000
  37 // OBJDUMP-NEXT: 0070 015021e4 1f0f007f 5e040000 00000000
  38 // special_sgpr
  39 // OBJDUMP-NEXT: 0080 00000000 00000000 00000000 00000000
  40 // OBJDUMP-NEXT: 0090 00000000 00000000 00000000 00000000
  41 // OBJDUMP-NEXT: 00a0 00000000 00000000 00000000 00000000
  42 // OBJDUMP-NEXT: 00b0 00000060 80000000 00040000 00000000
  43 // disabled_user_sgpr
  44 // OBJDUMP-NEXT: 00c0 00000000 00000000 00000000 00000000
  45 // OBJDUMP-NEXT: 00d0 00000000 00000000 00000000 00000000
  46 // OBJDUMP-NEXT: 00e0 00000000 00000000 00000000 00000000
  47 // OBJDUMP-NEXT: 00f0 00000c60 80000000 00040000 00000000
  48
  49 .text
  50
  51 .amdgcn_target "amdgcn-amd-amdhsa--gfx1200"
  52 // ASM: .amdgcn_target "amdgcn-amd-amdhsa--gfx1200"
  53
  54 .amdhsa_code_object_version 4
  55 // ASM: .amdhsa_code_object_version 4
  56
  57 .p2align 8
  58 .type minimal,@function
  59 minimal:
  60   s_endpgm
  61
  62 .p2align 8
  63 .type complete,@function
  64 complete:
  65   s_endpgm
  66
  67 .p2align 8
  68 .type special_sgpr,@function
  69 special_sgpr:
  70   s_endpgm
  71
  72 .p2align 8
  73 .type disabled_user_sgpr,@function
  74 disabled_user_sgpr:
  75   s_endpgm
  76
  77 .rodata
  78 // ASM: .rodata
  79
  80 // Test that only specifying required directives is allowed, and that defaulted
  81 // values are omitted.
  82 .p2align 6
  83 .amdhsa_kernel minimal
  84   .amdhsa_next_free_vgpr 0
  85   .amdhsa_next_free_sgpr 0
  86 .end_amdhsa_kernel
  87
  88 // ASM: .amdhsa_kernel minimal
  89 // ASM: .amdhsa_next_free_vgpr 0
  90 // ASM-NEXT: .amdhsa_next_free_sgpr 0
  91 // ASM: .end_amdhsa_kernel
  92
  93 // Test that we can specify all available directives with non-default values.
  94 .p2align 6
  95 .amdhsa_kernel complete
  96   .amdhsa_group_segment_fixed_size 1
  97   .amdhsa_private_segment_fixed_size 1
  98   .amdhsa_kernarg_size 8
  99   .amdhsa_user_sgpr_count 15
 100   .amdhsa_user_sgpr_dispatch_ptr 1
 101   .amdhsa_user_sgpr_queue_ptr 1
 102   .amdhsa_user_sgpr_kernarg_segment_ptr 1
 103   .amdhsa_user_sgpr_dispatch_id 1
 104   .amdhsa_user_sgpr_private_segment_size 1
 105   .amdhsa_wavefront_size32 1
 106   .amdhsa_enable_private_segment 1
 107   .amdhsa_system_sgpr_workgroup_id_x 0
 108   .amdhsa_system_sgpr_workgroup_id_y 1
 109   .amdhsa_system_sgpr_workgroup_id_z 1
 110   .amdhsa_system_sgpr_workgroup_info 1
 111   .amdhsa_system_vgpr_workitem_id 1
 112   .amdhsa_next_free_vgpr 9
 113   .amdhsa_next_free_sgpr 27
 114   .amdhsa_reserve_vcc 0
 115   .amdhsa_float_round_mode_32 1
 116   .amdhsa_float_round_mode_16_64 1
 117   .amdhsa_float_denorm_mode_32 1
 118   .amdhsa_float_denorm_mode_16_64 0
 119   .amdhsa_fp16_overflow 1
 120   .amdhsa_workgroup_processor_mode 1
 121   .amdhsa_memory_ordered 1
 122   .amdhsa_forward_progress 1
 123   .amdhsa_round_robin_scheduling 1
 124   .amdhsa_exception_fp_ieee_invalid_op 1
 125   .amdhsa_exception_fp_denorm_src 1
 126   .amdhsa_exception_fp_ieee_div_zero 1
 127   .amdhsa_exception_fp_ieee_overflow 1
 128   .amdhsa_exception_fp_ieee_underflow 1
 129   .amdhsa_exception_fp_ieee_inexact 1
 130   .amdhsa_exception_int_div_zero 1
 131 .end_amdhsa_kernel
 132
 133 // ASM: .amdhsa_kernel complete
 134 // ASM-NEXT: .amdhsa_group_segment_fixed_size 1
 135 // ASM-NEXT: .amdhsa_private_segment_fixed_size 1
 136 // ASM-NEXT: .amdhsa_kernarg_size 8
 137 // ASM-NEXT: .amdhsa_user_sgpr_count 15
 138 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
 139 // ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 1
 140 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 141 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 1
 142 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 1
 143 // ASM-NEXT: .amdhsa_wavefront_size32 1
 144 // ASM-NEXT: .amdhsa_enable_private_segment 1
 145 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 0
 146 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
 147 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
 148 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
 149 // ASM-NEXT: .amdhsa_system_vgpr_workitem_id 1
 150 // ASM-NEXT: .amdhsa_next_free_vgpr 9
 151 // ASM-NEXT: .amdhsa_next_free_sgpr 27
 152 // ASM-NEXT: .amdhsa_reserve_vcc 0
 153 // ASM-NEXT: .amdhsa_float_round_mode_32 1
 154 // ASM-NEXT: .amdhsa_float_round_mode_16_64 1
 155 // ASM-NEXT: .amdhsa_float_denorm_mode_32 1
 156 // ASM-NEXT: .amdhsa_float_denorm_mode_16_64 0
 157 // ASM-NEXT: .amdhsa_fp16_overflow 1
 158 // ASM-NEXT: .amdhsa_workgroup_processor_mode 1
 159 // ASM-NEXT: .amdhsa_memory_ordered 1
 160 // ASM-NEXT: .amdhsa_forward_progress 1
 161 // ASM-NEXT: .amdhsa_round_robin_scheduling 1
 162 // ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
 163 // ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
 164 // ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
 165 // ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
 166 // ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
 167 // ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
 168 // ASM-NEXT: .amdhsa_exception_int_div_zero 1
 169 // ASM-NEXT: .end_amdhsa_kernel
 170
 171 // Test that we are including special SGPR usage in the granulated count.
 172 .p2align 6
 173 .amdhsa_kernel special_sgpr
 174   .amdhsa_next_free_sgpr 27
 175
 176   .amdhsa_reserve_vcc 0
 177
 178   .amdhsa_float_denorm_mode_16_64 0
 179   .amdhsa_next_free_vgpr 0
 180 .end_amdhsa_kernel
 181
 182 // ASM: .amdhsa_kernel special_sgpr
 183 // ASM: .amdhsa_next_free_vgpr 0
 184 // ASM-NEXT: .amdhsa_next_free_sgpr 27
 185 // ASM-NEXT: .amdhsa_reserve_vcc 0
 186 // ASM: .amdhsa_float_denorm_mode_16_64 0
 187 // ASM: .end_amdhsa_kernel
 188
 189 // Test that explicitly disabling user_sgpr's does not affect the user_sgpr
 190 // count, i.e. this should produce the same descriptor as minimal.
 191 .p2align 6
 192 .amdhsa_kernel disabled_user_sgpr
 193   .amdhsa_next_free_vgpr 0
 194   .amdhsa_next_free_sgpr 0
 195 .end_amdhsa_kernel
 196
 197 // ASM: .amdhsa_kernel disabled_user_sgpr
 198 // ASM: .amdhsa_next_free_vgpr 0
 199 // ASM-NEXT: .amdhsa_next_free_sgpr 0
 200 // ASM: .end_amdhsa_kernel
 201
 202 .section .foo
 203
 204 .byte .amdgcn.gfx_generation_number
 205 // ASM: .byte 12
 206
 207 .byte .amdgcn.gfx_generation_minor
 208 // ASM: .byte 0
 209
 210 .byte .amdgcn.gfx_generation_stepping
 211 // ASM: .byte 0
 212
 213 .byte .amdgcn.next_free_vgpr
 214 // ASM: .byte 0
 215 .byte .amdgcn.next_free_sgpr
 216 // ASM: .byte 0
 217
 218 v_mov_b32_e32 v7, s10
 219
 220 .byte .amdgcn.next_free_vgpr
 221 // ASM: .byte 8
 222 .byte .amdgcn.next_free_sgpr
 223 // ASM: .byte 11
 224
 225 .set .amdgcn.next_free_vgpr, 0
 226 .set .amdgcn.next_free_sgpr, 0
 227
 228 .byte .amdgcn.next_free_vgpr
 229 // ASM: .byte 0
 230 .byte .amdgcn.next_free_sgpr
 231 // ASM: .byte 0
 232
 233 v_mov_b32_e32 v16, s3
 234
 235 .byte .amdgcn.next_free_vgpr
 236 // ASM: .byte 17
 237 .byte .amdgcn.next_free_sgpr
 238 // ASM: .byte 4
 239
 240 // Metadata
 241
 242 .amdgpu_metadata
 243   amdhsa.version:
 244     - 3
 245     - 0
 246   amdhsa.kernels:
 247     - .name:       amd_kernel_code_t_test_all
 248       .symbol: amd_kernel_code_t_test_all@kd
 249       .kernarg_segment_size: 8
 250       .group_segment_fixed_size: 16
 251       .private_segment_fixed_size: 32
 252       .kernarg_segment_align: 64
 253       .wavefront_size: 128
 254       .sgpr_count: 14
 255       .vgpr_count: 40
 256       .max_flat_workgroup_size: 256
 257     - .name:       amd_kernel_code_t_minimal
 258       .symbol: amd_kernel_code_t_minimal@kd
 259       .kernarg_segment_size: 8
 260       .group_segment_fixed_size: 16
 261       .private_segment_fixed_size: 32
 262       .kernarg_segment_align: 64
 263       .wavefront_size: 128
 264       .sgpr_count: 14
 265       .vgpr_count: 40
 266       .max_flat_workgroup_size: 256
 267 .end_amdgpu_metadata
 268
 269 // ASM:         .amdgpu_metadata
 270 // ASM:      amdhsa.kernels:
 271 // ASM:        - .group_segment_fixed_size: 16
 272 // ASM:          .kernarg_segment_align: 64
 273 // ASM:          .kernarg_segment_size: 8
 274 // ASM:          .max_flat_workgroup_size: 256
 275 // ASM:          .name:           amd_kernel_code_t_test_all
 276 // ASM:          .private_segment_fixed_size: 32
 277 // ASM:          .sgpr_count:     14
 278 // ASM:          .symbol:         'amd_kernel_code_t_test_all@kd'
 279 // ASM:          .vgpr_count:     40
 280 // ASM:          .wavefront_size: 128
 281 // ASM:        - .group_segment_fixed_size: 16
 282 // ASM:          .kernarg_segment_align: 64
 283 // ASM:          .kernarg_segment_size: 8
 284 // ASM:          .max_flat_workgroup_size: 256
 285 // ASM:          .name:           amd_kernel_code_t_minimal
 286 // ASM:          .private_segment_fixed_size: 32
 287 // ASM:          .sgpr_count:     14
 288 // ASM:          .symbol:         'amd_kernel_code_t_minimal@kd'
 289 // ASM:          .vgpr_count:     40
 290 // ASM:          .wavefront_size: 128
 291 // ASM:      amdhsa.version:
 292 // ASM-NEXT:   - 3
 293 // ASM-NEXT:   - 0
 294 // ASM:         .end_amdgpu_metadata