[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
[llvm-project.git] / llvm / test / MC / AsmParser / altmacro-arg.s
blob713f5ad4aeab7fbeb7aab92346a42034de763cf6
1 ## Arguments can be expanded even if they are not preceded by \
2 # RUN: rm -rf %t && split-file %s %t && cd %t
3 # RUN: llvm-mc -triple=x86_64 a.s | FileCheck %s
4 # RUN: llvm-mc -triple=x86_64 b.s | FileCheck %s --check-prefix=CHECK1
6 #--- a.s
7 .altmacro
8 # CHECK: ja .Ltmp0
9 # CHECK-NEXT: xorq %rbx, %rbx
10 # CHECK: .data
11 # CHECK-NEXT: .ascii "b cc rbx"
12 # CHECK-NEXT: .ascii "bcc ccx rbx raxx"
13 .macro gen a, ra, rax
14 ja 1f
15 xorq %rax, %rax
17 .data
18 .ascii "\a \ra \rax"
19 .ascii "a\()ra ra\()x rax raxx"
20 .endm
21 gen b, cc, rbx
23 #--- b.s
24 .altmacro
25 # CHECK1: 1 1 1a
26 # CHECK1-NEXT: 1 2 1a 2b
27 # CHECK1-NEXT: \$b \$b
28 .irp ._a,1
29 .print "\._a \._a& ._a&a"
30 .irp $b,2
31 .print "\._a \$b ._a&a $b&b"
32 .endr
33 .print "\$b \$b&"
34 .endr
36 # CHECK1: 1 1& ._a&a
37 # CHECK1-NEXT: \$b \$b&
38 .noaltmacro
39 .irp ._a,1
40 .print "\._a \._a& ._a&a"
41 .print "\$b \$b&"
42 .endr
43 .altmacro