llvm/test/MC/Disassembler/AArch64/armv8.7a-ls64.txt

   1 # RUN: not llvm-mc -triple=aarch64 -mattr=+ls64 -disassemble %s 2> %t | FileCheck %s
   2 # RUN: FileCheck --check-prefix=CHECK-ERR %s < %t
   3 # RUN: not llvm-mc -triple=aarch64 -disassemble %s 2> %t | FileCheck --check-prefix=CHECK-NO-LS64 %s
   4 # RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-NO-LS64-ERR %s < %t
   5
   6 [0xa0,0xd1,0x3f,0xf8]
   7 [0xae,0x91,0x3f,0xf8]
   8 [0xb4,0xb1,0x21,0xf8]
   9 [0xb6,0xa1,0x21,0xf8]
  10 # CHECK: ld64b x0, [x13]
  11 # CHECK: st64b x14, [x13]
  12 # CHECK: st64bv x1, x20, [x13]
  13 # CHECK: st64bv0 x1, x22, [x13]
  14 # CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
  15 # CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
  16 # CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
  17 # CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
  18
  19 [0xe0,0xd3,0x3f,0xf8]
  20 [0xee,0x93,0x3f,0xf8]
  21 [0xf4,0xb3,0x21,0xf8]
  22 [0xf6,0xa3,0x21,0xf8]
  23 # CHECK: ld64b x0, [sp]
  24 # CHECK: st64b x14, [sp]
  25 # CHECK: st64bv x1, x20, [sp]
  26 # CHECK: st64bv0 x1, x22, [sp]
  27
  28 [0xb3,0xd1,0x3f,0xf8]
  29 [0xb8,0xd1,0x3f,0xf8]
  30 # CHECK-ERR: [[@LINE-2]]:2: warning: invalid instruction encoding
  31 # CHECK-ERR: [[@LINE-2]]:2: warning: invalid instruction encoding
  32
  33 [0xa0,0xd0,0x38,0xd5]
  34 [0xa0,0xd0,0x18,0xd5]
  35 # CHECK: mrs x0, ACCDATA_EL1
  36 # CHECK: msr ACCDATA_EL1, x0
  37 # CHECK-NO-LS64: mrs x0, S3_0_C13_C0_5
  38 # CHECK-NO-LS64: msr S3_0_C13_C0_5, x0