[RISCV] Add ESWIN EIC770X (SiFive P550) to getHostCPUNameForRISCV. (#125277)
[llvm-project.git] / llvm / test / MC / Mips / mips2 / invalid-mips3-wrong-error.s
blob405a3e804bfce5c818f4adbf2733ee46a96311eb
1 # Instructions that are invalid and are correctly rejected but used to emit
2 # the wrong error message.
4 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips2 \
5 # RUN: 2>%t1
6 # RUN: FileCheck %s < %t1
8 .set noat
9 dmult $s7,$a5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ldl $t8,-4167($t8) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
11 ldr $t2,-30358($s4) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
12 scd $t3,-8243($sp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
13 sdl $a3,-20961($s8) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
14 sdr $a7,-20423($t0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction