[lldb] Fix "exact match" debug_names type queries (#118465)
[llvm-project.git] / llvm / test / MC / SystemZ / fixups.s
blob0d59e60fc595796c73a6857bf2e2d068bd4423f5
2 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 --show-encoding %s | FileCheck %s
4 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 -filetype=obj %s | \
5 # RUN: llvm-readobj -r - | FileCheck %s -check-prefix=CHECK-REL
7 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 -filetype=obj %s | \
8 # RUN: llvm-objdump -d - | FileCheck %s -check-prefix=CHECK-DIS
10 # CHECK: larl %r14, target # encoding: [0xc0,0xe0,A,A,A,A]
11 # CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
12 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
13 .align 16
14 larl %r14, target
16 # CHECK: larl %r14, target@GOT # encoding: [0xc0,0xe0,A,A,A,A]
17 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOT+2, kind: FK_390_PC32DBL
18 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_GOTENT target 0x2
19 .align 16
20 larl %r14, target@got
22 # CHECK: larl %r14, target@GOTENT # encoding: [0xc0,0xe0,A,A,A,A]
23 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOTENT+2, kind: FK_390_PC32DBL
24 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_GOTENT target 0x2
25 .align 16
26 larl %r14, target@gotent
28 # CHECK: larl %r14, target@INDNTPOFF # encoding: [0xc0,0xe0,A,A,A,A]
29 # CHECK-NEXT: # fixup A - offset: 2, value: target@INDNTPOFF+2, kind: FK_390_PC32DBL
30 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_TLS_IEENT target 0x2
31 .align 16
32 larl %r14, target@indntpoff
34 # CHECK: brasl %r14, target # encoding: [0xc0,0xe5,A,A,A,A]
35 # CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
36 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
37 .align 16
38 brasl %r14, target
40 # CHECK: brasl %r14, target@PLT # encoding: [0xc0,0xe5,A,A,A,A]
41 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
42 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
43 .align 16
44 brasl %r14, target@plt
46 # CHECK: brasl %r14, target@PLT:tls_gdcall:sym # encoding: [0xc0,0xe5,A,A,A,A]
47 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
48 # CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
49 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
50 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
51 .align 16
52 brasl %r14, target@plt:tls_gdcall:sym
54 # CHECK: brasl %r14, target@PLT:tls_ldcall:sym # encoding: [0xc0,0xe5,A,A,A,A]
55 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
56 # CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
57 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
58 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
59 .align 16
60 brasl %r14, target@plt:tls_ldcall:sym
62 # CHECK: bras %r14, target # encoding: [0xa7,0xe5,A,A]
63 # CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC16DBL
64 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC16DBL target 0x2
65 .align 16
66 bras %r14, target
68 # CHECK: bras %r14, target@PLT # encoding: [0xa7,0xe5,A,A]
69 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
70 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
71 .align 16
72 bras %r14, target@plt
74 # CHECK: bras %r14, target@PLT:tls_gdcall:sym # encoding: [0xa7,0xe5,A,A]
75 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
76 # CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
77 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
78 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
79 .align 16
80 bras %r14, target@plt:tls_gdcall:sym
82 # CHECK: bras %r14, target@PLT:tls_ldcall:sym # encoding: [0xa7,0xe5,A,A]
83 # CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
84 # CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
85 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
86 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
87 .align 16
88 bras %r14, target@plt:tls_ldcall:sym
91 # Symbolic displacements
93 ## BD12
94 # CHECK: vl %v0, src # encoding: [0xe7,0x00,0b0000AAAA,A,0x00,0x06]
95 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
96 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
97 .align 16
98 vl %v0, src
100 # CHECK: vl %v0, src(%r1) # encoding: [0xe7,0x00,0b0001AAAA,A,0x00,0x06]
101 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
102 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
103 .align 16
104 vl %v0, src(%r1)
106 # CHECK: .insn vrx,253987186016262,%v0,src(%r1),3 # encoding: [0xe7,0x00,0b0001AAAA,A,0x30,0x06]
107 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
108 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
109 .align 16
110 .insn vrx,0xe70000000006,%v0,src(%r1),3 # vl
112 ## BD20
113 # CHECK: lmg %r6, %r15, src # encoding: [0xeb,0x6f,0b0000AAAA,A,A,0x04]
114 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
115 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
116 .align 16
117 lmg %r6, %r15, src
119 # CHECK: lmg %r6, %r15, src(%r1) # encoding: [0xeb,0x6f,0b0001AAAA,A,A,0x04]
120 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
121 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
122 .align 16
123 lmg %r6, %r15, src(%r1)
125 # CHECK: .insn siy,258385232527441,src(%r15),240 # encoding: [0xeb,0xf0,0b1111AAAA,A,A,0x51]
126 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
127 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
128 .align 16
129 .insn siy,0xeb0000000051,src(%r15),240 # tmy
131 ## BDX12
132 # CHECK: la %r14, src # encoding: [0x41,0xe0,0b0000AAAA,A]
133 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
134 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
135 .align 16
136 la %r14, src
138 # CHECK: la %r14, src(%r1) # encoding: [0x41,0xe0,0b0001AAAA,A]
139 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
140 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
141 .align 16
142 la %r14, src(%r1)
144 # CHECK: la %r14, src(%r1,%r2) # encoding: [0x41,0xe1,0b0010AAAA,A]
145 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
146 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
147 .align 16
148 la %r14, src(%r1, %r2)
150 # CHECK: .insn vrx,253987186016262,%v2,src(%r2,%r3),3 # encoding: [0xe7,0x22,0b0011AAAA,A,0x30,0x06]
151 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
152 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
153 .align 16
154 .insn vrx,0xe70000000006,%v2,src(%r2, %r3),3 # vl
156 ##BDX20
157 # CHECK: lg %r14, src # encoding: [0xe3,0xe0,0b0000AAAA,A,A,0x04]
158 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
159 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
160 .align 16
161 lg %r14, src
163 # CHECK: lg %r14, src(%r1) # encoding: [0xe3,0xe0,0b0001AAAA,A,A,0x04]
164 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
165 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
166 .align 16
167 lg %r14, src(%r1)
169 # CHECK: lg %r14, src(%r1,%r2) # encoding: [0xe3,0xe1,0b0010AAAA,A,A,0x04]
170 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
171 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
172 .align 16
173 lg %r14, src(%r1, %r2)
175 # CHECK: .insn rxy,260584255783013,%f1,src(%r2,%r15) # encoding: [0xed,0x12,0b1111AAAA,A,A,0x65]
176 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
177 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_20 src 0x0
178 .align 16
179 .insn rxy,0xed0000000065,%f1,src(%r2,%r15) # ldy
181 ##BD12L4
182 # CHECK: tp src(16) # encoding: [0xeb,0xf0,0b0000AAAA,A,0x00,0xc0]
183 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
184 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
185 .align 16
186 tp src(16)
188 # CHECK: tp src(16,%r1) # encoding: [0xeb,0xf0,0b0001AAAA,A,0x00,0xc0]
189 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
190 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
191 .align 16
192 tp src(16, %r1)
194 ##BD12L8
195 #SSa
196 # CHECK: mvc dst(1,%r1), src(%r1) # encoding: [0xd2,0x00,0b0001AAAA,A,0b0001BBBB,B]
197 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
198 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
199 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
200 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
201 .align 16
202 mvc dst(1,%r1), src(%r1)
204 #SSb
205 # CHECK: mvo src(16,%r1), src(1,%r2) # encoding: [0xf1,0xf0,0b0001AAAA,A,0b0010BBBB,B]
206 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
207 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
208 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
209 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
210 .align 16
211 mvo src(16,%r1), src(1,%r2)
213 #SSc
214 # CHECK: srp src(1,%r1), src(%r15), 0 # encoding: [0xf0,0x00,0b0001AAAA,A,0b1111BBBB,B]
215 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
216 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
217 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
218 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
219 .align 16
220 srp src(1,%r1), src(%r15), 0
222 ##BDR12
223 #SSd
224 # CHECK: mvck dst(%r2,%r1), src, %r3 # encoding: [0xd9,0x23,0b0001AAAA,A,0b0000BBBB,B]
225 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
226 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
227 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
228 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
229 .align 16
230 mvck dst(%r2,%r1), src, %r3
232 # CHECK: .insn ss,238594023227392,dst(%r2,%r1),src,%r3 # encoding: [0xd9,0x23,0b0001AAAA,A,0b0000BBBB,B]
233 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
234 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
235 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
236 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
237 .align 16
238 .insn ss,0xd90000000000,dst(%r2,%r1),src,%r3 # mvck
240 #SSe
241 # CHECK: lmd %r2, %r4, src1(%r1), src2(%r1) # encoding: [0xef,0x24,0b0001AAAA,A,0b0001BBBB,B]
242 # CHECK-NEXT: # fixup A - offset: 2, value: src1, kind: FK_390_U12Imm
243 # CHECK-NEXT: # fixup B - offset: 4, value: src2, kind: FK_390_U12Imm
244 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src1 0x0
245 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src2 0x0
246 .align 16
247 lmd %r2, %r4, src1(%r1), src2(%r1)
249 #SSf
250 # CHECK: pka dst(%r15), src(256,%r15) # encoding: [0xe9,0xff,0b1111AAAA,A,0b1111BBBB,B]
251 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
252 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
253 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
254 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
255 .align 16
256 pka dst(%r15), src(256,%r15)
258 #SSE
259 # CHECK: strag dst(%r1), src(%r15) # encoding: [0xe5,0x02,0b0001AAAA,A,0b1111BBBB,B]
260 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
261 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
262 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
263 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
264 .align 16
265 strag dst(%r1), src(%r15)
267 # CHECK: .insn sse,251796752695296,dst(%r1),src(%r15) # encoding: [0xe5,0x02,0b0001AAAA,A,0b1111BBBB,B]
268 # CHECK-NEXT: # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
269 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
270 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 dst 0x0
271 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
272 .align 16
273 .insn sse,0xe50200000000,dst(%r1),src(%r15) # strag
275 #SSF
276 # CHECK: ectg src, src(%r15), %r2 # encoding: [0xc8,0x21,0b0000AAAA,A,0b1111BBBB,B]
277 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
278 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
279 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
280 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
281 .align 16
282 ectg src, src(%r15), %r2
284 # CHECK: .insn ssf,219906620522496,src,src(%r15),%r2 # encoding: [0xc8,0x21,0b0000AAAA,A,0b1111BBBB,B]
285 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
286 # CHECK-NEXT: # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
287 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
288 # CHECK-REL: 0x{{[0-9A-F]*4}} R_390_12 src 0x0
289 .align 16
290 .insn ssf,0xc80100000000,src,src(%r15),%r2 # ectg
292 ##BDV12
293 # CHECK: vgeg %v0, src(%v0,%r1), 0 # encoding: [0xe7,0x00,0b0001AAAA,A,0x00,0x12]
294 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
295 # CHECK-REL: 0x{{[0-9A-F]*2}} R_390_12 src 0x0
296 .align 16
297 vgeg %v0, src(%v0,%r1), 0
299 ## Fixup for second operand only
300 # CHECK: mvc 32(8,%r1), src # encoding: [0xd2,0x07,0x10,0x20,0b0000AAAA,A]
301 # CHECK-NEXT: # fixup A - offset: 4, value: src, kind: FK_390_U12Imm
302 .align 16
303 mvc 32(8,%r1),src
305 ##U8
306 # CHECK: cli 0(%r1), src # encoding: [0x95,A,0x10,0x00]
307 # CHECK-NEXT: # fixup A - offset: 1, value: src, kind: FK_390_U8Imm
308 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_8 src 0x0
309 .align 16
310 cli 0(%r1),src
312 # CHECK: [[L:\..+]]:
313 # CHECK-NEXT: cli 0(%r1), local_u8-[[L]] # encoding: [0x95,A,0x10,0x00]
314 # CHECK-NEXT: # fixup A - offset: 1, value: local_u8-[[L]], kind: FK_390_U8Imm
315 # CHECK-DIS: 95 04 10 00 cli 0(%r1), 4
316 .align 16
317 cli 0(%r1),local_u8-.
318 local_u8:
320 ##S8
321 # CHECK: asi 0(%r1), src # encoding: [0xeb,A,0x10,0x00,0x00,0x6a]
322 # CHECK-NEXT: # fixup A - offset: 1, value: src, kind: FK_390_S8Imm
323 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_8 src 0x0
324 .align 16
325 asi 0(%r1),src
327 # CHECK: [[L:\..+]]:
328 # CHECK-NEXT: asi 0(%r1), local_s8-[[L]] # encoding: [0xeb,A,0x10,0x00,0x00,0x6a]
329 # CHECK-NEXT: # fixup A - offset: 1, value: local_s8-[[L]], kind: FK_390_S8Imm
330 # CHECK-DIS: eb 06 10 00 00 6a asi 0(%r1), 6
331 .align 16
332 asi 0(%r1),local_s8-.
333 local_s8:
335 ##U16
336 # CHECK: oill %r1, src # encoding: [0xa5,0x1b,A,A]
337 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U16Imm
338 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_16 src 0x0
339 .align 16
340 oill %r1,src
342 # CHECK: [[L:\..+]]:
343 # CHECK-NEXT: oill %r1, local_u16-[[L]] # encoding: [0xa5,0x1b,A,A]
344 # CHECK-NEXT: # fixup A - offset: 2, value: local_u16-[[L]], kind: FK_390_U16Imm
345 # CHECK-DIS: a5 1b 00 04 oill %r1, 4
346 .align 16
347 oill %r1,local_u16-.
348 local_u16:
350 # CHECK: [[L:\..+]]:
351 # CHECK-NEXT: oill %r1, src-[[L]] # encoding: [0xa5,0x1b,A,A]
352 # CHECK-NEXT: # fixup A - offset: 2, value: src-[[L]], kind: FK_390_U16Imm
353 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_PC16 src 0x2
354 .align 16
355 oill %r1,src-.
357 ##S16
358 # CHECK: lghi %r1, src # encoding: [0xa7,0x19,A,A]
359 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S16Imm
360 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_16 src 0x0
361 .align 16
362 lghi %r1,src
364 # CHECK: [[L:\..+]]:
365 # CHECK-NEXT: lghi %r1, local_s16-[[L]] # encoding: [0xa7,0x19,A,A]
366 # CHECK-NEXT: # fixup A - offset: 2, value: local_s16-[[L]], kind: FK_390_S16Imm
367 # CHECK-DIS: a7 19 00 04 lghi %r1, 4
368 .align 16
369 lghi %r1,local_s16-.
370 local_s16:
372 # CHECK: [[L:\..+]]:
373 # CHECK-NEXT: lghi %r1, src-[[L]] # encoding: [0xa7,0x19,A,A]
374 # CHECK-NEXT: # fixup A - offset: 2, value: src-[[L]], kind: FK_390_S16Imm
375 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_PC16 src 0x2
376 .align 16
377 lghi %r1,src-.
379 ##U32
380 # CHECK: clfi %r1, src # encoding: [0xc2,0x1f,A,A,A,A]
381 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_U32Imm
382 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_32 src 0x0
383 .align 16
384 clfi %r1,src
386 # CHECK: [[L:\..+]]:
387 # CHECK-NEXT: clfi %r1, local_u32-[[L]] # encoding: [0xc2,0x1f,A,A,A,A]
388 # CHECK-NEXT: # fixup A - offset: 2, value: local_u32-[[L]], kind: FK_390_U32Imm
389 # CHECK-DIS: c2 1f 00 00 00 06 clfi %r1, 6
390 .align 16
391 clfi %r1,local_u32-.
392 local_u32:
394 # CHECK: [[L:\..+]]:
395 # CHECK: clfi %r1, src-[[L]] # encoding: [0xc2,0x1f,A,A,A,A]
396 # CHECK-NEXT: # fixup A - offset: 2, value: src-[[L]], kind: FK_390_U32Imm
397 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_PC32 src 0x2
398 .align 16
399 clfi %r1,src-.
401 ##S32
402 # CHECK: lgfi %r1, src # encoding: [0xc0,0x11,A,A,A,A]
403 # CHECK-NEXT: # fixup A - offset: 2, value: src, kind: FK_390_S32Imm
404 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_32 src 0x0
405 .align 16
406 lgfi %r1,src
408 # CHECK: [[L:\..+]]:
409 # CHECK: lgfi %r1, local_s32-[[L]] # encoding: [0xc0,0x11,A,A,A,A]
410 # CHECK-NEXT: # fixup A - offset: 2, value: local_s32-[[L]], kind: FK_390_S32Imm
411 # CHECK-DIS: c0 11 00 00 00 06 lgfi %r1, 6
412 .align 16
413 lgfi %r1,local_s32-.
414 local_s32:
416 # CHECK: [[L:\..+]]:
417 # CHECK: lgfi %r1, src-[[L]] # encoding: [0xc0,0x11,A,A,A,A]
418 # CHECK-NEXT: # fixup A - offset: 2, value: src-[[L]], kind: FK_390_S32Imm
419 # CHECK-REL: 0x{{[0-9A-F]+}} R_390_PC32 src 0x2
420 .align 16
421 lgfi %r1,src-.
423 # Data relocs
424 # llvm-mc does not show any "encoding" string for data, so we just check the relocs
426 # CHECK-REL: .rela.data
427 .data
429 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE64 target 0x0
430 .align 16
431 .quad target@ntpoff
433 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO64 target 0x0
434 .align 16
435 .quad target@dtpoff
437 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM64 target 0x0
438 .align 16
439 .quad target@tlsldm
441 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD64 target 0x0
442 .align 16
443 .quad target@tlsgd
445 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE32 target 0x0
446 .align 16
447 .long target@ntpoff
449 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO32 target 0x0
450 .align 16
451 .long target@dtpoff
453 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM32 target 0x0
454 .align 16
455 .long target@tlsldm
457 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD32 target 0x0
458 .align 16
459 .long target@tlsgd