[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
[llvm-project.git] / llvm / test / MC / X86 / intel-syntax-ambiguous.s
blobea38feefe24591eddb5ace0e9ecc24d1ef9b34ec
1 // RUN: not llvm-mc -triple i686-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
3 .intel_syntax
5 // Basic case of ambiguity for inc.
7 inc [eax]
8 // CHECK: error: ambiguous operand size for instruction 'inc'
9 inc dword ptr [eax]
10 inc word ptr [eax]
11 inc byte ptr [eax]
12 // CHECK-NOT: error:
14 // Other ambiguous instructions. Anything that doesn't take a register,
15 // basically.
17 dec [eax]
18 // CHECK: error: ambiguous operand size for instruction 'dec'
19 mov [eax], 1
20 // CHECK: error: ambiguous operand size for instruction 'mov'
21 and [eax], 0
22 // CHECK: error: ambiguous operand size for instruction 'and'
23 or [eax], 1
24 // CHECK: error: ambiguous operand size for instruction 'or'
25 add [eax], 1
26 // CHECK: error: ambiguous operand size for instruction 'add'
27 sub [eax], 1
28 // CHECK: error: ambiguous operand size for instruction 'sub'
30 // gas assumes these instructions are pointer-sized by default, and we follow
31 // suit.
32 push [eax]
33 pop [eax]
34 call [eax]
35 jmp [eax]
36 // CHECK-NOT: error:
38 add byte ptr [eax], eax
39 // CHECK: error: invalid operand for instruction
41 add byte ptr [eax], eax
42 // CHECK: error: invalid operand for instruction
44 add rax, 3
45 // CHECK: error: register %rax is only available in 64-bit mode
47 fadd "?half@?0??bar@@YAXXZ@4NA"
48 // CHECK: error: ambiguous operand size for instruction 'fadd'
50 // Instruction line with PTR inside check that they don't accept register as memory.
52 // CHECK: error: expected memory operand after 'ptr', found register operand instead
53 // CHECK: andps xmm1, xmmword ptr xmm1
54 andps xmm1, xmmword ptr xmm1
55 // CHECK: error: expected memory operand after 'ptr', found register operand instead
56 // CHECK: andps xmmword ptr xmm1, xmm1
57 andps xmmword ptr xmm1, xmm1
58 // CHECK: error: expected memory operand after 'ptr', found register operand instead
59 // CHECK: mov dword ptr eax, ebx
60 mov dword ptr eax, ebx