llvm/test/MC/Xtensa/Core/invalid.s

   1 # RUN: not llvm-mc -triple xtensa %s 2>&1 | FileCheck %s
   2
   3 LBL0:
   4
   5 # Out of range immediates
   6
   7 # imm8
   8 addi a1, a2, 300
   9 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [-128, 127]
  10
  11 # imm8
  12 addi a1, a2, -129
  13 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [-128, 127]
  14
  15 # imm8_sh8
  16 addmi a1, a2, 33
  17 # CHECK: :[[#@LINE-1]]:15: error: expected immediate in range [-32768, 32512], first 8 bits should be zero
  18
  19 # shimm1_31
  20 slli a1, a2, 0
  21 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [1, 31]
  22
  23 # uimm4
  24 srli a1, a2, 16
  25 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [0, 15]
  26
  27 # uimm5
  28 srai a2, a3, 32
  29 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [0, 31]
  30
  31 # imm1_16
  32 extui a1, a3, 1, 17
  33 # CHECK: :[[#@LINE-1]]:18: error: expected immediate in range [1, 16]
  34
  35 # offset8m8
  36 s8i a1, a2, 300
  37 # CHECK: :[[#@LINE-1]]:13: error: expected immediate in range [0, 255]
  38
  39 # offset16m8
  40 l16si a1, a2, 512
  41 # CHECK: :[[#@LINE-1]]:15: error: expected immediate in range [0, 510], first bit should be zero
  42
  43 # offset32m8
  44 l32i a1, a2, 1024
  45 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [0, 1020], first 2 bits should be zero
  46
  47 # b4const
  48 beqi a1, 257, LBL0
  49 # CHECK: :[[#@LINE-1]]:10: error: expected b4const immediate
  50
  51 # b4constu
  52 bgeui a9, 32000, LBL0
  53 # CHECK: :[[#@LINE-1]]:11: error: expected b4constu immediate
  54
  55 # Invalid number of operands
  56 addi a1, a2
  57 # CHECK: :[[#@LINE-1]]:1: error: too few operands for instruction
  58 addi a1, a2, 4, 4
  59 # CHECK: :[[#@LINE-1]]:17: error: invalid operand for instruction
  60
  61 # Invalid mnemonics
  62 aaa a10, a12
  63 # CHECK: :[[#@LINE-1]]:1: error: unrecognized instruction mnemonic
  64
  65 # Invalid operand types
  66 and sp, a2, 10
  67 # CHECK: :[[#@LINE-1]]:13: error: invalid operand for instruction
  68 addi sp, a1, a2
  69 # CHECK: :[[#@LINE-1]]:14: error: expected immediate in range [-128, 127]
  70
  71 # Check invalid register names for different formats
  72 # Instruction format RRR
  73 or r2, sp, a3
  74 # CHECK: :[[#@LINE-1]]:4: error: invalid operand for instruction
  75 and a1, r10, a3
  76 # CHECK: :[[#@LINE-1]]:9: error: invalid operand for instruction
  77 sub a1, sp, a100
  78 # CHECK: :[[#@LINE-1]]:13: error: invalid operand for instruction
  79
  80 # Instruction format RRI8
  81 addi a101, sp, 10
  82 # CHECK: :[[#@LINE-1]]:6: error: invalid operand for instruction
  83 addi a1, r10, 10
  84 # CHECK: :[[#@LINE-1]]:10: error: invalid operand for instruction
  85
  86 # Instruction format RSR
  87 wsr.uregister a2
  88 # CHECK: :[[#@LINE-1]]:1: error: invalid register name
  89 wsr a2, uregister
  90 # CHECK: :[[#@LINE-1]]:9: error: invalid operand for instruction
  91
  92 # Instruction format BRI12
  93 beqz b1, LBL0
  94 # CHECK: :[[#@LINE-1]]:6: error: invalid operand for instruction
  95 # Instruction format BRI8
  96 bltui r7, 16, LBL0
  97 # CHECK: :[[#@LINE-1]]:7: error: invalid operand for instruction
  98
  99 # Instruction format CALLX
 100 callx0 r10
 101 # CHECK: :[[#@LINE-1]]:8: error: invalid operand for instruction
 102
 103 # Check invalid operands order for different formats
 104 # Instruction format RRI8
 105 addi a1, 10, a2
 106 # CHECK: :[[#@LINE-1]]:10: error: invalid operand for instruction
 107
 108 # Instruction format RSR
 109 wsr sar, a2
 110 # CHECK: :[[#@LINE-1]]:5: error: invalid operand for instruction
 111
 112 # Instruction format BRI12
 113 beqz LBL0, a2
 114 # CHECK: :[[#@LINE-1]]:6: error: invalid operand for instruction
 115
 116 # Instruction format BRI8
 117 bltui 16, a7, LBL0
 118 # CHECK: :[[#@LINE-1]]:7: error: invalid operand for instruction
 119 bltui a7, LBL0, 16
 120 # CHECK: :[[#@LINE-1]]:19: error: unknown operand