llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td

   1 // RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
   2 // RUN:     -combiners=MyCombiner %s | \
   3 // RUN: FileCheck %s
   4
   5 include "llvm/Target/Target.td"
   6 include "llvm/Target/GlobalISel/Combine.td"
   7
   8 def MyTargetISA : InstrInfo;
   9 def MyTarget : Target { let InstructionSet = MyTargetISA; }
  10
  11 def Test0 : GICombineRule<
  12   (defs root:$dst),
  13   (match (G_MUL $dst, $src, -1)),
  14   (apply (G_SUB $dst, (GITypeOf<"$src"> 0), $tmp),
  15          (G_CONSTANT GITypeOf<"$dst">:$tmp, (GITypeOf<"$src"> 42)))>;
  16
  17 // CHECK:      const uint8_t *GenMyCombiner::getMatchTable() const {
  18 // CHECK-NEXT:   constexpr static uint8_t MatchTable0[] = {
  19 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(74), // Rule ID 0 //
  20 // CHECK-NEXT:       GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
  21 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_MUL),
  22 // CHECK-NEXT:       // MIs[0] dst
  23 // CHECK-NEXT:       GIM_RecordRegType, /*MI*/0, /*Op*/0, /*TempTypeIdx*/uint8_t(-1),
  24 // CHECK-NEXT:       // MIs[0] src
  25 // CHECK-NEXT:       GIM_RecordRegType, /*MI*/0, /*Op*/1, /*TempTypeIdx*/uint8_t(-2),
  26 // CHECK-NEXT:       // MIs[0] Operand 2
  27 // CHECK-NEXT:       GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
  28 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/uint8_t(-2),
  29 // CHECK-NEXT:       GIR_BuildConstant, /*TempRegID*/1, /*Val*/GIMT_Encode8(0),
  30 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/uint8_t(-1),
  31 // CHECK-NEXT:       // Combiner Rule #0: Test0
  32 // CHECK-NEXT:       GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_CONSTANT),
  33 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
  34 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/0, /*Type*/uint8_t(-2), /*Imm*/GIMT_Encode8(42),
  35 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_SUB),
  36 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // dst
  37 // CHECK-NEXT:       GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
  38 // CHECK-NEXT:       GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
  39 // CHECK-NEXT:       GIR_EraseRootFromParent_Done,
  40 // CHECK-NEXT:     // Label 0: @74
  41 // CHECK-NEXT:     GIM_Reject,
  42 // CHECK-NEXT:     }; // Size: 75 bytes
  43 // CHECK-NEXT:   return MatchTable0;
  44 // CHECK-NEXT: }
  45
  46 def MyCombiner: GICombiner<"GenMyCombiner", [
  47   Test0
  48 ]>;