1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=instcombine -S -o - | FileCheck %s
4 ; This test case was added as a reproducer for a miscompile, where instcombine
6 ; srem <2 x i16> %1, <i16 undef, i16 2>
7 ; instruction, which makes the whole srem undefined (even if we only end up
8 ; extracting the second element in the vector).
9 define i16 @test_srem_orig(i16 %a, i1 %cmp) {
10 ; CHECK-LABEL: @test_srem_orig(
11 ; CHECK-NEXT: [[TMP1:%.*]] = srem i16 [[A:%.*]], 2
12 ; CHECK-NEXT: [[T3:%.*]] = select i1 [[CMP:%.*]], i16 1, i16 [[TMP1]]
13 ; CHECK-NEXT: ret i16 [[T3]]
15 %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
16 %splat = shufflevector <2 x i16> %splatinsert, <2 x i16> undef, <2 x i32> zeroinitializer
17 %t1 = select i1 %cmp, <2 x i16> <i16 1, i16 1>, <2 x i16> %splat
18 %t2 = srem <2 x i16> %t1, <i16 2, i16 2>
19 %t3 = extractelement <2 x i16> %t2, i32 1
23 ; This is basically a reduced version of test_srem_orig (based on what the
24 ; code would look like after a few iterations of instcombine, just before we
25 ; try to transform the shufflevector by doing
26 ; "evaluateInDifferentElementOrder".
27 define <2 x i16> @test_srem(i16 %a, i1 %cmp) {
28 ; CHECK-LABEL: @test_srem(
29 ; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> <i16 poison, i16 undef>, i16 [[A:%.*]], i64 0
30 ; CHECK-NEXT: [[T1:%.*]] = srem <2 x i16> [[SPLATINSERT]], <i16 2, i16 1>
31 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> <i32 poison, i32 0>
32 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
33 ; CHECK-NEXT: ret <2 x i16> [[T2]]
35 %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
36 %t1 = srem <2 x i16> %splatinsert, <i16 2, i16 1>
37 %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
38 %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
42 define <2 x i16> @test_urem(i16 %a, i1 %cmp) {
43 ; CHECK-LABEL: @test_urem(
44 ; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> <i16 poison, i16 undef>, i16 [[A:%.*]], i64 0
45 ; CHECK-NEXT: [[T1:%.*]] = urem <2 x i16> [[SPLATINSERT]], <i16 3, i16 1>
46 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> <i32 poison, i32 0>
47 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
48 ; CHECK-NEXT: ret <2 x i16> [[T2]]
50 %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
51 %t1 = urem <2 x i16> %splatinsert, <i16 3, i16 1>
52 %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
53 %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
57 define <2 x i16> @test_sdiv(i16 %a, i1 %cmp) {
58 ; CHECK-LABEL: @test_sdiv(
59 ; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> <i16 poison, i16 undef>, i16 [[A:%.*]], i64 0
60 ; CHECK-NEXT: [[T1:%.*]] = sdiv <2 x i16> [[SPLATINSERT]], <i16 2, i16 1>
61 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> <i32 poison, i32 0>
62 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
63 ; CHECK-NEXT: ret <2 x i16> [[T2]]
65 %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
66 %t1 = sdiv <2 x i16> %splatinsert, <i16 2, i16 1>
67 %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
68 %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
72 define <2 x i16> @test_udiv(i16 %a, i1 %cmp) {
73 ; CHECK-LABEL: @test_udiv(
74 ; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> <i16 poison, i16 undef>, i16 [[A:%.*]], i64 0
75 ; CHECK-NEXT: [[T1:%.*]] = udiv <2 x i16> [[SPLATINSERT]], <i16 3, i16 1>
76 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> <i32 poison, i32 0>
77 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> <i16 77, i16 99>, <2 x i16> [[SPLAT_OP]]
78 ; CHECK-NEXT: ret <2 x i16> [[T2]]
80 %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0
81 %t1 = udiv <2 x i16> %splatinsert, <i16 3, i16 1>
82 %splat.op = shufflevector <2 x i16> %t1, <2 x i16> undef, <2 x i32> <i32 undef, i32 0>
83 %t2 = select i1 %cmp, <2 x i16> <i16 77, i16 99>, <2 x i16> %splat.op
87 ; For fdiv we do not need to worry about div by undef. Verify that the
88 ; shufflevector is eliminated here.
89 define <2 x float> @test_fdiv(float %a, float %b, i1 %cmp) {
90 ; CHECK-LABEL: @test_fdiv(
91 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 1
92 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = fdiv <2 x float> [[TMP1]], <float undef, float 3.000000e+00>
93 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> <float 7.700000e+01, float 9.900000e+01>, <2 x float> [[SPLAT_OP]]
94 ; CHECK-NEXT: ret <2 x float> [[T2]]
96 %splatinsert = insertelement <2 x float> undef, float %a, i32 0
97 %denom = insertelement <2 x float> <float 3.0, float undef>, float 1.0, i32 1
98 %t1 = fdiv <2 x float> %splatinsert, %denom
99 %splat.op = shufflevector <2 x float> %t1, <2 x float> undef, <2 x i32> <i32 undef, i32 0>
100 %t2 = select i1 %cmp, <2 x float> <float 77.0, float 99.0>, <2 x float> %splat.op
104 ; For frem we do not need to worry about div by undef. Verify that the
105 ; shufflevector is eliminated here.
106 define <2 x float> @test_frem(float %a, float %b, i1 %cmp) {
107 ; CHECK-LABEL: @test_frem(
108 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 1
109 ; CHECK-NEXT: [[SPLAT_OP:%.*]] = frem <2 x float> [[TMP1]], <float undef, float 3.000000e+00>
110 ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> <float 7.700000e+01, float 9.900000e+01>, <2 x float> [[SPLAT_OP]]
111 ; CHECK-NEXT: ret <2 x float> [[T2]]
113 %splatinsert = insertelement <2 x float> undef, float %a, i32 0
114 %denom = insertelement <2 x float> <float 3.0, float undef>, float 1.0, i32 1
115 %t1 = frem <2 x float> %splatinsert, %denom
116 %splat.op = shufflevector <2 x float> %t1, <2 x float> undef, <2 x i32> <i32 undef, i32 0>
117 %t2 = select i1 %cmp, <2 x float> <float 77.0, float 99.0>, <2 x float> %splat.op