1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=loop-vectorize < %s -S -o - | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64-unknown-linux-gnu"
7 ; Test cases to make sure LV & loop versioning can handle loops with
8 ; multiple exiting branches.
10 ; Multiple branches exiting the loop to a unique exit block.
11 define void @multiple_exits_unique_exit_block(ptr %A, ptr %B, i32 %N) #0 {
12 ; CHECK-LABEL: @multiple_exits_unique_exit_block(
14 ; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64
15 ; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64
16 ; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 999)
17 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1
18 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vscale.i32()
19 ; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP1]], 8
20 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], [[TMP2]]
21 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
22 ; CHECK: vector.memcheck:
23 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
24 ; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 4
25 ; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 8
26 ; CHECK-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]]
27 ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]
28 ; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
30 ; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vscale.i32()
31 ; CHECK-NEXT: [[TMP8:%.*]] = mul i32 [[TMP7]], 8
32 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], [[TMP8]]
33 ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[N_MOD_VF]], 0
34 ; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i32 [[TMP8]], i32 [[N_MOD_VF]]
35 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP10]]
36 ; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.vscale.i32()
37 ; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[TMP11]], 8
38 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
40 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
41 ; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 0
42 ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP13]]
43 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i32 0
44 ; CHECK-NEXT: [[TMP22:%.*]] = call i64 @llvm.vscale.i64()
45 ; CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[TMP22]], 4
46 ; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i64 [[TMP23]]
47 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP21]], align 4
48 ; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x i32>, ptr [[TMP24]], align 4
49 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[TMP13]]
50 ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i32 0
51 ; CHECK-NEXT: [[TMP28:%.*]] = call i64 @llvm.vscale.i64()
52 ; CHECK-NEXT: [[TMP29:%.*]] = mul i64 [[TMP28]], 4
53 ; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i64 [[TMP29]]
54 ; CHECK-NEXT: store <vscale x 4 x i32> [[WIDE_LOAD]], ptr [[TMP27]], align 4
55 ; CHECK-NEXT: store <vscale x 4 x i32> [[WIDE_LOAD3]], ptr [[TMP30]], align 4
56 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP12]]
57 ; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
58 ; CHECK-NEXT: br i1 [[TMP31]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
59 ; CHECK: middle.block:
60 ; CHECK-NEXT: br label [[SCALAR_PH]]
62 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]
63 ; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
65 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY:%.*]] ]
66 ; CHECK-NEXT: [[COND_0:%.*]] = icmp eq i32 [[IV]], [[N]]
67 ; CHECK-NEXT: br i1 [[COND_0]], label [[EXIT:%.*]], label [[FOR_BODY]]
69 ; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[IV]]
70 ; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[A_GEP]], align 4
71 ; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]
72 ; CHECK-NEXT: store i32 [[LV]], ptr [[B_GEP]], align 4
73 ; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1
74 ; CHECK-NEXT: [[COND_1:%.*]] = icmp ult i32 [[IV_NEXT]], 1000
75 ; CHECK-NEXT: br i1 [[COND_1]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
77 ; CHECK-NEXT: ret void
83 %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
84 %cond.0 = icmp eq i32 %iv, %N
85 br i1 %cond.0, label %exit, label %for.body
88 %A.gep = getelementptr inbounds i32, ptr %A, i32 %iv
89 %lv = load i32, ptr %A.gep, align 4
90 %B.gep = getelementptr inbounds i32, ptr %B, i32 %iv
91 store i32 %lv, ptr %B.gep, align 4
92 %iv.next = add nuw i32 %iv, 1
93 %cond.1 = icmp ult i32 %iv.next, 1000
94 br i1 %cond.1, label %loop.header, label %exit
101 ; Multiple branches exiting the loop to different blocks.
102 define i32 @multiple_exits_multiple_exit_blocks(ptr %A, ptr %B, i32 %N) #0 {
103 ; CHECK-LABEL: @multiple_exits_multiple_exit_blocks(
105 ; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64
106 ; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64
107 ; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 999)
108 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1
109 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vscale.i32()
110 ; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP1]], 8
111 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], [[TMP2]]
112 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
113 ; CHECK: vector.memcheck:
114 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
115 ; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 4
116 ; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 8
117 ; CHECK-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]]
118 ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]]
119 ; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
121 ; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vscale.i32()
122 ; CHECK-NEXT: [[TMP8:%.*]] = mul i32 [[TMP7]], 8
123 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], [[TMP8]]
124 ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[N_MOD_VF]], 0
125 ; CHECK-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i32 [[TMP8]], i32 [[N_MOD_VF]]
126 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP10]]
127 ; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.vscale.i32()
128 ; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[TMP11]], 8
129 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
130 ; CHECK: vector.body:
131 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
132 ; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 0
133 ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP13]]
134 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i32 0
135 ; CHECK-NEXT: [[TMP22:%.*]] = call i64 @llvm.vscale.i64()
136 ; CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[TMP22]], 4
137 ; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i64 [[TMP23]]
138 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP21]], align 4
139 ; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x i32>, ptr [[TMP24]], align 4
140 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[TMP13]]
141 ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i32 0
142 ; CHECK-NEXT: [[TMP28:%.*]] = call i64 @llvm.vscale.i64()
143 ; CHECK-NEXT: [[TMP29:%.*]] = mul i64 [[TMP28]], 4
144 ; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i64 [[TMP29]]
145 ; CHECK-NEXT: store <vscale x 4 x i32> [[WIDE_LOAD]], ptr [[TMP27]], align 4
146 ; CHECK-NEXT: store <vscale x 4 x i32> [[WIDE_LOAD3]], ptr [[TMP30]], align 4
147 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP12]]
148 ; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
149 ; CHECK-NEXT: br i1 [[TMP31]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
150 ; CHECK: middle.block:
151 ; CHECK-NEXT: br label [[SCALAR_PH]]
153 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]
154 ; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
155 ; CHECK: loop.header:
156 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY:%.*]] ]
157 ; CHECK-NEXT: [[COND_0:%.*]] = icmp eq i32 [[IV]], [[N]]
158 ; CHECK-NEXT: br i1 [[COND_0]], label [[EXIT_0:%.*]], label [[FOR_BODY]]
160 ; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[IV]]
161 ; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[A_GEP]], align 4
162 ; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]
163 ; CHECK-NEXT: store i32 [[LV]], ptr [[B_GEP]], align 4
164 ; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1
165 ; CHECK-NEXT: [[COND_1:%.*]] = icmp ult i32 [[IV_NEXT]], 1000
166 ; CHECK-NEXT: br i1 [[COND_1]], label [[LOOP_HEADER]], label [[EXIT_1:%.*]], !llvm.loop [[LOOP5:![0-9]+]]
168 ; CHECK-NEXT: ret i32 1
170 ; CHECK-NEXT: ret i32 2
173 br label %loop.header
176 %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ]
177 %cond.0 = icmp eq i32 %iv, %N
178 br i1 %cond.0, label %exit.0, label %for.body
181 %A.gep = getelementptr inbounds i32, ptr %A, i32 %iv
182 %lv = load i32, ptr %A.gep, align 4
183 %B.gep = getelementptr inbounds i32, ptr %B, i32 %iv
184 store i32 %lv, ptr %B.gep, align 4
185 %iv.next = add nuw i32 %iv, 1
186 %cond.1 = icmp ult i32 %iv.next, 1000
187 br i1 %cond.1, label %loop.header, label %exit.1
196 attributes #0 = { "target-features"="+sve2" }