1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=loop-vectorize < %s -S -o - | FileCheck %s
4 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
5 target triple = "thumbv8.1m.main-arm-none-eabi"
7 ; Fixed order recurrences currently require a shuffle that is expensive to
8 ; codegenerate. These examples should not vectorize.
10 define void @firstorderrec(ptr nocapture noundef readonly %x, ptr noalias nocapture noundef writeonly %y, i32 noundef %n) #0 {
11 ; CHECK-LABEL: @firstorderrec(
13 ; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[N:%.*]], 1
14 ; CHECK-NEXT: br i1 [[CMP18]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
15 ; CHECK: for.body.preheader:
16 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
17 ; CHECK-NEXT: [[DOTPRE:%.*]] = load i8, ptr [[X:%.*]], align 1
18 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
19 ; CHECK: for.cond.cleanup.loopexit:
20 ; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
21 ; CHECK: for.cond.cleanup:
22 ; CHECK-NEXT: ret void
24 ; CHECK-NEXT: [[TMP0:%.*]] = phi i8 [ [[DOTPRE]], [[FOR_BODY_PREHEADER]] ], [ [[TMP1:%.*]], [[FOR_BODY]] ]
25 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
26 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[INDVARS_IV]]
27 ; CHECK-NEXT: [[TMP1]] = load i8, ptr [[ARRAYIDX4]], align 1
28 ; CHECK-NEXT: [[ADD7:%.*]] = add i8 [[TMP1]], [[TMP0]]
29 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i8, ptr [[Y:%.*]], i64 [[INDVARS_IV]]
30 ; CHECK-NEXT: store i8 [[ADD7]], ptr [[ARRAYIDX10]], align 1
31 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
32 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
33 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
36 %cmp18 = icmp sgt i32 %n, 1
37 br i1 %cmp18, label %for.body.preheader, label %for.cond.cleanup
39 for.body.preheader: ; preds = %entry
40 %wide.trip.count = zext i32 %n to i64
41 %.pre = load i8, ptr %x, align 1
44 for.cond.cleanup: ; preds = %for.body, %entry
47 for.body: ; preds = %for.body.preheader, %for.body
48 %0 = phi i8 [ %.pre, %for.body.preheader ], [ %1, %for.body ]
49 %indvars.iv = phi i64 [ 1, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
50 %arrayidx4 = getelementptr inbounds i8, ptr %x, i64 %indvars.iv
51 %1 = load i8, ptr %arrayidx4, align 1
53 %arrayidx10 = getelementptr inbounds i8, ptr %y, i64 %indvars.iv
54 store i8 %add7, ptr %arrayidx10, align 1
55 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
56 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
57 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
60 define void @thirdorderrec(ptr nocapture noundef readonly %x, ptr noalias nocapture noundef writeonly %y, i32 noundef %n) #0 {
61 ; CHECK-LABEL: @thirdorderrec(
63 ; CHECK-NEXT: [[CMP38:%.*]] = icmp sgt i32 [[N:%.*]], 3
64 ; CHECK-NEXT: br i1 [[CMP38]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
65 ; CHECK: for.body.preheader:
66 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
67 ; CHECK-NEXT: [[DOTPRE:%.*]] = load i8, ptr [[X:%.*]], align 1
68 ; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 1
69 ; CHECK-NEXT: [[DOTPRE44:%.*]] = load i8, ptr [[ARRAYIDX5_PHI_TRANS_INSERT]], align 1
70 ; CHECK-NEXT: [[ARRAYIDX12_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 2
71 ; CHECK-NEXT: [[DOTPRE45:%.*]] = load i8, ptr [[ARRAYIDX12_PHI_TRANS_INSERT]], align 1
72 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
73 ; CHECK: for.cond.cleanup.loopexit:
74 ; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
75 ; CHECK: for.cond.cleanup:
76 ; CHECK-NEXT: ret void
78 ; CHECK-NEXT: [[TMP0:%.*]] = phi i8 [ [[DOTPRE45]], [[FOR_BODY_PREHEADER]] ], [ [[TMP3:%.*]], [[FOR_BODY]] ]
79 ; CHECK-NEXT: [[TMP1:%.*]] = phi i8 [ [[DOTPRE44]], [[FOR_BODY_PREHEADER]] ], [ [[TMP0]], [[FOR_BODY]] ]
80 ; CHECK-NEXT: [[TMP2:%.*]] = phi i8 [ [[DOTPRE]], [[FOR_BODY_PREHEADER]] ], [ [[TMP1]], [[FOR_BODY]] ]
81 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 3, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
82 ; CHECK-NEXT: [[ADD8:%.*]] = add i8 [[TMP1]], [[TMP2]]
83 ; CHECK-NEXT: [[ADD15:%.*]] = add i8 [[ADD8]], [[TMP0]]
84 ; CHECK-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds i8, ptr [[X]], i64 [[INDVARS_IV]]
85 ; CHECK-NEXT: [[TMP3]] = load i8, ptr [[ARRAYIDX18]], align 1
86 ; CHECK-NEXT: [[ADD21:%.*]] = add i8 [[ADD15]], [[TMP3]]
87 ; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, ptr [[Y:%.*]], i64 [[INDVARS_IV]]
88 ; CHECK-NEXT: store i8 [[ADD21]], ptr [[ARRAYIDX24]], align 1
89 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
90 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
91 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
94 %cmp38 = icmp sgt i32 %n, 3
95 br i1 %cmp38, label %for.body.preheader, label %for.cond.cleanup
97 for.body.preheader: ; preds = %entry
98 %wide.trip.count = zext i32 %n to i64
99 %.pre = load i8, ptr %x, align 1
100 %arrayidx5.phi.trans.insert = getelementptr inbounds i8, ptr %x, i64 1
101 %.pre44 = load i8, ptr %arrayidx5.phi.trans.insert, align 1
102 %arrayidx12.phi.trans.insert = getelementptr inbounds i8, ptr %x, i64 2
103 %.pre45 = load i8, ptr %arrayidx12.phi.trans.insert, align 1
106 for.cond.cleanup: ; preds = %for.body, %entry
109 for.body: ; preds = %for.body.preheader, %for.body
110 %0 = phi i8 [ %.pre45, %for.body.preheader ], [ %3, %for.body ]
111 %1 = phi i8 [ %.pre44, %for.body.preheader ], [ %0, %for.body ]
112 %2 = phi i8 [ %.pre, %for.body.preheader ], [ %1, %for.body ]
113 %indvars.iv = phi i64 [ 3, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
114 %add8 = add i8 %1, %2
115 %add15 = add i8 %add8, %0
116 %arrayidx18 = getelementptr inbounds i8, ptr %x, i64 %indvars.iv
117 %3 = load i8, ptr %arrayidx18, align 1
118 %add21 = add i8 %add15, %3
119 %arrayidx24 = getelementptr inbounds i8, ptr %y, i64 %indvars.iv
120 store i8 %add21, ptr %arrayidx24, align 1
121 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
122 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
123 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
126 attributes #0 = { "target-features"="+mve" }