1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=loop-vectorize,dce,instcombine -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-unknown-linux-gnu"
9 ; void loop(int *a, int *b) {
10 ; for (int i = 0; i < 512; ++i) {
16 define void @loop(ptr nocapture %a, ptr nocapture %b) nounwind uwtable {
19 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
21 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
22 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV]]
23 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
24 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
25 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
26 ; CHECK-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP1]] to i64
27 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM3]]
28 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX4]], align 4
29 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
30 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV_NEXT]]
31 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4
32 ; CHECK-NEXT: store i32 [[TMP2]], ptr [[ARRAYIDX2]], align 4
33 ; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[INDVARS_IV_NEXT]], 4294967295
34 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP3]], 512
35 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
37 ; CHECK-NEXT: ret void
42 for.body: ; preds = %for.body, %entry
43 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
44 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv
45 %0 = load i32, ptr %arrayidx, align 4
46 %arrayidx2 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
47 %1 = load i32, ptr %arrayidx2, align 4
48 %idxprom3 = sext i32 %1 to i64
49 %arrayidx4 = getelementptr inbounds i32, ptr %a, i64 %idxprom3
50 store i32 %0, ptr %arrayidx4, align 4
51 %indvars.iv.next = add i64 %indvars.iv, 1
52 %arrayidx6 = getelementptr inbounds i32, ptr %b, i64 %indvars.iv.next
53 %2 = load i32, ptr %arrayidx6, align 4
54 store i32 %2, ptr %arrayidx2, align 4
55 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
56 %exitcond = icmp eq i32 %lftr.wideiv, 512
57 br i1 %exitcond, label %for.end, label %for.body
59 for.end: ; preds = %for.body
63 ; The same loop with parallel loop metadata added to the loop branch
64 ; and the memory instructions.
66 define void @parallel_loop(ptr nocapture %a, ptr nocapture %b) nounwind uwtable {
67 ; CHECK-LABEL: @parallel_loop(
69 ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
71 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
73 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
74 ; CHECK-NEXT: [[TMP0:%.*]] = or disjoint i64 [[INDEX]], 1
75 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i64 [[INDEX]], 2
76 ; CHECK-NEXT: [[TMP2:%.*]] = or disjoint i64 [[INDEX]], 3
77 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDEX]]
78 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP0:![0-9]+]]
79 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]
80 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP0]]
81 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP1]]
82 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP2]]
83 ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4, !llvm.access.group [[ACC_GRP0]]
84 ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 4, !llvm.access.group [[ACC_GRP0]]
85 ; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 4, !llvm.access.group [[ACC_GRP0]]
86 ; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP0]]
87 ; CHECK-NEXT: [[TMP13:%.*]] = sext i32 [[TMP9]] to i64
88 ; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP10]] to i64
89 ; CHECK-NEXT: [[TMP15:%.*]] = sext i32 [[TMP11]] to i64
90 ; CHECK-NEXT: [[TMP16:%.*]] = sext i32 [[TMP12]] to i64
91 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP13]]
92 ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP14]]
93 ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP15]]
94 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP16]]
95 ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 0
96 ; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
97 ; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 1
98 ; CHECK-NEXT: store i32 [[TMP22]], ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP1]]
99 ; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 2
100 ; CHECK-NEXT: store i32 [[TMP23]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP1]]
101 ; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3
102 ; CHECK-NEXT: store i32 [[TMP24]], ptr [[TMP20]], align 4, !llvm.access.group [[ACC_GRP1]]
103 ; CHECK-NEXT: [[TMP25:%.*]] = or disjoint i64 [[INDEX]], 1
104 ; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP25]]
105 ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP26]], align 4, !llvm.access.group [[ACC_GRP0]]
106 ; CHECK-NEXT: store <4 x i32> [[WIDE_LOAD1]], ptr [[TMP5]], align 4, !llvm.access.group [[ACC_GRP0]]
107 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
108 ; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], 512
109 ; CHECK-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
110 ; CHECK: middle.block:
111 ; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
113 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
115 ; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
117 ; CHECK-NEXT: ret void
122 for.body: ; preds = %for.body, %entry
123 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
124 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv
125 %0 = load i32, ptr %arrayidx, align 4, !llvm.access.group !13
126 %arrayidx2 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
127 %1 = load i32, ptr %arrayidx2, align 4, !llvm.access.group !13
128 %idxprom3 = sext i32 %1 to i64
129 %arrayidx4 = getelementptr inbounds i32, ptr %a, i64 %idxprom3
130 ; This store might have originated from inlining a function with a parallel
131 ; loop. Refers to a list with the "original loop reference" (!4) also included.
132 store i32 %0, ptr %arrayidx4, align 4, !llvm.access.group !15
133 %indvars.iv.next = add i64 %indvars.iv, 1
134 %arrayidx6 = getelementptr inbounds i32, ptr %b, i64 %indvars.iv.next
135 %2 = load i32, ptr %arrayidx6, align 4, !llvm.access.group !13
136 store i32 %2, ptr %arrayidx2, align 4, !llvm.access.group !13
137 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
138 %exitcond = icmp eq i32 %lftr.wideiv, 512
139 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !3
141 for.end: ; preds = %for.body
145 ; The same loop with an illegal parallel loop metadata: the memory
146 ; accesses refer to a different loop's identifier.
149 define void @mixed_metadata(ptr nocapture %a, ptr nocapture %b) nounwind uwtable {
150 ; CHECK-LABEL: @mixed_metadata(
152 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
154 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
155 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV]]
156 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
157 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
158 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP7]]
159 ; CHECK-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP1]] to i64
160 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM3]]
161 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]
162 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
163 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV_NEXT]]
164 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP7]]
165 ; CHECK-NEXT: store i32 [[TMP2]], ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP7]]
166 ; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[INDVARS_IV_NEXT]], 4294967295
167 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP3]], 512
168 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
170 ; CHECK-NEXT: ret void
175 for.body: ; preds = %for.body, %entry
176 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
177 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv
178 %0 = load i32, ptr %arrayidx, align 4, !llvm.access.group !16
179 %arrayidx2 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
180 %1 = load i32, ptr %arrayidx2, align 4, !llvm.access.group !16
181 %idxprom3 = sext i32 %1 to i64
182 %arrayidx4 = getelementptr inbounds i32, ptr %a, i64 %idxprom3
183 ; This refers to the loop marked with !7 which we are not in at the moment.
184 ; It should prevent detecting as a parallel loop.
185 store i32 %0, ptr %arrayidx4, align 4, !llvm.access.group !17
186 %indvars.iv.next = add i64 %indvars.iv, 1
187 %arrayidx6 = getelementptr inbounds i32, ptr %b, i64 %indvars.iv.next
188 %2 = load i32, ptr %arrayidx6, align 4, !llvm.access.group !16
189 store i32 %2, ptr %arrayidx2, align 4, !llvm.access.group !16
190 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
191 %exitcond = icmp eq i32 %lftr.wideiv, 512
192 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !6
194 for.end: ; preds = %for.body
198 !3 = !{!3, !{!"llvm.loop.parallel_accesses", !13, !15}}
199 !4 = !{!4, !{!"llvm.loop.parallel_accesses", !14, !15}}
200 !6 = !{!6, !{!"llvm.loop.parallel_accesses", !16}}
201 !7 = !{!7, !{!"llvm.loop.parallel_accesses", !17}}