1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2 ; RUN: opt -p loop-vectorize -scalable-vectorization=on -force-vector-width=1 -force-target-supports-scalable-vectors=true -S %s | FileCheck %s
4 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
7 define i64 @pr97452_scalable_vf1_for_live_out(ptr %src) {
8 ; CHECK-LABEL: define i64 @pr97452_scalable_vf1_for_live_out(
9 ; CHECK-SAME: ptr [[SRC:%.*]]) {
10 ; CHECK-NEXT: [[ENTRY:.*]]:
11 ; CHECK-NEXT: br label %[[LOOP:.*]]
13 ; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[L:%.*]], %[[LOOP]] ]
14 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
15 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
16 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[IV]]
17 ; CHECK-NEXT: [[L]] = load i64, ptr [[GEP]], align 8
18 ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 22
19 ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
21 ; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[FOR]], %[[LOOP]] ]
22 ; CHECK-NEXT: ret i64 [[RES]]
28 %for = phi i64 [ 0, %entry ], [ %l, %loop ]
29 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
30 %iv.next = add i64 %iv, 1
31 %gep = getelementptr inbounds i64, ptr %src, i64 %iv
32 %l = load i64, ptr %gep, align 8
33 %ec = icmp eq i64 %iv, 22
34 br i1 %ec, label %exit, label %loop
37 %res = phi i64 [ %for, %loop ]
42 define void @pr97452_scalable_vf1_for_no_live_out(ptr %src, ptr noalias %dst) {
43 ; CHECK-LABEL: define void @pr97452_scalable_vf1_for_no_live_out(
44 ; CHECK-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]]) {
45 ; CHECK-NEXT: [[ENTRY:.*]]:
46 ; CHECK-NEXT: br label %[[LOOP:.*]]
48 ; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[L:%.*]], %[[LOOP]] ]
49 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
50 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
51 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[IV]]
52 ; CHECK-NEXT: [[L]] = load i64, ptr [[GEP]], align 8
53 ; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[IV]]
54 ; CHECK-NEXT: store i64 [[FOR]], ptr [[GEP_DST]], align 8
55 ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 22
56 ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
58 ; CHECK-NEXT: ret void
64 %for = phi i64 [ 0, %entry ], [ %l, %loop ]
65 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
66 %iv.next = add i64 %iv, 1
67 %gep = getelementptr inbounds i64, ptr %src, i64 %iv
68 %l = load i64, ptr %gep, align 8
69 %gep.dst = getelementptr inbounds i64, ptr %dst, i64 %iv
70 store i64 %for, ptr %gep.dst
71 %ec = icmp eq i64 %iv, 22
72 br i1 %ec, label %exit, label %loop