1 ; RUN: opt < %s -passes=loop-vectorize,transform-warning -force-vector-width=4 -S 2>&1 | FileCheck %s
2 ; RUN: opt < %s -passes=loop-vectorize,transform-warning -force-vector-width=1 -S 2>&1 | FileCheck %s -check-prefix=NOANALYSIS
3 ; RUN: opt < %s -passes=loop-vectorize,transform-warning -force-vector-width=4 -pass-remarks-missed='loop-vectorize' -S 2>&1 | FileCheck %s -check-prefix=MOREINFO
5 ; CHECK-NOT: loop not vectorized: loop contains a switch statement
6 ; CHECK-NOT: loop not vectorized: the optimizer was unable to perform the requested transformation; the transformation might be disabled or specified as part of an unsupported transformation ordering
8 ; NOANALYSIS-NOT: remark: {{.*}}
9 ; NOANALYSIS: loop not vectorized: the optimizer was unable to perform the requested transformation; the transformation might be disabled or specified as part of an unsupported transformation ordering
11 ; MOREINFO-NOT: remark
13 ; CHECK: _Z11test_switchPii
17 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
19 ; Function Attrs: nounwind optsize ssp uwtable
20 define void @_Z11test_switchPii(ptr nocapture %A, i32 %Length) #0 !dbg !4 {
22 %cmp18 = icmp sgt i32 %Length, 0, !dbg !10
23 br i1 %cmp18, label %for.body.preheader, label %for.end, !dbg !10, !llvm.loop !12
25 for.body.preheader: ; preds = %entry
26 br label %for.body, !dbg !14
28 for.body: ; preds = %for.body.preheader, %for.inc
29 %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %for.body.preheader ]
30 %arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv, !dbg !14
31 %0 = load i32, ptr %arrayidx, align 4, !dbg !14, !tbaa !16
32 switch i32 %0, label %for.inc [
37 sw.bb: ; preds = %for.body
38 %1 = trunc i64 %indvars.iv to i32, !dbg !20
39 %mul = shl nsw i32 %1, 1, !dbg !20
40 br label %for.inc, !dbg !22
42 sw.bb3: ; preds = %for.body
43 %2 = trunc i64 %indvars.iv to i32, !dbg !23
44 store i32 %2, ptr %arrayidx, align 4, !dbg !23, !tbaa !16
45 br label %for.inc, !dbg !23
47 for.inc: ; preds = %sw.bb3, %for.body, %sw.bb
48 %storemerge = phi i32 [ %mul, %sw.bb ], [ 0, %for.body ], [ 0, %sw.bb3 ]
49 store i32 %storemerge, ptr %arrayidx, align 4, !dbg !20, !tbaa !16
50 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !10
51 %lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !10
52 %exitcond = icmp eq i32 %lftr.wideiv, %Length, !dbg !10
53 br i1 %exitcond, label %for.end.loopexit, label %for.body, !dbg !10, !llvm.loop !12
55 for.end.loopexit: ; preds = %for.inc
58 for.end: ; preds = %for.end.loopexit, %entry
62 attributes #0 = { nounwind }
65 !llvm.module.flags = !{!7, !8}
68 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, producer: "clang version 3.5.0", isOptimized: true, runtimeVersion: 6, emissionKind: LineTablesOnly, file: !1, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
69 !1 = !DIFile(filename: "source.cpp", directory: ".")
71 !4 = distinct !DISubprogram(name: "test_switch", line: 1, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: true, unit: !0, scopeLine: 1, file: !1, scope: !5, type: !6, retainedNodes: !2)
72 !5 = !DIFile(filename: "source.cpp", directory: ".")
73 !6 = !DISubroutineType(types: !2)
74 !7 = !{i32 2, !"Dwarf Version", i32 2}
75 !8 = !{i32 2, !"Debug Info Version", i32 3}
76 !9 = !{!"clang version 3.5.0"}
77 !10 = !DILocation(line: 3, column: 8, scope: !11)
78 !11 = distinct !DILexicalBlock(line: 3, column: 3, file: !1, scope: !4)
79 !12 = !{!12, !13, !13}
80 !13 = !{!"llvm.loop.vectorize.enable", i1 true}
81 !14 = !DILocation(line: 4, column: 5, scope: !15)
82 !15 = distinct !DILexicalBlock(line: 3, column: 36, file: !1, scope: !11)
83 !16 = !{!17, !17, i64 0}
84 !17 = !{!"int", !18, i64 0}
85 !18 = !{!"omnipotent char", !19, i64 0}
86 !19 = !{!"Simple C/C++ TBAA"}
87 !20 = !DILocation(line: 6, column: 7, scope: !21)
88 !21 = distinct !DILexicalBlock(line: 4, column: 18, file: !1, scope: !15)
89 !22 = !DILocation(line: 7, column: 5, scope: !21)
90 !23 = !DILocation(line: 9, column: 7, scope: !21)
91 !24 = !DILocation(line: 14, column: 1, scope: !4)