1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2 ; Check remark analysis runs successfully.
3 ; TODO: Remove this test when we fully migrate to VPlan-based cost model.
4 ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -pass-remarks-analysis=loop-vectorize -S | FileCheck %s
6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
8 define i32 @reduction_sum(ptr noalias nocapture %A, ptr noalias nocapture %B) {
9 ; CHECK-LABEL: define i32 @reduction_sum(
10 ; CHECK-SAME: ptr noalias captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]]) {
11 ; CHECK-NEXT: [[ENTRY:.*]]:
12 ; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
13 ; CHECK: [[VECTOR_PH]]:
14 ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
15 ; CHECK: [[VECTOR_BODY]]:
16 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
17 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[TMP4:%.*]], %[[VECTOR_BODY]] ]
18 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
19 ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP0]]
20 ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
21 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4
22 ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]])
23 ; CHECK-NEXT: [[TMP4]] = add i32 [[TMP3]], [[VEC_PHI]]
24 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
25 ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
26 ; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
27 ; CHECK: [[MIDDLE_BLOCK]]:
28 ; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
29 ; CHECK: [[SCALAR_PH]]:
30 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 256, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
31 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
32 ; CHECK-NEXT: br label %[[BODY:.*]]
34 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
35 ; CHECK-NEXT: [[SUM_TMP:%.*]] = phi i32 [ [[SUM:%.*]], %[[BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]
36 ; CHECK-NEXT: [[GEP0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]]
37 ; CHECK-NEXT: [[LOAD0:%.*]] = load i32, ptr [[GEP0]], align 4
38 ; CHECK-NEXT: [[SUM]] = add i32 [[SUM_TMP]], [[LOAD0]]
39 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
40 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 256
41 ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[BODY]], !llvm.loop [[LOOP3:![0-9]+]]
43 ; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[SUM]], %[[BODY]] ], [ [[TMP4]], %[[MIDDLE_BLOCK]] ]
44 ; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
49 body: ; preds = %entry, %body
50 %indvars.iv = phi i64 [ %indvars.iv.next, %body ], [ 0, %entry ]
51 %sum.tmp = phi i32 [ %sum, %body ], [ 0, %entry ]
52 %gep0 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
53 %load0 = load i32, ptr %gep0, align 4
54 %sum = add i32 %sum.tmp, %load0
55 %indvars.iv.next = add i64 %indvars.iv, 1
56 %exitcond = icmp eq i64 %indvars.iv.next, 256
57 br i1 %exitcond, label %exit, label %body
60 %sum.0.lcssa = phi i32 [ %sum, %body ]
64 ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
65 ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
66 ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
67 ; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}