1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer -S | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64"
7 ; This test has mutual reductions, referencing the same data:
11 ; It currently doesn't SLP vectorize, but should.
13 define i64 @straight(ptr nocapture noundef readonly %p, i32 noundef %st) {
14 ; CHECK-LABEL: @straight(
16 ; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[ST:%.*]] to i64
17 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i16, ptr [[P:%.*]], i64 [[IDX_EXT]]
18 ; CHECK-NEXT: [[ADD_PTR_1:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR]], i64 [[IDX_EXT]]
19 ; CHECK-NEXT: [[ADD_PTR_2:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR_1]], i64 [[IDX_EXT]]
20 ; CHECK-NEXT: [[ADD_PTR_3:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR_2]], i64 [[IDX_EXT]]
21 ; CHECK-NEXT: [[ADD_PTR_4:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR_3]], i64 [[IDX_EXT]]
22 ; CHECK-NEXT: [[ADD_PTR_5:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR_4]], i64 [[IDX_EXT]]
23 ; CHECK-NEXT: [[ADD_PTR_6:%.*]] = getelementptr inbounds i16, ptr [[ADD_PTR_5]], i64 [[IDX_EXT]]
24 ; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[P]], align 2
25 ; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr [[ADD_PTR]], align 2
26 ; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[ADD_PTR_1]], align 2
27 ; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i16>, ptr [[ADD_PTR_2]], align 2
28 ; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i16>, ptr [[ADD_PTR_3]], align 2
29 ; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i16>, ptr [[ADD_PTR_4]], align 2
30 ; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i16>, ptr [[ADD_PTR_5]], align 2
31 ; CHECK-NEXT: [[TMP7:%.*]] = load <8 x i16>, ptr [[ADD_PTR_6]], align 2
32 ; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> poison, <8 x i16> [[TMP0]], i64 0)
33 ; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP8]], <8 x i16> [[TMP1]], i64 8)
34 ; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP9]], <8 x i16> [[TMP2]], i64 16)
35 ; CHECK-NEXT: [[TMP11:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP10]], <8 x i16> [[TMP3]], i64 24)
36 ; CHECK-NEXT: [[TMP12:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP11]], <8 x i16> [[TMP4]], i64 32)
37 ; CHECK-NEXT: [[TMP13:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP12]], <8 x i16> [[TMP5]], i64 40)
38 ; CHECK-NEXT: [[TMP14:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP13]], <8 x i16> [[TMP6]], i64 48)
39 ; CHECK-NEXT: [[TMP15:%.*]] = call <64 x i16> @llvm.vector.insert.v64i16.v8i16(<64 x i16> [[TMP14]], <8 x i16> [[TMP7]], i64 56)
40 ; CHECK-NEXT: [[TMP16:%.*]] = zext <64 x i16> [[TMP15]] to <64 x i32>
41 ; CHECK-NEXT: [[TMP17:%.*]] = extractelement <64 x i32> [[TMP16]], i32 0
42 ; CHECK-NEXT: [[TMP18:%.*]] = extractelement <64 x i32> [[TMP16]], i32 1
43 ; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i32 [[TMP17]], [[TMP18]]
44 ; CHECK-NEXT: [[TMP19:%.*]] = mul nuw nsw <64 x i32> [[TMP16]], [[TMP16]]
45 ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <64 x i32> [[TMP16]], i32 2
46 ; CHECK-NEXT: [[ADD_2:%.*]] = add nuw nsw i32 [[ADD_1]], [[TMP20]]
47 ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <64 x i32> [[TMP16]], i32 3
48 ; CHECK-NEXT: [[ADD_3:%.*]] = add nuw nsw i32 [[ADD_2]], [[TMP21]]
49 ; CHECK-NEXT: [[TMP22:%.*]] = extractelement <64 x i32> [[TMP16]], i32 4
50 ; CHECK-NEXT: [[ADD_4:%.*]] = add nuw nsw i32 [[ADD_3]], [[TMP22]]
51 ; CHECK-NEXT: [[TMP23:%.*]] = extractelement <64 x i32> [[TMP16]], i32 5
52 ; CHECK-NEXT: [[ADD_5:%.*]] = add nuw nsw i32 [[ADD_4]], [[TMP23]]
53 ; CHECK-NEXT: [[TMP24:%.*]] = extractelement <64 x i32> [[TMP16]], i32 6
54 ; CHECK-NEXT: [[ADD_6:%.*]] = add nuw nsw i32 [[ADD_5]], [[TMP24]]
55 ; CHECK-NEXT: [[TMP25:%.*]] = extractelement <64 x i32> [[TMP16]], i32 7
56 ; CHECK-NEXT: [[ADD_7:%.*]] = add nuw nsw i32 [[ADD_6]], [[TMP25]]
57 ; CHECK-NEXT: [[TMP26:%.*]] = extractelement <64 x i32> [[TMP16]], i32 8
58 ; CHECK-NEXT: [[ADD_141:%.*]] = add nuw nsw i32 [[ADD_7]], [[TMP26]]
59 ; CHECK-NEXT: [[TMP27:%.*]] = extractelement <64 x i32> [[TMP16]], i32 9
60 ; CHECK-NEXT: [[ADD_1_1:%.*]] = add nuw nsw i32 [[ADD_141]], [[TMP27]]
61 ; CHECK-NEXT: [[TMP28:%.*]] = extractelement <64 x i32> [[TMP16]], i32 10
62 ; CHECK-NEXT: [[ADD_2_1:%.*]] = add nuw nsw i32 [[ADD_1_1]], [[TMP28]]
63 ; CHECK-NEXT: [[TMP29:%.*]] = extractelement <64 x i32> [[TMP16]], i32 11
64 ; CHECK-NEXT: [[ADD_3_1:%.*]] = add nuw nsw i32 [[ADD_2_1]], [[TMP29]]
65 ; CHECK-NEXT: [[TMP30:%.*]] = extractelement <64 x i32> [[TMP16]], i32 12
66 ; CHECK-NEXT: [[ADD_4_1:%.*]] = add nuw nsw i32 [[ADD_3_1]], [[TMP30]]
67 ; CHECK-NEXT: [[TMP31:%.*]] = extractelement <64 x i32> [[TMP16]], i32 13
68 ; CHECK-NEXT: [[ADD_5_1:%.*]] = add nuw nsw i32 [[ADD_4_1]], [[TMP31]]
69 ; CHECK-NEXT: [[TMP32:%.*]] = extractelement <64 x i32> [[TMP16]], i32 14
70 ; CHECK-NEXT: [[ADD_6_1:%.*]] = add nuw nsw i32 [[ADD_5_1]], [[TMP32]]
71 ; CHECK-NEXT: [[TMP33:%.*]] = extractelement <64 x i32> [[TMP16]], i32 15
72 ; CHECK-NEXT: [[ADD_7_1:%.*]] = add nuw nsw i32 [[ADD_6_1]], [[TMP33]]
73 ; CHECK-NEXT: [[TMP34:%.*]] = extractelement <64 x i32> [[TMP16]], i32 16
74 ; CHECK-NEXT: [[ADD_245:%.*]] = add nuw nsw i32 [[ADD_7_1]], [[TMP34]]
75 ; CHECK-NEXT: [[TMP35:%.*]] = extractelement <64 x i32> [[TMP16]], i32 17
76 ; CHECK-NEXT: [[ADD_1_2:%.*]] = add nuw nsw i32 [[ADD_245]], [[TMP35]]
77 ; CHECK-NEXT: [[TMP36:%.*]] = extractelement <64 x i32> [[TMP16]], i32 18
78 ; CHECK-NEXT: [[ADD_2_2:%.*]] = add nuw nsw i32 [[ADD_1_2]], [[TMP36]]
79 ; CHECK-NEXT: [[TMP37:%.*]] = extractelement <64 x i32> [[TMP16]], i32 19
80 ; CHECK-NEXT: [[ADD_3_2:%.*]] = add nuw nsw i32 [[ADD_2_2]], [[TMP37]]
81 ; CHECK-NEXT: [[TMP38:%.*]] = extractelement <64 x i32> [[TMP16]], i32 20
82 ; CHECK-NEXT: [[ADD_4_2:%.*]] = add nuw nsw i32 [[ADD_3_2]], [[TMP38]]
83 ; CHECK-NEXT: [[TMP39:%.*]] = extractelement <64 x i32> [[TMP16]], i32 21
84 ; CHECK-NEXT: [[ADD_5_2:%.*]] = add nuw nsw i32 [[ADD_4_2]], [[TMP39]]
85 ; CHECK-NEXT: [[TMP40:%.*]] = extractelement <64 x i32> [[TMP16]], i32 22
86 ; CHECK-NEXT: [[ADD_6_2:%.*]] = add nuw nsw i32 [[ADD_5_2]], [[TMP40]]
87 ; CHECK-NEXT: [[TMP41:%.*]] = extractelement <64 x i32> [[TMP16]], i32 23
88 ; CHECK-NEXT: [[ADD_7_2:%.*]] = add nuw nsw i32 [[ADD_6_2]], [[TMP41]]
89 ; CHECK-NEXT: [[TMP42:%.*]] = extractelement <64 x i32> [[TMP16]], i32 24
90 ; CHECK-NEXT: [[ADD_349:%.*]] = add nuw nsw i32 [[ADD_7_2]], [[TMP42]]
91 ; CHECK-NEXT: [[TMP43:%.*]] = extractelement <64 x i32> [[TMP16]], i32 25
92 ; CHECK-NEXT: [[ADD_1_3:%.*]] = add nuw nsw i32 [[ADD_349]], [[TMP43]]
93 ; CHECK-NEXT: [[TMP44:%.*]] = extractelement <64 x i32> [[TMP16]], i32 26
94 ; CHECK-NEXT: [[ADD_2_3:%.*]] = add nuw nsw i32 [[ADD_1_3]], [[TMP44]]
95 ; CHECK-NEXT: [[TMP45:%.*]] = extractelement <64 x i32> [[TMP16]], i32 27
96 ; CHECK-NEXT: [[ADD_3_3:%.*]] = add nuw nsw i32 [[ADD_2_3]], [[TMP45]]
97 ; CHECK-NEXT: [[TMP46:%.*]] = extractelement <64 x i32> [[TMP16]], i32 28
98 ; CHECK-NEXT: [[ADD_4_3:%.*]] = add nuw nsw i32 [[ADD_3_3]], [[TMP46]]
99 ; CHECK-NEXT: [[TMP47:%.*]] = extractelement <64 x i32> [[TMP16]], i32 29
100 ; CHECK-NEXT: [[ADD_5_3:%.*]] = add nuw nsw i32 [[ADD_4_3]], [[TMP47]]
101 ; CHECK-NEXT: [[TMP48:%.*]] = extractelement <64 x i32> [[TMP16]], i32 30
102 ; CHECK-NEXT: [[ADD_6_3:%.*]] = add nuw nsw i32 [[ADD_5_3]], [[TMP48]]
103 ; CHECK-NEXT: [[TMP49:%.*]] = extractelement <64 x i32> [[TMP16]], i32 31
104 ; CHECK-NEXT: [[ADD_7_3:%.*]] = add nuw nsw i32 [[ADD_6_3]], [[TMP49]]
105 ; CHECK-NEXT: [[TMP50:%.*]] = extractelement <64 x i32> [[TMP16]], i32 32
106 ; CHECK-NEXT: [[ADD_453:%.*]] = add nuw nsw i32 [[ADD_7_3]], [[TMP50]]
107 ; CHECK-NEXT: [[TMP51:%.*]] = extractelement <64 x i32> [[TMP16]], i32 33
108 ; CHECK-NEXT: [[ADD_1_4:%.*]] = add nuw nsw i32 [[ADD_453]], [[TMP51]]
109 ; CHECK-NEXT: [[TMP52:%.*]] = extractelement <64 x i32> [[TMP16]], i32 34
110 ; CHECK-NEXT: [[ADD_2_4:%.*]] = add nuw nsw i32 [[ADD_1_4]], [[TMP52]]
111 ; CHECK-NEXT: [[TMP53:%.*]] = extractelement <64 x i32> [[TMP16]], i32 35
112 ; CHECK-NEXT: [[ADD_3_4:%.*]] = add nuw nsw i32 [[ADD_2_4]], [[TMP53]]
113 ; CHECK-NEXT: [[TMP54:%.*]] = extractelement <64 x i32> [[TMP16]], i32 36
114 ; CHECK-NEXT: [[ADD_4_4:%.*]] = add nuw nsw i32 [[ADD_3_4]], [[TMP54]]
115 ; CHECK-NEXT: [[TMP55:%.*]] = extractelement <64 x i32> [[TMP16]], i32 37
116 ; CHECK-NEXT: [[ADD_5_4:%.*]] = add nuw nsw i32 [[ADD_4_4]], [[TMP55]]
117 ; CHECK-NEXT: [[TMP56:%.*]] = extractelement <64 x i32> [[TMP16]], i32 38
118 ; CHECK-NEXT: [[ADD_6_4:%.*]] = add nuw nsw i32 [[ADD_5_4]], [[TMP56]]
119 ; CHECK-NEXT: [[TMP57:%.*]] = extractelement <64 x i32> [[TMP16]], i32 39
120 ; CHECK-NEXT: [[ADD_7_4:%.*]] = add nuw nsw i32 [[ADD_6_4]], [[TMP57]]
121 ; CHECK-NEXT: [[TMP58:%.*]] = extractelement <64 x i32> [[TMP16]], i32 40
122 ; CHECK-NEXT: [[ADD_557:%.*]] = add nuw nsw i32 [[ADD_7_4]], [[TMP58]]
123 ; CHECK-NEXT: [[TMP59:%.*]] = extractelement <64 x i32> [[TMP16]], i32 41
124 ; CHECK-NEXT: [[ADD_1_5:%.*]] = add nuw nsw i32 [[ADD_557]], [[TMP59]]
125 ; CHECK-NEXT: [[TMP60:%.*]] = extractelement <64 x i32> [[TMP16]], i32 42
126 ; CHECK-NEXT: [[ADD_2_5:%.*]] = add nuw nsw i32 [[ADD_1_5]], [[TMP60]]
127 ; CHECK-NEXT: [[TMP61:%.*]] = extractelement <64 x i32> [[TMP16]], i32 43
128 ; CHECK-NEXT: [[ADD_3_5:%.*]] = add nuw nsw i32 [[ADD_2_5]], [[TMP61]]
129 ; CHECK-NEXT: [[TMP62:%.*]] = extractelement <64 x i32> [[TMP16]], i32 44
130 ; CHECK-NEXT: [[ADD_4_5:%.*]] = add nuw nsw i32 [[ADD_3_5]], [[TMP62]]
131 ; CHECK-NEXT: [[TMP63:%.*]] = extractelement <64 x i32> [[TMP16]], i32 45
132 ; CHECK-NEXT: [[ADD_5_5:%.*]] = add nuw nsw i32 [[ADD_4_5]], [[TMP63]]
133 ; CHECK-NEXT: [[TMP64:%.*]] = extractelement <64 x i32> [[TMP16]], i32 46
134 ; CHECK-NEXT: [[ADD_6_5:%.*]] = add nuw nsw i32 [[ADD_5_5]], [[TMP64]]
135 ; CHECK-NEXT: [[TMP65:%.*]] = extractelement <64 x i32> [[TMP16]], i32 47
136 ; CHECK-NEXT: [[ADD_7_5:%.*]] = add nuw nsw i32 [[ADD_6_5]], [[TMP65]]
137 ; CHECK-NEXT: [[TMP66:%.*]] = extractelement <64 x i32> [[TMP16]], i32 48
138 ; CHECK-NEXT: [[ADD_661:%.*]] = add nuw nsw i32 [[ADD_7_5]], [[TMP66]]
139 ; CHECK-NEXT: [[TMP67:%.*]] = extractelement <64 x i32> [[TMP16]], i32 49
140 ; CHECK-NEXT: [[ADD_1_6:%.*]] = add nuw nsw i32 [[ADD_661]], [[TMP67]]
141 ; CHECK-NEXT: [[TMP68:%.*]] = extractelement <64 x i32> [[TMP16]], i32 50
142 ; CHECK-NEXT: [[ADD_2_6:%.*]] = add nuw nsw i32 [[ADD_1_6]], [[TMP68]]
143 ; CHECK-NEXT: [[TMP69:%.*]] = extractelement <64 x i32> [[TMP16]], i32 51
144 ; CHECK-NEXT: [[ADD_3_6:%.*]] = add nuw nsw i32 [[ADD_2_6]], [[TMP69]]
145 ; CHECK-NEXT: [[TMP70:%.*]] = extractelement <64 x i32> [[TMP16]], i32 52
146 ; CHECK-NEXT: [[ADD_4_6:%.*]] = add nuw nsw i32 [[ADD_3_6]], [[TMP70]]
147 ; CHECK-NEXT: [[TMP71:%.*]] = extractelement <64 x i32> [[TMP16]], i32 53
148 ; CHECK-NEXT: [[ADD_5_6:%.*]] = add nuw nsw i32 [[ADD_4_6]], [[TMP71]]
149 ; CHECK-NEXT: [[TMP72:%.*]] = extractelement <64 x i32> [[TMP16]], i32 54
150 ; CHECK-NEXT: [[ADD_6_6:%.*]] = add nuw nsw i32 [[ADD_5_6]], [[TMP72]]
151 ; CHECK-NEXT: [[TMP73:%.*]] = extractelement <64 x i32> [[TMP16]], i32 55
152 ; CHECK-NEXT: [[ADD_7_6:%.*]] = add nuw nsw i32 [[ADD_6_6]], [[TMP73]]
153 ; CHECK-NEXT: [[TMP74:%.*]] = extractelement <64 x i32> [[TMP16]], i32 56
154 ; CHECK-NEXT: [[ADD_765:%.*]] = add nuw nsw i32 [[ADD_7_6]], [[TMP74]]
155 ; CHECK-NEXT: [[TMP75:%.*]] = extractelement <64 x i32> [[TMP16]], i32 57
156 ; CHECK-NEXT: [[ADD_1_7:%.*]] = add nuw nsw i32 [[ADD_765]], [[TMP75]]
157 ; CHECK-NEXT: [[TMP76:%.*]] = extractelement <64 x i32> [[TMP16]], i32 58
158 ; CHECK-NEXT: [[ADD_2_7:%.*]] = add nuw nsw i32 [[ADD_1_7]], [[TMP76]]
159 ; CHECK-NEXT: [[TMP77:%.*]] = extractelement <64 x i32> [[TMP16]], i32 59
160 ; CHECK-NEXT: [[ADD_3_7:%.*]] = add nuw nsw i32 [[ADD_2_7]], [[TMP77]]
161 ; CHECK-NEXT: [[TMP78:%.*]] = extractelement <64 x i32> [[TMP16]], i32 60
162 ; CHECK-NEXT: [[ADD_4_7:%.*]] = add nuw nsw i32 [[ADD_3_7]], [[TMP78]]
163 ; CHECK-NEXT: [[TMP79:%.*]] = extractelement <64 x i32> [[TMP16]], i32 61
164 ; CHECK-NEXT: [[ADD_5_7:%.*]] = add nuw nsw i32 [[ADD_4_7]], [[TMP79]]
165 ; CHECK-NEXT: [[TMP80:%.*]] = extractelement <64 x i32> [[TMP16]], i32 62
166 ; CHECK-NEXT: [[ADD_6_7:%.*]] = add nuw nsw i32 [[ADD_5_7]], [[TMP80]]
167 ; CHECK-NEXT: [[TMP81:%.*]] = extractelement <64 x i32> [[TMP16]], i32 63
168 ; CHECK-NEXT: [[ADD_7_7:%.*]] = add nuw nsw i32 [[ADD_6_7]], [[TMP81]]
169 ; CHECK-NEXT: [[TMP82:%.*]] = call i32 @llvm.vector.reduce.add.v64i32(<64 x i32> [[TMP19]])
170 ; CHECK-NEXT: [[CONV15:%.*]] = zext i32 [[ADD_7_7]] to i64
171 ; CHECK-NEXT: [[CONV16:%.*]] = zext i32 [[TMP82]] to i64
172 ; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 [[CONV16]], 32
173 ; CHECK-NEXT: [[ADD17:%.*]] = or i64 [[SHL]], [[CONV15]]
174 ; CHECK-NEXT: ret i64 [[ADD17]]
177 %idx.ext = sext i32 %st to i64
178 %0 = load i16, ptr %p, align 2
179 %conv = zext i16 %0 to i32
180 %mul = mul nuw nsw i32 %conv, %conv
181 %arrayidx.1 = getelementptr inbounds i16, ptr %p, i64 1
182 %1 = load i16, ptr %arrayidx.1, align 2
183 %conv.1 = zext i16 %1 to i32
184 %add.1 = add nuw nsw i32 %conv, %conv.1
185 %mul.1 = mul nuw nsw i32 %conv.1, %conv.1
186 %add11.1 = add nuw i32 %mul.1, %mul
187 %arrayidx.2 = getelementptr inbounds i16, ptr %p, i64 2
188 %2 = load i16, ptr %arrayidx.2, align 2
189 %conv.2 = zext i16 %2 to i32
190 %add.2 = add nuw nsw i32 %add.1, %conv.2
191 %mul.2 = mul nuw nsw i32 %conv.2, %conv.2
192 %add11.2 = add i32 %mul.2, %add11.1
193 %arrayidx.3 = getelementptr inbounds i16, ptr %p, i64 3
194 %3 = load i16, ptr %arrayidx.3, align 2
195 %conv.3 = zext i16 %3 to i32
196 %add.3 = add nuw nsw i32 %add.2, %conv.3
197 %mul.3 = mul nuw nsw i32 %conv.3, %conv.3
198 %add11.3 = add i32 %mul.3, %add11.2
199 %arrayidx.4 = getelementptr inbounds i16, ptr %p, i64 4
200 %4 = load i16, ptr %arrayidx.4, align 2
201 %conv.4 = zext i16 %4 to i32
202 %add.4 = add nuw nsw i32 %add.3, %conv.4
203 %mul.4 = mul nuw nsw i32 %conv.4, %conv.4
204 %add11.4 = add i32 %mul.4, %add11.3
205 %arrayidx.5 = getelementptr inbounds i16, ptr %p, i64 5
206 %5 = load i16, ptr %arrayidx.5, align 2
207 %conv.5 = zext i16 %5 to i32
208 %add.5 = add nuw nsw i32 %add.4, %conv.5
209 %mul.5 = mul nuw nsw i32 %conv.5, %conv.5
210 %add11.5 = add i32 %mul.5, %add11.4
211 %arrayidx.6 = getelementptr inbounds i16, ptr %p, i64 6
212 %6 = load i16, ptr %arrayidx.6, align 2
213 %conv.6 = zext i16 %6 to i32
214 %add.6 = add nuw nsw i32 %add.5, %conv.6
215 %mul.6 = mul nuw nsw i32 %conv.6, %conv.6
216 %add11.6 = add i32 %mul.6, %add11.5
217 %arrayidx.7 = getelementptr inbounds i16, ptr %p, i64 7
218 %7 = load i16, ptr %arrayidx.7, align 2
219 %conv.7 = zext i16 %7 to i32
220 %add.7 = add nuw nsw i32 %add.6, %conv.7
221 %mul.7 = mul nuw nsw i32 %conv.7, %conv.7
222 %add11.7 = add i32 %mul.7, %add11.6
223 %add.ptr = getelementptr inbounds i16, ptr %p, i64 %idx.ext
224 %8 = load i16, ptr %add.ptr, align 2
225 %conv.140 = zext i16 %8 to i32
226 %add.141 = add nuw nsw i32 %add.7, %conv.140
227 %mul.142 = mul nuw nsw i32 %conv.140, %conv.140
228 %add11.143 = add i32 %mul.142, %add11.7
229 %arrayidx.1.1 = getelementptr inbounds i16, ptr %add.ptr, i64 1
230 %9 = load i16, ptr %arrayidx.1.1, align 2
231 %conv.1.1 = zext i16 %9 to i32
232 %add.1.1 = add nuw nsw i32 %add.141, %conv.1.1
233 %mul.1.1 = mul nuw nsw i32 %conv.1.1, %conv.1.1
234 %add11.1.1 = add i32 %mul.1.1, %add11.143
235 %arrayidx.2.1 = getelementptr inbounds i16, ptr %add.ptr, i64 2
236 %10 = load i16, ptr %arrayidx.2.1, align 2
237 %conv.2.1 = zext i16 %10 to i32
238 %add.2.1 = add nuw nsw i32 %add.1.1, %conv.2.1
239 %mul.2.1 = mul nuw nsw i32 %conv.2.1, %conv.2.1
240 %add11.2.1 = add i32 %mul.2.1, %add11.1.1
241 %arrayidx.3.1 = getelementptr inbounds i16, ptr %add.ptr, i64 3
242 %11 = load i16, ptr %arrayidx.3.1, align 2
243 %conv.3.1 = zext i16 %11 to i32
244 %add.3.1 = add nuw nsw i32 %add.2.1, %conv.3.1
245 %mul.3.1 = mul nuw nsw i32 %conv.3.1, %conv.3.1
246 %add11.3.1 = add i32 %mul.3.1, %add11.2.1
247 %arrayidx.4.1 = getelementptr inbounds i16, ptr %add.ptr, i64 4
248 %12 = load i16, ptr %arrayidx.4.1, align 2
249 %conv.4.1 = zext i16 %12 to i32
250 %add.4.1 = add nuw nsw i32 %add.3.1, %conv.4.1
251 %mul.4.1 = mul nuw nsw i32 %conv.4.1, %conv.4.1
252 %add11.4.1 = add i32 %mul.4.1, %add11.3.1
253 %arrayidx.5.1 = getelementptr inbounds i16, ptr %add.ptr, i64 5
254 %13 = load i16, ptr %arrayidx.5.1, align 2
255 %conv.5.1 = zext i16 %13 to i32
256 %add.5.1 = add nuw nsw i32 %add.4.1, %conv.5.1
257 %mul.5.1 = mul nuw nsw i32 %conv.5.1, %conv.5.1
258 %add11.5.1 = add i32 %mul.5.1, %add11.4.1
259 %arrayidx.6.1 = getelementptr inbounds i16, ptr %add.ptr, i64 6
260 %14 = load i16, ptr %arrayidx.6.1, align 2
261 %conv.6.1 = zext i16 %14 to i32
262 %add.6.1 = add nuw nsw i32 %add.5.1, %conv.6.1
263 %mul.6.1 = mul nuw nsw i32 %conv.6.1, %conv.6.1
264 %add11.6.1 = add i32 %mul.6.1, %add11.5.1
265 %arrayidx.7.1 = getelementptr inbounds i16, ptr %add.ptr, i64 7
266 %15 = load i16, ptr %arrayidx.7.1, align 2
267 %conv.7.1 = zext i16 %15 to i32
268 %add.7.1 = add nuw nsw i32 %add.6.1, %conv.7.1
269 %mul.7.1 = mul nuw nsw i32 %conv.7.1, %conv.7.1
270 %add11.7.1 = add i32 %mul.7.1, %add11.6.1
271 %add.ptr.1 = getelementptr inbounds i16, ptr %add.ptr, i64 %idx.ext
272 %16 = load i16, ptr %add.ptr.1, align 2
273 %conv.244 = zext i16 %16 to i32
274 %add.245 = add nuw nsw i32 %add.7.1, %conv.244
275 %mul.246 = mul nuw nsw i32 %conv.244, %conv.244
276 %add11.247 = add i32 %mul.246, %add11.7.1
277 %arrayidx.1.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 1
278 %17 = load i16, ptr %arrayidx.1.2, align 2
279 %conv.1.2 = zext i16 %17 to i32
280 %add.1.2 = add nuw nsw i32 %add.245, %conv.1.2
281 %mul.1.2 = mul nuw nsw i32 %conv.1.2, %conv.1.2
282 %add11.1.2 = add i32 %mul.1.2, %add11.247
283 %arrayidx.2.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 2
284 %18 = load i16, ptr %arrayidx.2.2, align 2
285 %conv.2.2 = zext i16 %18 to i32
286 %add.2.2 = add nuw nsw i32 %add.1.2, %conv.2.2
287 %mul.2.2 = mul nuw nsw i32 %conv.2.2, %conv.2.2
288 %add11.2.2 = add i32 %mul.2.2, %add11.1.2
289 %arrayidx.3.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 3
290 %19 = load i16, ptr %arrayidx.3.2, align 2
291 %conv.3.2 = zext i16 %19 to i32
292 %add.3.2 = add nuw nsw i32 %add.2.2, %conv.3.2
293 %mul.3.2 = mul nuw nsw i32 %conv.3.2, %conv.3.2
294 %add11.3.2 = add i32 %mul.3.2, %add11.2.2
295 %arrayidx.4.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 4
296 %20 = load i16, ptr %arrayidx.4.2, align 2
297 %conv.4.2 = zext i16 %20 to i32
298 %add.4.2 = add nuw nsw i32 %add.3.2, %conv.4.2
299 %mul.4.2 = mul nuw nsw i32 %conv.4.2, %conv.4.2
300 %add11.4.2 = add i32 %mul.4.2, %add11.3.2
301 %arrayidx.5.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 5
302 %21 = load i16, ptr %arrayidx.5.2, align 2
303 %conv.5.2 = zext i16 %21 to i32
304 %add.5.2 = add nuw nsw i32 %add.4.2, %conv.5.2
305 %mul.5.2 = mul nuw nsw i32 %conv.5.2, %conv.5.2
306 %add11.5.2 = add i32 %mul.5.2, %add11.4.2
307 %arrayidx.6.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 6
308 %22 = load i16, ptr %arrayidx.6.2, align 2
309 %conv.6.2 = zext i16 %22 to i32
310 %add.6.2 = add nuw nsw i32 %add.5.2, %conv.6.2
311 %mul.6.2 = mul nuw nsw i32 %conv.6.2, %conv.6.2
312 %add11.6.2 = add i32 %mul.6.2, %add11.5.2
313 %arrayidx.7.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 7
314 %23 = load i16, ptr %arrayidx.7.2, align 2
315 %conv.7.2 = zext i16 %23 to i32
316 %add.7.2 = add nuw nsw i32 %add.6.2, %conv.7.2
317 %mul.7.2 = mul nuw nsw i32 %conv.7.2, %conv.7.2
318 %add11.7.2 = add i32 %mul.7.2, %add11.6.2
319 %add.ptr.2 = getelementptr inbounds i16, ptr %add.ptr.1, i64 %idx.ext
320 %24 = load i16, ptr %add.ptr.2, align 2
321 %conv.348 = zext i16 %24 to i32
322 %add.349 = add nuw nsw i32 %add.7.2, %conv.348
323 %mul.350 = mul nuw nsw i32 %conv.348, %conv.348
324 %add11.351 = add i32 %mul.350, %add11.7.2
325 %arrayidx.1.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 1
326 %25 = load i16, ptr %arrayidx.1.3, align 2
327 %conv.1.3 = zext i16 %25 to i32
328 %add.1.3 = add nuw nsw i32 %add.349, %conv.1.3
329 %mul.1.3 = mul nuw nsw i32 %conv.1.3, %conv.1.3
330 %add11.1.3 = add i32 %mul.1.3, %add11.351
331 %arrayidx.2.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 2
332 %26 = load i16, ptr %arrayidx.2.3, align 2
333 %conv.2.3 = zext i16 %26 to i32
334 %add.2.3 = add nuw nsw i32 %add.1.3, %conv.2.3
335 %mul.2.3 = mul nuw nsw i32 %conv.2.3, %conv.2.3
336 %add11.2.3 = add i32 %mul.2.3, %add11.1.3
337 %arrayidx.3.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 3
338 %27 = load i16, ptr %arrayidx.3.3, align 2
339 %conv.3.3 = zext i16 %27 to i32
340 %add.3.3 = add nuw nsw i32 %add.2.3, %conv.3.3
341 %mul.3.3 = mul nuw nsw i32 %conv.3.3, %conv.3.3
342 %add11.3.3 = add i32 %mul.3.3, %add11.2.3
343 %arrayidx.4.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 4
344 %28 = load i16, ptr %arrayidx.4.3, align 2
345 %conv.4.3 = zext i16 %28 to i32
346 %add.4.3 = add nuw nsw i32 %add.3.3, %conv.4.3
347 %mul.4.3 = mul nuw nsw i32 %conv.4.3, %conv.4.3
348 %add11.4.3 = add i32 %mul.4.3, %add11.3.3
349 %arrayidx.5.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 5
350 %29 = load i16, ptr %arrayidx.5.3, align 2
351 %conv.5.3 = zext i16 %29 to i32
352 %add.5.3 = add nuw nsw i32 %add.4.3, %conv.5.3
353 %mul.5.3 = mul nuw nsw i32 %conv.5.3, %conv.5.3
354 %add11.5.3 = add i32 %mul.5.3, %add11.4.3
355 %arrayidx.6.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 6
356 %30 = load i16, ptr %arrayidx.6.3, align 2
357 %conv.6.3 = zext i16 %30 to i32
358 %add.6.3 = add nuw nsw i32 %add.5.3, %conv.6.3
359 %mul.6.3 = mul nuw nsw i32 %conv.6.3, %conv.6.3
360 %add11.6.3 = add i32 %mul.6.3, %add11.5.3
361 %arrayidx.7.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 7
362 %31 = load i16, ptr %arrayidx.7.3, align 2
363 %conv.7.3 = zext i16 %31 to i32
364 %add.7.3 = add nuw nsw i32 %add.6.3, %conv.7.3
365 %mul.7.3 = mul nuw nsw i32 %conv.7.3, %conv.7.3
366 %add11.7.3 = add i32 %mul.7.3, %add11.6.3
367 %add.ptr.3 = getelementptr inbounds i16, ptr %add.ptr.2, i64 %idx.ext
368 %32 = load i16, ptr %add.ptr.3, align 2
369 %conv.452 = zext i16 %32 to i32
370 %add.453 = add nuw nsw i32 %add.7.3, %conv.452
371 %mul.454 = mul nuw nsw i32 %conv.452, %conv.452
372 %add11.455 = add i32 %mul.454, %add11.7.3
373 %arrayidx.1.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 1
374 %33 = load i16, ptr %arrayidx.1.4, align 2
375 %conv.1.4 = zext i16 %33 to i32
376 %add.1.4 = add nuw nsw i32 %add.453, %conv.1.4
377 %mul.1.4 = mul nuw nsw i32 %conv.1.4, %conv.1.4
378 %add11.1.4 = add i32 %mul.1.4, %add11.455
379 %arrayidx.2.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 2
380 %34 = load i16, ptr %arrayidx.2.4, align 2
381 %conv.2.4 = zext i16 %34 to i32
382 %add.2.4 = add nuw nsw i32 %add.1.4, %conv.2.4
383 %mul.2.4 = mul nuw nsw i32 %conv.2.4, %conv.2.4
384 %add11.2.4 = add i32 %mul.2.4, %add11.1.4
385 %arrayidx.3.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 3
386 %35 = load i16, ptr %arrayidx.3.4, align 2
387 %conv.3.4 = zext i16 %35 to i32
388 %add.3.4 = add nuw nsw i32 %add.2.4, %conv.3.4
389 %mul.3.4 = mul nuw nsw i32 %conv.3.4, %conv.3.4
390 %add11.3.4 = add i32 %mul.3.4, %add11.2.4
391 %arrayidx.4.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 4
392 %36 = load i16, ptr %arrayidx.4.4, align 2
393 %conv.4.4 = zext i16 %36 to i32
394 %add.4.4 = add nuw nsw i32 %add.3.4, %conv.4.4
395 %mul.4.4 = mul nuw nsw i32 %conv.4.4, %conv.4.4
396 %add11.4.4 = add i32 %mul.4.4, %add11.3.4
397 %arrayidx.5.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 5
398 %37 = load i16, ptr %arrayidx.5.4, align 2
399 %conv.5.4 = zext i16 %37 to i32
400 %add.5.4 = add nuw nsw i32 %add.4.4, %conv.5.4
401 %mul.5.4 = mul nuw nsw i32 %conv.5.4, %conv.5.4
402 %add11.5.4 = add i32 %mul.5.4, %add11.4.4
403 %arrayidx.6.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 6
404 %38 = load i16, ptr %arrayidx.6.4, align 2
405 %conv.6.4 = zext i16 %38 to i32
406 %add.6.4 = add nuw nsw i32 %add.5.4, %conv.6.4
407 %mul.6.4 = mul nuw nsw i32 %conv.6.4, %conv.6.4
408 %add11.6.4 = add i32 %mul.6.4, %add11.5.4
409 %arrayidx.7.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 7
410 %39 = load i16, ptr %arrayidx.7.4, align 2
411 %conv.7.4 = zext i16 %39 to i32
412 %add.7.4 = add nuw nsw i32 %add.6.4, %conv.7.4
413 %mul.7.4 = mul nuw nsw i32 %conv.7.4, %conv.7.4
414 %add11.7.4 = add i32 %mul.7.4, %add11.6.4
415 %add.ptr.4 = getelementptr inbounds i16, ptr %add.ptr.3, i64 %idx.ext
416 %40 = load i16, ptr %add.ptr.4, align 2
417 %conv.556 = zext i16 %40 to i32
418 %add.557 = add nuw nsw i32 %add.7.4, %conv.556
419 %mul.558 = mul nuw nsw i32 %conv.556, %conv.556
420 %add11.559 = add i32 %mul.558, %add11.7.4
421 %arrayidx.1.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 1
422 %41 = load i16, ptr %arrayidx.1.5, align 2
423 %conv.1.5 = zext i16 %41 to i32
424 %add.1.5 = add nuw nsw i32 %add.557, %conv.1.5
425 %mul.1.5 = mul nuw nsw i32 %conv.1.5, %conv.1.5
426 %add11.1.5 = add i32 %mul.1.5, %add11.559
427 %arrayidx.2.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 2
428 %42 = load i16, ptr %arrayidx.2.5, align 2
429 %conv.2.5 = zext i16 %42 to i32
430 %add.2.5 = add nuw nsw i32 %add.1.5, %conv.2.5
431 %mul.2.5 = mul nuw nsw i32 %conv.2.5, %conv.2.5
432 %add11.2.5 = add i32 %mul.2.5, %add11.1.5
433 %arrayidx.3.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 3
434 %43 = load i16, ptr %arrayidx.3.5, align 2
435 %conv.3.5 = zext i16 %43 to i32
436 %add.3.5 = add nuw nsw i32 %add.2.5, %conv.3.5
437 %mul.3.5 = mul nuw nsw i32 %conv.3.5, %conv.3.5
438 %add11.3.5 = add i32 %mul.3.5, %add11.2.5
439 %arrayidx.4.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 4
440 %44 = load i16, ptr %arrayidx.4.5, align 2
441 %conv.4.5 = zext i16 %44 to i32
442 %add.4.5 = add nuw nsw i32 %add.3.5, %conv.4.5
443 %mul.4.5 = mul nuw nsw i32 %conv.4.5, %conv.4.5
444 %add11.4.5 = add i32 %mul.4.5, %add11.3.5
445 %arrayidx.5.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 5
446 %45 = load i16, ptr %arrayidx.5.5, align 2
447 %conv.5.5 = zext i16 %45 to i32
448 %add.5.5 = add nuw nsw i32 %add.4.5, %conv.5.5
449 %mul.5.5 = mul nuw nsw i32 %conv.5.5, %conv.5.5
450 %add11.5.5 = add i32 %mul.5.5, %add11.4.5
451 %arrayidx.6.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 6
452 %46 = load i16, ptr %arrayidx.6.5, align 2
453 %conv.6.5 = zext i16 %46 to i32
454 %add.6.5 = add nuw nsw i32 %add.5.5, %conv.6.5
455 %mul.6.5 = mul nuw nsw i32 %conv.6.5, %conv.6.5
456 %add11.6.5 = add i32 %mul.6.5, %add11.5.5
457 %arrayidx.7.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 7
458 %47 = load i16, ptr %arrayidx.7.5, align 2
459 %conv.7.5 = zext i16 %47 to i32
460 %add.7.5 = add nuw nsw i32 %add.6.5, %conv.7.5
461 %mul.7.5 = mul nuw nsw i32 %conv.7.5, %conv.7.5
462 %add11.7.5 = add i32 %mul.7.5, %add11.6.5
463 %add.ptr.5 = getelementptr inbounds i16, ptr %add.ptr.4, i64 %idx.ext
464 %48 = load i16, ptr %add.ptr.5, align 2
465 %conv.660 = zext i16 %48 to i32
466 %add.661 = add nuw nsw i32 %add.7.5, %conv.660
467 %mul.662 = mul nuw nsw i32 %conv.660, %conv.660
468 %add11.663 = add i32 %mul.662, %add11.7.5
469 %arrayidx.1.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 1
470 %49 = load i16, ptr %arrayidx.1.6, align 2
471 %conv.1.6 = zext i16 %49 to i32
472 %add.1.6 = add nuw nsw i32 %add.661, %conv.1.6
473 %mul.1.6 = mul nuw nsw i32 %conv.1.6, %conv.1.6
474 %add11.1.6 = add i32 %mul.1.6, %add11.663
475 %arrayidx.2.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 2
476 %50 = load i16, ptr %arrayidx.2.6, align 2
477 %conv.2.6 = zext i16 %50 to i32
478 %add.2.6 = add nuw nsw i32 %add.1.6, %conv.2.6
479 %mul.2.6 = mul nuw nsw i32 %conv.2.6, %conv.2.6
480 %add11.2.6 = add i32 %mul.2.6, %add11.1.6
481 %arrayidx.3.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 3
482 %51 = load i16, ptr %arrayidx.3.6, align 2
483 %conv.3.6 = zext i16 %51 to i32
484 %add.3.6 = add nuw nsw i32 %add.2.6, %conv.3.6
485 %mul.3.6 = mul nuw nsw i32 %conv.3.6, %conv.3.6
486 %add11.3.6 = add i32 %mul.3.6, %add11.2.6
487 %arrayidx.4.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 4
488 %52 = load i16, ptr %arrayidx.4.6, align 2
489 %conv.4.6 = zext i16 %52 to i32
490 %add.4.6 = add nuw nsw i32 %add.3.6, %conv.4.6
491 %mul.4.6 = mul nuw nsw i32 %conv.4.6, %conv.4.6
492 %add11.4.6 = add i32 %mul.4.6, %add11.3.6
493 %arrayidx.5.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 5
494 %53 = load i16, ptr %arrayidx.5.6, align 2
495 %conv.5.6 = zext i16 %53 to i32
496 %add.5.6 = add nuw nsw i32 %add.4.6, %conv.5.6
497 %mul.5.6 = mul nuw nsw i32 %conv.5.6, %conv.5.6
498 %add11.5.6 = add i32 %mul.5.6, %add11.4.6
499 %arrayidx.6.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 6
500 %54 = load i16, ptr %arrayidx.6.6, align 2
501 %conv.6.6 = zext i16 %54 to i32
502 %add.6.6 = add nuw nsw i32 %add.5.6, %conv.6.6
503 %mul.6.6 = mul nuw nsw i32 %conv.6.6, %conv.6.6
504 %add11.6.6 = add i32 %mul.6.6, %add11.5.6
505 %arrayidx.7.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 7
506 %55 = load i16, ptr %arrayidx.7.6, align 2
507 %conv.7.6 = zext i16 %55 to i32
508 %add.7.6 = add nuw nsw i32 %add.6.6, %conv.7.6
509 %mul.7.6 = mul nuw nsw i32 %conv.7.6, %conv.7.6
510 %add11.7.6 = add i32 %mul.7.6, %add11.6.6
511 %add.ptr.6 = getelementptr inbounds i16, ptr %add.ptr.5, i64 %idx.ext
512 %56 = load i16, ptr %add.ptr.6, align 2
513 %conv.764 = zext i16 %56 to i32
514 %add.765 = add nuw nsw i32 %add.7.6, %conv.764
515 %mul.766 = mul nuw nsw i32 %conv.764, %conv.764
516 %add11.767 = add i32 %mul.766, %add11.7.6
517 %arrayidx.1.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 1
518 %57 = load i16, ptr %arrayidx.1.7, align 2
519 %conv.1.7 = zext i16 %57 to i32
520 %add.1.7 = add nuw nsw i32 %add.765, %conv.1.7
521 %mul.1.7 = mul nuw nsw i32 %conv.1.7, %conv.1.7
522 %add11.1.7 = add i32 %mul.1.7, %add11.767
523 %arrayidx.2.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 2
524 %58 = load i16, ptr %arrayidx.2.7, align 2
525 %conv.2.7 = zext i16 %58 to i32
526 %add.2.7 = add nuw nsw i32 %add.1.7, %conv.2.7
527 %mul.2.7 = mul nuw nsw i32 %conv.2.7, %conv.2.7
528 %add11.2.7 = add i32 %mul.2.7, %add11.1.7
529 %arrayidx.3.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 3
530 %59 = load i16, ptr %arrayidx.3.7, align 2
531 %conv.3.7 = zext i16 %59 to i32
532 %add.3.7 = add nuw nsw i32 %add.2.7, %conv.3.7
533 %mul.3.7 = mul nuw nsw i32 %conv.3.7, %conv.3.7
534 %add11.3.7 = add i32 %mul.3.7, %add11.2.7
535 %arrayidx.4.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 4
536 %60 = load i16, ptr %arrayidx.4.7, align 2
537 %conv.4.7 = zext i16 %60 to i32
538 %add.4.7 = add nuw nsw i32 %add.3.7, %conv.4.7
539 %mul.4.7 = mul nuw nsw i32 %conv.4.7, %conv.4.7
540 %add11.4.7 = add i32 %mul.4.7, %add11.3.7
541 %arrayidx.5.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 5
542 %61 = load i16, ptr %arrayidx.5.7, align 2
543 %conv.5.7 = zext i16 %61 to i32
544 %add.5.7 = add nuw nsw i32 %add.4.7, %conv.5.7
545 %mul.5.7 = mul nuw nsw i32 %conv.5.7, %conv.5.7
546 %add11.5.7 = add i32 %mul.5.7, %add11.4.7
547 %arrayidx.6.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 6
548 %62 = load i16, ptr %arrayidx.6.7, align 2
549 %conv.6.7 = zext i16 %62 to i32
550 %add.6.7 = add nuw nsw i32 %add.5.7, %conv.6.7
551 %mul.6.7 = mul nuw nsw i32 %conv.6.7, %conv.6.7
552 %add11.6.7 = add i32 %mul.6.7, %add11.5.7
553 %arrayidx.7.7 = getelementptr inbounds i16, ptr %add.ptr.6, i64 7
554 %63 = load i16, ptr %arrayidx.7.7, align 2
555 %conv.7.7 = zext i16 %63 to i32
556 %add.7.7 = add nuw nsw i32 %add.6.7, %conv.7.7
557 %mul.7.7 = mul nuw nsw i32 %conv.7.7, %conv.7.7
558 %add11.7.7 = add i32 %mul.7.7, %add11.6.7
559 %conv15 = zext i32 %add.7.7 to i64
560 %conv16 = zext i32 %add11.7.7 to i64
561 %shl = shl nuw i64 %conv16, 32
562 %add17 = or i64 %shl, %conv15
566 define i64 @looped(ptr nocapture noundef readonly %p, i32 noundef %st) {
567 ; CHECK-LABEL: @looped(
569 ; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[ST:%.*]] to i64
570 ; CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
571 ; CHECK: for.cond1.preheader:
572 ; CHECK-NEXT: [[Y_038:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC13:%.*]], [[FOR_COND1_PREHEADER]] ]
573 ; CHECK-NEXT: [[SQ_037:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OP_RDX:%.*]], [[FOR_COND1_PREHEADER]] ]
574 ; CHECK-NEXT: [[SM_036:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OP_RDX1:%.*]], [[FOR_COND1_PREHEADER]] ]
575 ; CHECK-NEXT: [[P_ADDR_035:%.*]] = phi ptr [ [[P:%.*]], [[ENTRY]] ], [ [[ADD_PTR:%.*]], [[FOR_COND1_PREHEADER]] ]
576 ; CHECK-NEXT: [[TMP0:%.*]] = load <16 x i16>, ptr [[P_ADDR_035]], align 2
577 ; CHECK-NEXT: [[TMP1:%.*]] = zext <16 x i16> [[TMP0]] to <16 x i32>
578 ; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw <16 x i32> [[TMP1]], [[TMP1]]
579 ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP1]])
580 ; CHECK-NEXT: [[OP_RDX1]] = add i32 [[TMP3]], [[SM_036]]
581 ; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP2]])
582 ; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP4]], [[SQ_037]]
583 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, ptr [[P_ADDR_035]], i64 [[IDX_EXT]]
584 ; CHECK-NEXT: [[INC13]] = add nuw nsw i32 [[Y_038]], 1
585 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC13]], 16
586 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]]
587 ; CHECK: for.cond.cleanup:
588 ; CHECK-NEXT: [[CONV15:%.*]] = zext i32 [[OP_RDX1]] to i64
589 ; CHECK-NEXT: [[CONV16:%.*]] = zext i32 [[OP_RDX]] to i64
590 ; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 [[CONV16]], 32
591 ; CHECK-NEXT: [[ADD17:%.*]] = or i64 [[SHL]], [[CONV15]]
592 ; CHECK-NEXT: ret i64 [[ADD17]]
595 %idx.ext = sext i32 %st to i64
596 br label %for.cond1.preheader
598 for.cond1.preheader: ; preds = %entry, %for.cond1.preheader
599 %y.038 = phi i32 [ 0, %entry ], [ %inc13, %for.cond1.preheader ]
600 %sq.037 = phi i32 [ 0, %entry ], [ %add11.15, %for.cond1.preheader ]
601 %sm.036 = phi i32 [ 0, %entry ], [ %add.15, %for.cond1.preheader ]
602 %p.addr.035 = phi ptr [ %p, %entry ], [ %add.ptr, %for.cond1.preheader ]
603 %0 = load i16, ptr %p.addr.035, align 2
604 %conv = zext i16 %0 to i32
605 %add = add i32 %sm.036, %conv
606 %mul = mul nuw nsw i32 %conv, %conv
607 %add11 = add i32 %mul, %sq.037
608 %arrayidx.1 = getelementptr inbounds i16, ptr %p.addr.035, i64 1
609 %1 = load i16, ptr %arrayidx.1, align 2
610 %conv.1 = zext i16 %1 to i32
611 %add.1 = add i32 %add, %conv.1
612 %mul.1 = mul nuw nsw i32 %conv.1, %conv.1
613 %add11.1 = add i32 %mul.1, %add11
614 %arrayidx.2 = getelementptr inbounds i16, ptr %p.addr.035, i64 2
615 %2 = load i16, ptr %arrayidx.2, align 2
616 %conv.2 = zext i16 %2 to i32
617 %add.2 = add i32 %add.1, %conv.2
618 %mul.2 = mul nuw nsw i32 %conv.2, %conv.2
619 %add11.2 = add i32 %mul.2, %add11.1
620 %arrayidx.3 = getelementptr inbounds i16, ptr %p.addr.035, i64 3
621 %3 = load i16, ptr %arrayidx.3, align 2
622 %conv.3 = zext i16 %3 to i32
623 %add.3 = add i32 %add.2, %conv.3
624 %mul.3 = mul nuw nsw i32 %conv.3, %conv.3
625 %add11.3 = add i32 %mul.3, %add11.2
626 %arrayidx.4 = getelementptr inbounds i16, ptr %p.addr.035, i64 4
627 %4 = load i16, ptr %arrayidx.4, align 2
628 %conv.4 = zext i16 %4 to i32
629 %add.4 = add i32 %add.3, %conv.4
630 %mul.4 = mul nuw nsw i32 %conv.4, %conv.4
631 %add11.4 = add i32 %mul.4, %add11.3
632 %arrayidx.5 = getelementptr inbounds i16, ptr %p.addr.035, i64 5
633 %5 = load i16, ptr %arrayidx.5, align 2
634 %conv.5 = zext i16 %5 to i32
635 %add.5 = add i32 %add.4, %conv.5
636 %mul.5 = mul nuw nsw i32 %conv.5, %conv.5
637 %add11.5 = add i32 %mul.5, %add11.4
638 %arrayidx.6 = getelementptr inbounds i16, ptr %p.addr.035, i64 6
639 %6 = load i16, ptr %arrayidx.6, align 2
640 %conv.6 = zext i16 %6 to i32
641 %add.6 = add i32 %add.5, %conv.6
642 %mul.6 = mul nuw nsw i32 %conv.6, %conv.6
643 %add11.6 = add i32 %mul.6, %add11.5
644 %arrayidx.7 = getelementptr inbounds i16, ptr %p.addr.035, i64 7
645 %7 = load i16, ptr %arrayidx.7, align 2
646 %conv.7 = zext i16 %7 to i32
647 %add.7 = add i32 %add.6, %conv.7
648 %mul.7 = mul nuw nsw i32 %conv.7, %conv.7
649 %add11.7 = add i32 %mul.7, %add11.6
650 %arrayidx.8 = getelementptr inbounds i16, ptr %p.addr.035, i64 8
651 %8 = load i16, ptr %arrayidx.8, align 2
652 %conv.8 = zext i16 %8 to i32
653 %add.8 = add i32 %add.7, %conv.8
654 %mul.8 = mul nuw nsw i32 %conv.8, %conv.8
655 %add11.8 = add i32 %mul.8, %add11.7
656 %arrayidx.9 = getelementptr inbounds i16, ptr %p.addr.035, i64 9
657 %9 = load i16, ptr %arrayidx.9, align 2
658 %conv.9 = zext i16 %9 to i32
659 %add.9 = add i32 %add.8, %conv.9
660 %mul.9 = mul nuw nsw i32 %conv.9, %conv.9
661 %add11.9 = add i32 %mul.9, %add11.8
662 %arrayidx.10 = getelementptr inbounds i16, ptr %p.addr.035, i64 10
663 %10 = load i16, ptr %arrayidx.10, align 2
664 %conv.10 = zext i16 %10 to i32
665 %add.10 = add i32 %add.9, %conv.10
666 %mul.10 = mul nuw nsw i32 %conv.10, %conv.10
667 %add11.10 = add i32 %mul.10, %add11.9
668 %arrayidx.11 = getelementptr inbounds i16, ptr %p.addr.035, i64 11
669 %11 = load i16, ptr %arrayidx.11, align 2
670 %conv.11 = zext i16 %11 to i32
671 %add.11 = add i32 %add.10, %conv.11
672 %mul.11 = mul nuw nsw i32 %conv.11, %conv.11
673 %add11.11 = add i32 %mul.11, %add11.10
674 %arrayidx.12 = getelementptr inbounds i16, ptr %p.addr.035, i64 12
675 %12 = load i16, ptr %arrayidx.12, align 2
676 %conv.12 = zext i16 %12 to i32
677 %add.12 = add i32 %add.11, %conv.12
678 %mul.12 = mul nuw nsw i32 %conv.12, %conv.12
679 %add11.12 = add i32 %mul.12, %add11.11
680 %arrayidx.13 = getelementptr inbounds i16, ptr %p.addr.035, i64 13
681 %13 = load i16, ptr %arrayidx.13, align 2
682 %conv.13 = zext i16 %13 to i32
683 %add.13 = add i32 %add.12, %conv.13
684 %mul.13 = mul nuw nsw i32 %conv.13, %conv.13
685 %add11.13 = add i32 %mul.13, %add11.12
686 %arrayidx.14 = getelementptr inbounds i16, ptr %p.addr.035, i64 14
687 %14 = load i16, ptr %arrayidx.14, align 2
688 %conv.14 = zext i16 %14 to i32
689 %add.14 = add i32 %add.13, %conv.14
690 %mul.14 = mul nuw nsw i32 %conv.14, %conv.14
691 %add11.14 = add i32 %mul.14, %add11.13
692 %arrayidx.15 = getelementptr inbounds i16, ptr %p.addr.035, i64 15
693 %15 = load i16, ptr %arrayidx.15, align 2
694 %conv.15 = zext i16 %15 to i32
695 %add.15 = add i32 %add.14, %conv.15
696 %mul.15 = mul nuw nsw i32 %conv.15, %conv.15
697 %add11.15 = add i32 %mul.15, %add11.14
698 %add.ptr = getelementptr inbounds i16, ptr %p.addr.035, i64 %idx.ext
699 %inc13 = add nuw nsw i32 %y.038, 1
700 %exitcond.not = icmp eq i32 %inc13, 16
701 br i1 %exitcond.not, label %for.cond.cleanup, label %for.cond1.preheader
703 for.cond.cleanup: ; preds = %for.cond1.preheader
704 %conv15 = zext i32 %add.15 to i64
705 %conv16 = zext i32 %add11.15 to i64
706 %shl = shl nuw i64 %conv16, 32
707 %add17 = or i64 %shl, %conv15