llvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s

   1 # RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-a57 -iterations=1 -timeline < %s | FileCheck %s
   2
   3 # CHECK: [0] Code Region
   4 # CHECK: Instructions:      2
   5 # CHECK-NEXT: Total Cycles:      12
   6 # CHECK: Timeline view:
   7 # CHECK: [0,0]     DeeeeeER  ..   fmul   v0.2s, v1.2s, v2.2s
   8 # CHECK-NEXT: [0,1]     DeeeeeeeeeER   fmla   v0.2s, v1.2s, v2.2s
   9
  10 # CHECK: [1] Code Region
  11 # CHECK: Instructions:      2
  12 # CHECK-NEXT: Total Cycles:      13
  13 # CHECK: Timeline view:
  14 # CHECK: [0,0]     DeeeeeER  . .   fmul  v0.4s, v1.4s, v2.4s
  15 # CHECK-NEXT: [0,1]     DeeeeeeeeeeER   fmla  v0.4s, v1.4s, v2.4s
  16
  17 # CHECK: [2] Code Region
  18 # CHECK: Instructions:      2
  19 # CHECK-NEXT: Total Cycles:      12
  20 # CHECK: Timeline view:
  21 # CHECK: [0,0]     DeeeeeER  ..   fmulx  v0.2s, v1.2s, v2.2s
  22 # CHECK-NEXT: [0,1]     DeeeeeeeeeER   fmls   v0.2s, v1.2s, v2.2s
  23
  24 # CHECK: [3] Code Region
  25 # CHECK: Instructions:      2
  26 # CHECK-NEXT: Total Cycles:      13
  27 # CHECK: Timeline view:
  28 # CHECK: [0,0]     DeeeeeER  . .   fmulx v0.4s, v1.4s, v2.4s
  29 # CHECK-NEXT: [0,1]     DeeeeeeeeeeER   fmls  v0.4s, v1.4s, v2.4s
  30
  31 # CHECK: [4] Code Region
  32 # CHECK: Instructions:      2
  33 # CHECK-NEXT: Total Cycles:      16
  34 # CHECK: Timeline view:
  35 # CHECK: [0,0]     DeeeeeeeeeER   .   fmla       v0.2s, v1.2s, v2.2s
  36 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fmla       v0.2s, v3.2s, v4.2s
  37
  38 # CHECK: [5] Code Region
  39 # CHECK: Instructions:      2
  40 # CHECK-NEXT: Total Cycles:      16
  41 # CHECK: Timeline view:
  42 # CHECK: [0,0]     DeeeeeeeeeER   .   fmls       v0.2s, v1.2s, v2.2s
  43 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fmls       v0.2s, v3.2s, v4.2s
  44
  45 # CHECK: [6] Code Region
  46 # CHECK: Instructions:      2
  47 # CHECK-NEXT: Total Cycles:      12
  48 # CHECK: Timeline view:
  49 # CHECK: [0,0]     DeeeeeER  ..   fmul   d4, d5, d6
  50 # CHECK-NEXT: [0,1]     DeeeeeeeeeER   fmadd  d1, d2, d3, d4
  51
  52 # CHECK: [7] Code Region
  53 # CHECK: Instructions:      2
  54 # CHECK-NEXT: Total Cycles:      12
  55 # CHECK: Timeline view:
  56 # CHECK: [0,0]     DeeeeeER  ..   fmul   d4, d5, d6
  57 # CHECK-NEXT: [0,1]     DeeeeeeeeeER   fmadd  d1, d2, d3, d4
  58
  59 # CHECK: [8] Code Region
  60 # CHECK: Instructions:      2
  61 # CHECK-NEXT: Total Cycles:      16
  62 # CHECK: Timeline view:
  63 # CHECK: [0,0]     DeeeeeeeeeER   .   fmadd      d4, d5, d6, d7
  64 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fmadd      d1, d2, d3, d4
  65
  66 # CHECK: [9] Code Region
  67 # CHECK: Instructions:      2
  68 # CHECK-NEXT: Total Cycles:      16
  69 # CHECK: Timeline view:
  70 # CHECK: [0,0]     DeeeeeeeeeER   .   fmsub      d4, d5, d6, d7
  71 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fmsub      d1, d2, d3, d4
  72
  73 # CHECK: [10] Code Region
  74 # CHECK: Instructions:      2
  75 # CHECK-NEXT: Total Cycles:      16
  76 # CHECK: Timeline view:
  77 # CHECK: [0,0]     DeeeeeeeeeER   .   fnmadd     d4, d5, d6, d7
  78 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fnmadd     d1, d2, d3, d4
  79
  80 # CHECK: [11] Code Region
  81 # CHECK: Instructions:      2
  82 # CHECK-NEXT: Total Cycles:      16
  83 # CHECK: Timeline view:
  84 # CHECK: [0,0]     DeeeeeeeeeER   .   fnmsub     d4, d5, d6, d7
  85 # CHECK-NEXT: [0,1]     D====eeeeeeeeeER   fnmsub     d1, d2, d3, d4
  86
  87 # CHECK: [12] Code Region
  88 # CHECK: Instructions:      2
  89 # CHECK-NEXT: Total Cycles:      8
  90 # CHECK: Timeline view:
  91 # CHECK: [0,0]     DeeeeER.   saba       v0.2s, v1.2s, v2.2s
  92 # CHECK-NEXT: [0,1]     D=eeeeER   saba       v0.2s, v3.2s, v4.2s
  93
  94 # CHECK: [13] Code Region
  95 # CHECK: Instructions:      2
  96 # CHECK-NEXT: Total Cycles:      8
  97 # CHECK: Timeline view:
  98 # CHECK: [0,0]     DeeeeER.   sabal      v0.2d, v1.2s, v2.2s
  99 # CHECK-NEXT: [0,1]     D=eeeeER   sabal      v0.2d, v3.2s, v4.2s
 100
 101 # CHECK: [14] Code Region
 102 # CHECK: Instructions:      2
 103 # CHECK-NEXT: Total Cycles:      8
 104 # CHECK: Timeline view:
 105 # CHECK: [0,0]     DeeeeER.   uaba       v0.2s, v1.2s, v2.2s
 106 # CHECK-NEXT: [0,1]     D=eeeeER   uaba       v0.2s, v3.2s, v4.2s
 107
 108 # CHECK: [15] Code Region
 109 # CHECK: Instructions:      2
 110 # CHECK-NEXT: Total Cycles:      8
 111 # CHECK: Timeline view:
 112 # CHECK: [0,0]     DeeeeER.   uabal      v0.2d, v1.2s, v2.2s
 113 # CHECK-NEXT: [0,1]     D=eeeeER   uabal      v0.2d, v3.2s, v4.2s
 114
 115 # CHECK: [16] Code Region
 116 # CHECK: Instructions:      2
 117 # CHECK-NEXT: Total Cycles:      8
 118 # CHECK: Timeline view:
 119 # CHECK: [0,0]     DeeeeER.   sadalp     v0.1d, v1.2s
 120 # CHECK-NEXT: [0,1]     D=eeeeER   sadalp     v0.1d, v2.2s
 121
 122 # CHECK: [17] Code Region
 123 # CHECK: Instructions:      2
 124 # CHECK-NEXT: Total Cycles:      8
 125 # CHECK: Timeline view:
 126 # CHECK: [0,0]     DeeeeER.   uadalp     v0.1d, v1.2s
 127 # CHECK-NEXT: [0,1]     D=eeeeER   uadalp     v0.1d, v2.2s
 128
 129 # CHECK: [18] Code Region
 130 # CHECK: Instructions:      2
 131 # CHECK-NEXT: Total Cycles:      8
 132 # CHECK: Timeline view:
 133 # CHECK: [0,0]     DeeeeER.   srsra      v0.8b, v1.8b, #3
 134 # CHECK-NEXT: [0,1]     D=eeeeER   srsra      v0.8b, v2.8b, #3
 135
 136 # CHECK: [19] Code Region
 137 # CHECK: Instructions:      2
 138 # CHECK-NEXT: Total Cycles:      8
 139 # CHECK: Timeline view:
 140 # CHECK: [0,0]     DeeeeER.   ursra      v0.8b, v1.8b, #3
 141 # CHECK-NEXT: [0,1]     D=eeeeER   ursra      v0.8b, v2.8b, #3
 142
 143 # CHECK: [20] Code Region
 144 # CHECK: Instructions:      2
 145 # CHECK-NEXT: Total Cycles:      8
 146 # CHECK: Timeline view:
 147 # CHECK: [0,0]     DeeeeER.   usra       v0.4s, v1.4s, #3
 148 # CHECK-NEXT: [0,1]     D=eeeeER   usra       v0.4s, v2.4s, #3
 149
 150 # CHECK: [21] Code Region
 151 # CHECK: Instructions:      2
 152 # CHECK-NEXT: Total Cycles:      9
 153 # CHECK: Timeline view:
 154 # CHECK: [0,0]     DeeeeeER.   mul       v0.2s, v1.2s, v2.2s
 155 # CHECK-NEXT: [0,1]     D=eeeeeER   mla       v0.2s, v1.2s, v2.2s
 156
 157 # CHECK: [22] Code Region
 158 # CHECK: Instructions:      2
 159 # CHECK-NEXT: Total Cycles:      13
 160 # CHECK: Timeline view:
 161 # CHECK: [0,0]     DeeeeeER  . .   pmul  v0.8b, v1.8b, v2.8b
 162 # CHECK-NEXT: [0,1]     D=====eeeeeER   mla   v0.8b, v1.8b, v2.8b
 163
 164 # CHECK: [23] Code Region
 165 # CHECK: Instructions:      2
 166 # CHECK-NEXT: Total Cycles:      13
 167 # CHECK: Timeline view:
 168 # CHECK: [0,0]     DeeeeeER  . .   sqdmulh       v0.2s, v1.2s, v2.2s
 169 # CHECK-NEXT: [0,1]     D=====eeeeeER   mla   v0.2s, v1.2s, v2.2s
 170
 171 # CHECK: [24] Code Region
 172 # CHECK: Instructions:      2
 173 # CHECK-NEXT: Total Cycles:      13
 174 # CHECK: Timeline view:
 175 # CHECK: [0,0]     DeeeeeER  . .   sqrdmulh      v0.2s, v1.2s, v2.2s
 176 # CHECK-NEXT: [0,1]     D=====eeeeeER   mla   v0.2s, v1.2s, v2.2s
 177
 178 # CHECK: [25] Code Region
 179 # CHECK: Instructions:      2
 180 # CHECK-NEXT: Total Cycles:      9
 181 # CHECK: Timeline view:
 182 # CHECK: [0,0]     DeeeeeER.   smull     v0.2d, v1.2s, v2.2s
 183 # CHECK-NEXT: [0,1]     D=eeeeeER   smlal     v0.2d, v1.2s, v2.2s
 184
 185 # CHECK: [26] Code Region
 186 # CHECK: Instructions:      2
 187 # CHECK-NEXT: Total Cycles:      9
 188 # CHECK: Timeline view:
 189 # CHECK: [0,0]     DeeeeeER.   umull     v0.2d, v1.2s, v2.2s
 190 # CHECK-NEXT: [0,1]     D=eeeeeER   umlal     v0.2d, v1.2s, v2.2s
 191
 192 # CHECK: [27] Code Region
 193 # CHECK: Instructions:      2
 194 # CHECK-NEXT: Total Cycles:      13
 195 # CHECK: Timeline view:
 196 # CHECK: [0,0] DeeeeeER . . sqdmull v0.2d, v1.2s, v2.2s
 197 # CHECK-NEXT: [0,1]     D=====eeeeeER   smlal v0.2d, v1.2s, v2.2s
 198
 199 # CHECK: [28] Code Region
 200 # CHECK: Instructions:      2
 201 # CHECK-NEXT: Total Cycles:      13
 202 # CHECK: Timeline view:
 203 # CHECK: [0,0] DeeeeeER . . pmull v0.8h, v1.8b, v2.8b
 204 # CHECK-NEXT: [0,1]     D=====eeeeeER   smlal v0.8h, v1.8b, v2.8b
 205
 206 # CHECK: [29] Code Region
 207 # CHECK: Instructions:      2
 208 # CHECK-NEXT: Total Cycles:      13
 209 # CHECK: Timeline view:
 210 # CHECK: [0,0] DeeeeeER . . pmull2 v0.8h, v1.16b, v2.16b
 211 # CHECK-NEXT: [0,1]     D=====eeeeeER   smlal v0.8h, v1.8b, v2.8b
 212
 213 # CHECK: [30] Code Region
 214 # CHECK: Instructions:      2
 215 # CHECK-NEXT: Total Cycles:      9
 216 # CHECK: Timeline view:
 217 # CHECK: [0,0]     DeeeeeER.   mla       v0.2s, v1.2s, v2.2s
 218 # CHECK-NEXT: [0,1]     D=eeeeeER   mla       v0.2s, v1.2s, v2.2s
 219
 220 # CHECK: [31] Code Region
 221 # CHECK: Instructions:      2
 222 # CHECK-NEXT: Total Cycles:      11
 223 # CHECK: Timeline view:
 224 # CHECK: [0,0]     DeeeeeeER .   mla     v0.4s, v1.4s, v2.4s
 225 # CHECK-NEXT: [0,1]     .D=eeeeeeER   mla     v0.4s, v1.4s, v2.4s
 226
 227 # CHECK: [32] Code Region
 228 # CHECK: Instructions:      2
 229 # CHECK-NEXT: Total Cycles:      9
 230 # CHECK: Timeline view:
 231 # CHECK: [0,0]     DeeeeeER.   mls       v0.2s, v1.2s, v2.2s
 232 # CHECK-NEXT: [0,1]     D=eeeeeER   mls       v0.2s, v1.2s, v2.2s
 233
 234 # CHECK: [33] Code Region
 235 # CHECK: Instructions:      2
 236 # CHECK-NEXT: Total Cycles:      11
 237 # CHECK: Timeline view:
 238 # CHECK: [0,0]     DeeeeeeER .   mls     v0.4s, v1.4s, v2.4s
 239 # CHECK-NEXT: [0,1]     .D=eeeeeeER   mls     v0.4s, v1.4s, v2.4s
 240
 241 # CHECK: [34] Code Region
 242 # CHECK: Instructions:      2
 243 # CHECK-NEXT: Total Cycles:      9
 244 # CHECK: Timeline view:
 245 # CHECK: [0,0]     DeeeeeER.   smlal     v0.2d, v1.2s, v2.2s
 246 # CHECK-NEXT: [0,1]     D=eeeeeER   smlal     v0.2d, v1.2s, v2.2s
 247
 248 # CHECK: [35] Code Region
 249 # CHECK: Instructions:      2
 250 # CHECK-NEXT: Total Cycles:      9
 251 # CHECK: Timeline view:
 252 # CHECK: [0,0]     DeeeeeER.   smlsl     v0.2d, v1.2s, v2.2s
 253 # CHECK-NEXT: [0,1]     D=eeeeeER   smlsl     v0.2d, v1.2s, v2.2s
 254
 255 # CHECK: [36] Code Region
 256 # CHECK: Instructions:      2
 257 # CHECK-NEXT: Total Cycles:      9
 258 # CHECK: Timeline view:
 259 # CHECK: [0,0]     DeeeeeER.   umlal     v0.2d, v1.2s, v2.2s
 260 # CHECK-NEXT: [0,1]     D=eeeeeER   umlal     v0.2d, v1.2s, v2.2s
 261
 262 # CHECK: [37] Code Region
 263 # CHECK: Instructions:      2
 264 # CHECK-NEXT: Total Cycles:      9
 265 # CHECK: Timeline view:
 266 # CHECK: [0,0]     DeeeeeER.   umlsl     v0.2d, v1.2s, v2.2s
 267 # CHECK-NEXT: [0,1]     D=eeeeeER   umlsl     v0.2d, v1.2s, v2.2s
 268
 269 # CHECK: [38] Code Region
 270 # CHECK: Instructions:      2
 271 # CHECK-NEXT: Total Cycles:      10
 272 # CHECK: Timeline view:
 273 # CHECK: [0,0]     DeeeeeER .   sqdmlal  v0.2d, v1.2s, v2.2s
 274 # CHECK-NEXT: [0,1]     D==eeeeeER   sqdmlal  v0.2d, v1.2s, v2.2s
 275
 276 # CHECK: [39] Code Region
 277 # CHECK: Instructions:      2
 278 # CHECK-NEXT: Total Cycles:      10
 279 # CHECK: Timeline view:
 280 # CHECK: [0,0]     DeeeeeER .   sqdmlsl  v0.2d, v1.2s, v2.2s
 281 # CHECK-NEXT: [0,1]     D==eeeeeER   sqdmlsl  v0.2d, v1.2s, v2.2s
 282
 283 # ASIMD FP Instructions
 284 # FMUL, FMULX, FMLA, FMLS are impacted
 285 # testing only a subset of combinations
 286 # LLVM-MCA-BEGIN
 287 fmul v0.2s, v1.2s, v2.2s
 288 fmla v0.2s, v1.2s, v2.2s
 289 # LLVM-MCA-END
 290
 291 # LLVM-MCA-BEGIN
 292 fmul v0.4s, v1.4s, v2.4s
 293 fmla v0.4s, v1.4s, v2.4s
 294 # LLVM-MCA-END
 295
 296 # LLVM-MCA-BEGIN
 297 fmulx v0.2s, v1.2s, v2.2s
 298 fmls v0.2s, v1.2s, v2.2s
 299 # LLVM-MCA-END
 300
 301 # LLVM-MCA-BEGIN
 302 fmulx v0.4s, v1.4s, v2.4s
 303 fmls v0.4s, v1.4s, v2.4s
 304 # LLVM-MCA-END
 305
 306 # LLVM-MCA-BEGIN
 307 fmla v0.2s, v1.2s, v2.2s
 308 fmla v0.2s, v3.2s, v4.2s
 309 # LLVM-MCA-END
 310
 311 # LLVM-MCA-BEGIN
 312 fmls v0.2s, v1.2s, v2.2s
 313 fmls v0.2s, v3.2s, v4.2s
 314 # LLVM-MCA-END
 315
 316
 317 # FP Multiply Instructions
 318 # FMUL, FMUL, FNMUL, FMADD, FMSUB, FNMADD, FNMSUB are impacted
 319 # testing only a subset of combinations
 320 # LLVM-MCA-BEGIN
 321 fmul   d4, d5, d6
 322 fmadd d1, d2, d3, d4
 323 # LLVM-MCA-END
 324
 325 # LLVM-MCA-BEGIN
 326 fmul   d4, d5, d6
 327 fmadd d1, d2, d3, d4
 328 # LLVM-MCA-END
 329
 330 # LLVM-MCA-BEGIN
 331 fmadd d4, d5, d6, d7
 332 fmadd d1, d2, d3, d4
 333 # LLVM-MCA-END
 334
 335 # LLVM-MCA-BEGIN
 336 fmsub d4, d5, d6, d7
 337 fmsub d1, d2, d3, d4
 338 # LLVM-MCA-END
 339
 340 # LLVM-MCA-BEGIN
 341 fnmadd d4, d5, d6, d7
 342 fnmadd d1, d2, d3, d4
 343 # LLVM-MCA-END
 344
 345 # LLVM-MCA-BEGIN
 346 fnmsub d4, d5, d6, d7
 347 fnmsub d1, d2, d3, d4
 348 # LLVM-MCA-END
 349
 350
 351
 352 # ASIMD Integer Instructions X-Unit
 353 # SABA, UABA, SABAL, UABAL, SADALP, UADALP, SRSRA, USRA, URSRA are impacted
 354 # testing only a subset of combinations
 355
 356 # LLVM-MCA-BEGIN
 357 saba v0.2s, v1.2s, v2.2s
 358 saba v0.2s, v3.2s, v4.2s
 359 # LLVM-MCA-END
 360
 361 # LLVM-MCA-BEGIN
 362 sabal v0.2d, v1.2s, v2.2s
 363 sabal v0.2d, v3.2s, v4.2s
 364 # LLVM-MCA-END
 365
 366 # LLVM-MCA-BEGIN
 367 uaba v0.2s, v1.2s, v2.2s
 368 uaba v0.2s, v3.2s, v4.2s
 369 # LLVM-MCA-END
 370
 371 # LLVM-MCA-BEGIN
 372 uabal v0.2d, v1.2s, v2.2s
 373 uabal v0.2d, v3.2s, v4.2s
 374 # LLVM-MCA-END
 375
 376 # LLVM-MCA-BEGIN
 377 sadalp v0.1d, v1.2s
 378 sadalp v0.1d, v2.2s
 379 # LLVM-MCA-END
 380
 381 # LLVM-MCA-BEGIN
 382 uadalp v0.1d, v1.2s
 383 uadalp v0.1d, v2.2s
 384 # LLVM-MCA-END
 385
 386 # LLVM-MCA-BEGIN
 387 srsra v0.8b, v1.8b, #3
 388 srsra v0.8b, v2.8b, #3
 389 # LLVM-MCA-END
 390
 391 # LLVM-MCA-BEGIN
 392 ursra v0.8b, v1.8b, #3
 393 ursra v0.8b, v2.8b, #3
 394 # LLVM-MCA-END
 395
 396 # LLVM-MCA-BEGIN
 397 usra v0.4s, v1.4s, #3
 398 usra v0.4s, v2.4s, #3
 399 # LLVM-MCA-END
 400
 401
 402 # ASIMD Multiply Instructions X-Unit
 403 # pmuls and sqd/sqrdmuls dont forward
 404
 405 # MULs
 406 # LLVM-MCA-BEGIN
 407 mul v0.2s, v1.2s, v2.2s
 408 mla v0.2s, v1.2s, v2.2s
 409 # LLVM-MCA-END
 410
 411 # LLVM-MCA-BEGIN
 412 pmul v0.8b, v1.8b, v2.8b
 413 mla v0.8b, v1.8b, v2.8b
 414 # LLVM-MCA-END
 415
 416 # LLVM-MCA-BEGIN
 417 sqdmulh v0.2s, v1.2s, v2.2s
 418 mla v0.2s, v1.2s, v2.2s
 419 # LLVM-MCA-END
 420
 421 # LLVM-MCA-BEGIN
 422 sqrdmulh v0.2s, v1.2s, v2.2s
 423 mla v0.2s, v1.2s, v2.2s
 424 # LLVM-MCA-END
 425
 426 # LLVM-MCA-BEGIN
 427 smull v0.2d, v1.2s, v2.2s
 428 smlal v0.2d, v1.2s, v2.2s
 429 # LLVM-MCA-END
 430
 431 # LLVM-MCA-BEGIN
 432 umull v0.2d, v1.2s, v2.2s
 433 umlal v0.2d, v1.2s, v2.2s
 434 # LLVM-MCA-END
 435
 436 # LLVM-MCA-BEGIN
 437 sqdmull v0.2d, v1.2s, v2.2s
 438 smlal v0.2d, v1.2s, v2.2s
 439 # LLVM-MCA-END
 440
 441 # LLVM-MCA-BEGIN
 442 pmull.8h v0, v1, v2
 443 smlal.8h v0, v1, v2
 444 # LLVM-MCA-END
 445
 446 # LLVM-MCA-BEGIN
 447 pmull2.8h v0, v1, v2
 448 smlal.8h v0, v1, v2
 449 # LLVM-MCA-END
 450
 451
 452 # MLAs
 453 # LLVM-MCA-BEGIN
 454 mla v0.2s, v1.2s, v2.2s
 455 mla v0.2s, v1.2s, v2.2s
 456 # LLVM-MCA-END
 457
 458 # LLVM-MCA-BEGIN
 459 mla v0.4s, v1.4s, v2.4s
 460 mla v0.4s, v1.4s, v2.4s
 461 # LLVM-MCA-END
 462
 463 # LLVM-MCA-BEGIN
 464 mls v0.2s, v1.2s, v2.2s
 465 mls v0.2s, v1.2s, v2.2s
 466 # LLVM-MCA-END
 467
 468 # LLVM-MCA-BEGIN
 469 mls v0.4s, v1.4s, v2.4s
 470 mls v0.4s, v1.4s, v2.4s
 471 # LLVM-MCA-END
 472
 473 # LLVM-MCA-BEGIN
 474 smlal v0.2d, v1.2s, v2.2s
 475 smlal v0.2d, v1.2s, v2.2s
 476 # LLVM-MCA-END
 477
 478 # LLVM-MCA-BEGIN
 479 smlsl v0.2d, v1.2s, v2.2s
 480 smlsl v0.2d, v1.2s, v2.2s
 481 # LLVM-MCA-END
 482
 483 # LLVM-MCA-BEGIN
 484 umlal v0.2d, v1.2s, v2.2s
 485 umlal v0.2d, v1.2s, v2.2s
 486 # LLVM-MCA-END
 487
 488 # LLVM-MCA-BEGIN
 489 umlsl v0.2d, v1.2s, v2.2s
 490 umlsl v0.2d, v1.2s, v2.2s
 491 # LLVM-MCA-END
 492
 493 # LLVM-MCA-BEGIN
 494 sqdmlal v0.2d, v1.2s, v2.2s
 495 sqdmlal v0.2d, v1.2s, v2.2s
 496 # LLVM-MCA-END
 497
 498 # LLVM-MCA-BEGIN
 499 sqdmlsl v0.2d, v1.2s, v2.2s
 500 sqdmlsl v0.2d, v1.2s, v2.2s
 501 # LLVM-MCA-END