llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-clwb.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -instruction-tables < %s | FileCheck %s
   3
   4 clwb (%rax)
   5
   6 # CHECK:      Instruction Info:
   7 # CHECK-NEXT: [1]: #uOps
   8 # CHECK-NEXT: [2]: Latency
   9 # CHECK-NEXT: [3]: RThroughput
  10 # CHECK-NEXT: [4]: MayLoad
  11 # CHECK-NEXT: [5]: MayStore
  12 # CHECK-NEXT: [6]: HasSideEffects (U)
  13
  14 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  15 # CHECK-NEXT:  1      5     0.50    *      *      U     clwb    (%rax)
  16
  17 # CHECK:      Resources:
  18 # CHECK-NEXT: [0]   - ICXDivider
  19 # CHECK-NEXT: [1]   - ICXFPDivider
  20 # CHECK-NEXT: [2]   - ICXPort0
  21 # CHECK-NEXT: [3]   - ICXPort1
  22 # CHECK-NEXT: [4]   - ICXPort2
  23 # CHECK-NEXT: [5]   - ICXPort3
  24 # CHECK-NEXT: [6]   - ICXPort4
  25 # CHECK-NEXT: [7]   - ICXPort5
  26 # CHECK-NEXT: [8]   - ICXPort6
  27 # CHECK-NEXT: [9]   - ICXPort7
  28 # CHECK-NEXT: [10]  - ICXPort8
  29 # CHECK-NEXT: [11]  - ICXPort9
  30
  31 # CHECK:      Resource pressure per iteration:
  32 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]
  33 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -
  34
  35 # CHECK:      Resource pressure by instruction:
  36 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   Instructions:
  37 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clwb  (%rax)