llvm/unittests/Target/AMDGPU/PALMetadata.cpp

   1 //===- llvm/unittests/MC/AMDGPU/PALMetadata.cpp ---------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "AMDGPUTargetMachine.h"
  10 #include "GCNSubtarget.h"
  11 #include "SIProgramInfo.h"
  12 #include "Utils/AMDGPUPALMetadata.h"
  13 #include "llvm/CodeGen/MachineModuleInfo.h"
  14 #include "llvm/MC/MCContext.h"
  15 #include "llvm/MC/MCExpr.h"
  16 #include "llvm/MC/MCStreamer.h"
  17 #include "llvm/MC/MCSymbol.h"
  18 #include "llvm/MC/MCTargetOptions.h"
  19 #include "llvm/MC/TargetRegistry.h"
  20 #include "llvm/Support/TargetSelect.h"
  21 #include "llvm/Target/TargetMachine.h"
  22 #include "gtest/gtest.h"
  23
  24 using namespace llvm;
  25
  26 class PALMetadata : public testing::Test {
  27 protected:
  28   std::unique_ptr<GCNTargetMachine> TM;
  29   std::unique_ptr<LLVMContext> Ctx;
  30   std::unique_ptr<GCNSubtarget> ST;
  31   std::unique_ptr<MachineModuleInfo> MMI;
  32   std::unique_ptr<MachineFunction> MF;
  33   std::unique_ptr<Module> M;
  34   AMDGPUPALMetadata MD;
  35
  36   static void SetUpTestSuite() {
  37     LLVMInitializeAMDGPUTargetInfo();
  38     LLVMInitializeAMDGPUTarget();
  39     LLVMInitializeAMDGPUTargetMC();
  40   }
  41
  42   PALMetadata() {
  43     StringRef Triple = "amdgcn--amdpal";
  44     StringRef CPU = "gfx1010";
  45     StringRef FS = "";
  46
  47     std::string Error;
  48     const Target *TheTarget = TargetRegistry::lookupTarget(Triple, Error);
  49     TargetOptions Options;
  50
  51     TM.reset(static_cast<GCNTargetMachine *>(TheTarget->createTargetMachine(
  52         Triple, CPU, FS, Options, std::nullopt, std::nullopt)));
  53
  54     Ctx = std::make_unique<LLVMContext>();
  55     M = std::make_unique<Module>("Module", *Ctx);
  56     M->setDataLayout(TM->createDataLayout());
  57     auto *FType = FunctionType::get(Type::getVoidTy(*Ctx), false);
  58     auto *F = Function::Create(FType, GlobalValue::ExternalLinkage, "Test", *M);
  59     MMI = std::make_unique<MachineModuleInfo>(TM.get());
  60
  61     ST = std::make_unique<GCNSubtarget>(TM->getTargetTriple(),
  62                                         TM->getTargetCPU(),
  63                                         TM->getTargetFeatureString(), *TM);
  64
  65     MF = std::make_unique<MachineFunction>(*F, *TM, *ST, MMI->getContext(), 1);
  66   }
  67 };
  68
  69 TEST_F(PALMetadata, ResourceRegisterSetORsResolvableUnknown) {
  70   StringRef yaml = "---\n"
  71                    "amdpal.pipelines:\n"
  72                    "  - .hardware_stages:\n"
  73                    "      .es:\n"
  74                    "        .entry_point:    Test\n"
  75                    "        .scratch_memory_size: 0\n"
  76                    "        .sgpr_count:     0x1\n"
  77                    "        .vgpr_count:     0x1\n"
  78                    "    .registers:\n"
  79                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
  80                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0\n"
  81                    "...\n";
  82
  83   MCContext &MCCtx = MF->getContext();
  84   auto CC = CallingConv::AMDGPU_VS;
  85   MD.setFromString(yaml);
  86   MD.setRsrc2(CC, MCConstantExpr::create(42, MCCtx), MCCtx);
  87   MCSymbol *Sym = MCCtx.getOrCreateSymbol("Unknown");
  88   MD.setRsrc2(CC, MCSymbolRefExpr::create(Sym, MCCtx), MCCtx);
  89   EXPECT_FALSE(MD.resolvedAllMCExpr());
  90
  91   MD.setRsrc2(CC, MCConstantExpr::create(0xff00, MCCtx), MCCtx);
  92   Sym->setVariableValue(MCConstantExpr::create(0xffff0000, MCCtx));
  93   std::string Output;
  94   MD.toString(Output);
  95
  96   EXPECT_TRUE(MD.resolvedAllMCExpr());
  97
  98   auto n = Output.find("\'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0xffffff2a");
  99   EXPECT_TRUE(n != std::string::npos);
 100 }
 101
 102 TEST_F(PALMetadata, ResourceRegisterSetORsResolvableUnknowns) {
 103   StringRef yaml = "---\n"
 104                    "amdpal.pipelines:\n"
 105                    "  - .hardware_stages:\n"
 106                    "      .es:\n"
 107                    "        .entry_point:    Test\n"
 108                    "        .scratch_memory_size: 0\n"
 109                    "        .sgpr_count:     0x1\n"
 110                    "        .vgpr_count:     0x1\n"
 111                    "    .registers:\n"
 112                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
 113                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0\n"
 114                    "...\n";
 115
 116   MCContext &MCCtx = MF->getContext();
 117   auto CC = CallingConv::AMDGPU_VS;
 118   MD.setFromString(yaml);
 119   MCSymbol *SymOne = MCCtx.getOrCreateSymbol("UnknownOne");
 120   MD.setRsrc2(CC, MCSymbolRefExpr::create(SymOne, MCCtx), MCCtx);
 121
 122   MD.setRsrc2(CC, MCConstantExpr::create(42, MCCtx), MCCtx);
 123
 124   MCSymbol *SymTwo = MCCtx.getOrCreateSymbol("UnknownTwo");
 125   MD.setRsrc2(CC, MCSymbolRefExpr::create(SymTwo, MCCtx), MCCtx);
 126   EXPECT_FALSE(MD.resolvedAllMCExpr());
 127
 128   SymOne->setVariableValue(MCConstantExpr::create(0xffff0000, MCCtx));
 129   SymTwo->setVariableValue(MCConstantExpr::create(0x0000ff00, MCCtx));
 130
 131   std::string Output;
 132   MD.toString(Output);
 133
 134   EXPECT_TRUE(MD.resolvedAllMCExpr());
 135
 136   auto n = Output.find("\'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0xffffff2a");
 137   EXPECT_TRUE(n != std::string::npos);
 138 }
 139
 140 TEST_F(PALMetadata, ResourceRegisterSetORsPreset) {
 141   StringRef yaml = "---\n"
 142                    "amdpal.pipelines:\n"
 143                    "  - .hardware_stages:\n"
 144                    "      .es:\n"
 145                    "        .entry_point:    Test\n"
 146                    "        .scratch_memory_size: 0\n"
 147                    "        .sgpr_count:     0x1\n"
 148                    "        .vgpr_count:     0x1\n"
 149                    "    .registers:\n"
 150                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
 151                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0x2a\n"
 152                    "...\n";
 153
 154   MCContext &MCCtx = MF->getContext();
 155   auto CC = CallingConv::AMDGPU_VS;
 156   MD.setFromString(yaml);
 157   MCSymbol *Sym = MCCtx.getOrCreateSymbol("Unknown");
 158   MD.setRsrc2(CC, MCSymbolRefExpr::create(Sym, MCCtx), MCCtx);
 159   MD.setRsrc2(CC, MCConstantExpr::create(0xff00, MCCtx), MCCtx);
 160   Sym->setVariableValue(MCConstantExpr::create(0xffff0000, MCCtx));
 161   std::string Output;
 162   MD.toString(Output);
 163
 164   auto n = Output.find("\'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0xffffff2a");
 165   EXPECT_TRUE(n != std::string::npos);
 166 }
 167
 168 TEST_F(PALMetadata, ResourceRegisterSetORs) {
 169   StringRef yaml = "---\n"
 170                    "amdpal.pipelines:\n"
 171                    "  - .hardware_stages:\n"
 172                    "      .es:\n"
 173                    "        .entry_point:    Test\n"
 174                    "        .scratch_memory_size: 0\n"
 175                    "        .sgpr_count:     0x1\n"
 176                    "        .vgpr_count:     0x1\n"
 177                    "    .registers:\n"
 178                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
 179                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0\n"
 180                    "...\n";
 181
 182   MCContext &MCCtx = MF->getContext();
 183   auto CC = CallingConv::AMDGPU_VS;
 184   MD.setFromString(yaml);
 185   MCSymbol *Sym = MCCtx.getOrCreateSymbol("Unknown");
 186   MD.setRsrc2(CC, MCSymbolRefExpr::create(Sym, MCCtx), MCCtx);
 187   MD.setRsrc2(CC, 42);
 188   MD.setRsrc2(CC, MCConstantExpr::create(0xff00, MCCtx), MCCtx);
 189   Sym->setVariableValue(MCConstantExpr::create(0xffff0000, MCCtx));
 190   std::string Output;
 191   MD.toString(Output);
 192
 193   auto n = Output.find("\'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0xffffff2a");
 194   EXPECT_TRUE(n != std::string::npos);
 195 }
 196
 197 TEST_F(PALMetadata, ResourceRegisterSetUnresolvedSym) {
 198   StringRef yaml = "---\n"
 199                    "amdpal.pipelines:\n"
 200                    "  - .hardware_stages:\n"
 201                    "      .es:\n"
 202                    "        .entry_point:    Test\n"
 203                    "        .scratch_memory_size: 0\n"
 204                    "        .sgpr_count:     0x1\n"
 205                    "        .vgpr_count:     0x1\n"
 206                    "    .registers:\n"
 207                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
 208                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0\n"
 209                    "...\n";
 210
 211   MCContext &MCCtx = MF->getContext();
 212   auto CC = CallingConv::AMDGPU_VS;
 213   MD.setFromString(yaml);
 214   MCSymbol *Sym = MCCtx.getOrCreateSymbol("Unknown");
 215   MD.setRsrc2(CC, MCSymbolRefExpr::create(Sym, MCCtx), MCCtx);
 216   MD.setRsrc2(CC, MCConstantExpr::create(0xff00, MCCtx), MCCtx);
 217   std::string Output;
 218
 219   MD.toString(Output);
 220   EXPECT_FALSE(MD.resolvedAllMCExpr());
 221 }
 222
 223 TEST_F(PALMetadata, ResourceRegisterSetNoEmitUnresolved) {
 224   StringRef yaml = "---\n"
 225                    "amdpal.pipelines:\n"
 226                    "  - .hardware_stages:\n"
 227                    "      .es:\n"
 228                    "        .entry_point:    Test\n"
 229                    "        .scratch_memory_size: 0\n"
 230                    "        .sgpr_count:     0x1\n"
 231                    "        .vgpr_count:     0x1\n"
 232                    "    .registers:\n"
 233                    "      \'0x2c4a (SPI_SHADER_PGM_RSRC1_VS)\': 0x2f0000\n"
 234                    "      \'0x2c4b (SPI_SHADER_PGM_RSRC2_VS)\': 0\n"
 235                    "...\n";
 236
 237   MCContext &MCCtx = MF->getContext();
 238   auto CC = CallingConv::AMDGPU_VS;
 239   MD.setFromString(yaml);
 240   MCSymbol *Sym = MCCtx.getOrCreateSymbol("Unknown");
 241   MD.setRsrc2(CC, MCSymbolRefExpr::create(Sym, MCCtx), MCCtx);
 242   MD.setRsrc2(CC, MCConstantExpr::create(0xff00, MCCtx), MCCtx);
 243
 244   EXPECT_FALSE(MD.resolvedAllMCExpr());
 245 }