1 //===- MCSubtargetInfo.cpp - Subtarget Information ------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #include "llvm/MC/MCSubtargetInfo.h"
10 #include "llvm/ADT/ArrayRef.h"
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCInstrItineraries.h"
13 #include "llvm/MC/MCSchedule.h"
14 #include "llvm/Support/Format.h"
15 #include "llvm/Support/raw_ostream.h"
16 #include "llvm/TargetParser/SubtargetFeature.h"
24 /// Find KV in array using binary search.
26 static const T
*Find(StringRef S
, ArrayRef
<T
> A
) {
27 // Binary search the array
28 auto F
= llvm::lower_bound(A
, S
);
29 // If not found then return NULL
30 if (F
== A
.end() || StringRef(F
->Key
) != S
) return nullptr;
31 // Return the found array item
35 /// For each feature that is (transitively) implied by this feature, set it.
37 void SetImpliedBits(FeatureBitset
&Bits
, const FeatureBitset
&Implies
,
38 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
39 // OR the Implies bits in outside the loop. This allows the Implies for CPUs
40 // which might imply features not in FeatureTable to use this.
42 for (const SubtargetFeatureKV
&FE
: FeatureTable
)
43 if (Implies
.test(FE
.Value
))
44 SetImpliedBits(Bits
, FE
.Implies
.getAsBitset(), FeatureTable
);
47 /// For each feature that (transitively) implies this feature, clear it.
49 void ClearImpliedBits(FeatureBitset
&Bits
, unsigned Value
,
50 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
51 for (const SubtargetFeatureKV
&FE
: FeatureTable
) {
52 if (FE
.Implies
.getAsBitset().test(Value
)) {
54 ClearImpliedBits(Bits
, FE
.Value
, FeatureTable
);
59 static void ApplyFeatureFlag(FeatureBitset
&Bits
, StringRef Feature
,
60 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
61 assert(SubtargetFeatures::hasFlag(Feature
) &&
62 "Feature flags should start with '+' or '-'");
64 // Find feature in table.
65 const SubtargetFeatureKV
*FeatureEntry
=
66 Find(SubtargetFeatures::StripFlag(Feature
), FeatureTable
);
67 // If there is a match
69 // Enable/disable feature in bits
70 if (SubtargetFeatures::isEnabled(Feature
)) {
71 Bits
.set(FeatureEntry
->Value
);
73 // For each feature that this implies, set it.
74 SetImpliedBits(Bits
, FeatureEntry
->Implies
.getAsBitset(), FeatureTable
);
76 Bits
.reset(FeatureEntry
->Value
);
78 // For each feature that implies this, clear it.
79 ClearImpliedBits(Bits
, FeatureEntry
->Value
, FeatureTable
);
82 errs() << "'" << Feature
<< "' is not a recognized feature for this target"
83 << " (ignoring feature)\n";
87 /// Return the length of the longest entry in the table.
89 static size_t getLongestEntryLength(ArrayRef
<T
> Table
) {
92 MaxLen
= std::max(MaxLen
, std::strlen(I
.Key
));
96 /// Display help for feature and mcpu choices.
97 static void Help(ArrayRef
<SubtargetSubTypeKV
> CPUTable
,
98 ArrayRef
<SubtargetFeatureKV
> FeatTable
) {
99 // the static variable ensures that the help information only gets
100 // printed once even though a target machine creates multiple subtargets
101 static bool PrintOnce
= false;
106 // Determine the length of the longest CPU and Feature entries.
107 unsigned MaxCPULen
= getLongestEntryLength(CPUTable
);
108 unsigned MaxFeatLen
= getLongestEntryLength(FeatTable
);
110 // Print the CPU table.
111 errs() << "Available CPUs for this target:\n\n";
112 for (auto &CPU
: CPUTable
)
113 errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen
, CPU
.Key
,
117 // Print the Feature table.
118 errs() << "Available features for this target:\n\n";
119 for (auto &Feature
: FeatTable
)
120 errs() << format(" %-*s - %s.\n", MaxFeatLen
, Feature
.Key
, Feature
.Desc
);
123 errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
124 "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
129 /// Display help for mcpu choices only
130 static void cpuHelp(ArrayRef
<SubtargetSubTypeKV
> CPUTable
) {
131 // the static variable ensures that the help information only gets
132 // printed once even though a target machine creates multiple subtargets
133 static bool PrintOnce
= false;
138 // Print the CPU table.
139 errs() << "Available CPUs for this target:\n\n";
140 for (auto &CPU
: CPUTable
)
141 errs() << "\t" << CPU
.Key
<< "\n";
144 errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
145 "For example, clang --target=aarch64-unknown-linux-gnu "
146 "-mcpu=cortex-a35\n";
151 static FeatureBitset
getFeatures(StringRef CPU
, StringRef TuneCPU
, StringRef FS
,
152 ArrayRef
<SubtargetSubTypeKV
> ProcDesc
,
153 ArrayRef
<SubtargetFeatureKV
> ProcFeatures
) {
154 SubtargetFeatures
Features(FS
);
156 if (ProcDesc
.empty() || ProcFeatures
.empty())
157 return FeatureBitset();
159 assert(llvm::is_sorted(ProcDesc
) && "CPU table is not sorted");
160 assert(llvm::is_sorted(ProcFeatures
) && "CPU features table is not sorted");
164 // Check if help is needed
166 Help(ProcDesc
, ProcFeatures
);
168 // Find CPU entry if CPU name is specified.
169 else if (!CPU
.empty()) {
170 const SubtargetSubTypeKV
*CPUEntry
= Find(CPU
, ProcDesc
);
172 // If there is a match
174 // Set the features implied by this CPU feature, if any.
175 SetImpliedBits(Bits
, CPUEntry
->Implies
.getAsBitset(), ProcFeatures
);
177 errs() << "'" << CPU
<< "' is not a recognized processor for this target"
178 << " (ignoring processor)\n";
182 if (!TuneCPU
.empty()) {
183 const SubtargetSubTypeKV
*CPUEntry
= Find(TuneCPU
, ProcDesc
);
185 // If there is a match
187 // Set the features implied by this CPU feature, if any.
188 SetImpliedBits(Bits
, CPUEntry
->TuneImplies
.getAsBitset(), ProcFeatures
);
189 } else if (TuneCPU
!= CPU
) {
190 errs() << "'" << TuneCPU
<< "' is not a recognized processor for this "
191 << "target (ignoring processor)\n";
195 // Iterate through each feature
196 for (const std::string
&Feature
: Features
.getFeatures()) {
198 if (Feature
== "+help")
199 Help(ProcDesc
, ProcFeatures
);
200 else if (Feature
== "+cpuhelp")
203 ApplyFeatureFlag(Bits
, Feature
, ProcFeatures
);
209 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU
, StringRef TuneCPU
,
211 FeatureBits
= getFeatures(CPU
, TuneCPU
, FS
, ProcDesc
, ProcFeatures
);
212 FeatureString
= std::string(FS
);
214 if (!TuneCPU
.empty())
215 CPUSchedModel
= &getSchedModelForCPU(TuneCPU
);
217 CPUSchedModel
= &MCSchedModel::Default
;
220 void MCSubtargetInfo::setDefaultFeatures(StringRef CPU
, StringRef TuneCPU
,
222 FeatureBits
= getFeatures(CPU
, TuneCPU
, FS
, ProcDesc
, ProcFeatures
);
223 FeatureString
= std::string(FS
);
226 MCSubtargetInfo::MCSubtargetInfo(const Triple
&TT
, StringRef C
, StringRef TC
,
227 StringRef FS
, ArrayRef
<SubtargetFeatureKV
> PF
,
228 ArrayRef
<SubtargetSubTypeKV
> PD
,
229 const MCWriteProcResEntry
*WPR
,
230 const MCWriteLatencyEntry
*WL
,
231 const MCReadAdvanceEntry
*RA
,
232 const InstrStage
*IS
, const unsigned *OC
,
234 : TargetTriple(TT
), CPU(std::string(C
)), TuneCPU(std::string(TC
)),
235 ProcFeatures(PF
), ProcDesc(PD
), WriteProcResTable(WPR
),
236 WriteLatencyTable(WL
), ReadAdvanceTable(RA
), Stages(IS
),
237 OperandCycles(OC
), ForwardingPaths(FP
) {
238 InitMCProcessorInfo(CPU
, TuneCPU
, FS
);
241 FeatureBitset
MCSubtargetInfo::ToggleFeature(uint64_t FB
) {
242 FeatureBits
.flip(FB
);
246 FeatureBitset
MCSubtargetInfo::ToggleFeature(const FeatureBitset
&FB
) {
251 FeatureBitset
MCSubtargetInfo::SetFeatureBitsTransitively(
252 const FeatureBitset
&FB
) {
253 SetImpliedBits(FeatureBits
, FB
, ProcFeatures
);
257 FeatureBitset
MCSubtargetInfo::ClearFeatureBitsTransitively(
258 const FeatureBitset
&FB
) {
259 for (unsigned I
= 0, E
= FB
.size(); I
< E
; I
++) {
261 FeatureBits
.reset(I
);
262 ClearImpliedBits(FeatureBits
, I
, ProcFeatures
);
268 FeatureBitset
MCSubtargetInfo::ToggleFeature(StringRef Feature
) {
269 // Find feature in table.
270 const SubtargetFeatureKV
*FeatureEntry
=
271 Find(SubtargetFeatures::StripFlag(Feature
), ProcFeatures
);
272 // If there is a match
274 if (FeatureBits
.test(FeatureEntry
->Value
)) {
275 FeatureBits
.reset(FeatureEntry
->Value
);
276 // For each feature that implies this, clear it.
277 ClearImpliedBits(FeatureBits
, FeatureEntry
->Value
, ProcFeatures
);
279 FeatureBits
.set(FeatureEntry
->Value
);
281 // For each feature that this implies, set it.
282 SetImpliedBits(FeatureBits
, FeatureEntry
->Implies
.getAsBitset(),
286 errs() << "'" << Feature
<< "' is not a recognized feature for this target"
287 << " (ignoring feature)\n";
293 FeatureBitset
MCSubtargetInfo::ApplyFeatureFlag(StringRef FS
) {
294 ::ApplyFeatureFlag(FeatureBits
, FS
, ProcFeatures
);
298 bool MCSubtargetInfo::checkFeatures(StringRef FS
) const {
299 SubtargetFeatures
T(FS
);
300 FeatureBitset Set
, All
;
301 for (std::string F
: T
.getFeatures()) {
302 ::ApplyFeatureFlag(Set
, F
, ProcFeatures
);
305 ::ApplyFeatureFlag(All
, F
, ProcFeatures
);
307 return (FeatureBits
& All
) == Set
;
310 const MCSchedModel
&MCSubtargetInfo::getSchedModelForCPU(StringRef CPU
) const {
311 assert(llvm::is_sorted(ProcDesc
) &&
312 "Processor machine model table is not sorted");
315 const SubtargetSubTypeKV
*CPUEntry
= Find(CPU
, ProcDesc
);
318 if (CPU
!= "help") // Don't error if the user asked for help.
320 << "' is not a recognized processor for this target"
321 << " (ignoring processor)\n";
322 return MCSchedModel::Default
;
324 assert(CPUEntry
->SchedModel
&& "Missing processor SchedModel value");
325 return *CPUEntry
->SchedModel
;
329 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU
) const {
330 const MCSchedModel
&SchedModel
= getSchedModelForCPU(CPU
);
331 return InstrItineraryData(SchedModel
, Stages
, OperandCycles
, ForwardingPaths
);
334 void MCSubtargetInfo::initInstrItins(InstrItineraryData
&InstrItins
) const {
335 InstrItins
= InstrItineraryData(getSchedModel(), Stages
, OperandCycles
,
339 std::optional
<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level
) const {
343 std::optional
<unsigned>
344 MCSubtargetInfo::getCacheAssociativity(unsigned Level
) const {
348 std::optional
<unsigned>
349 MCSubtargetInfo::getCacheLineSize(unsigned Level
) const {
353 unsigned MCSubtargetInfo::getPrefetchDistance() const {
357 unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
361 bool MCSubtargetInfo::enableWritePrefetching() const {
365 unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses
,
366 unsigned NumStridedMemAccesses
,
367 unsigned NumPrefetches
,
368 bool HasCall
) const {
372 bool MCSubtargetInfo::shouldPrefetchAddressSpace(unsigned AS
) const {