[RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (...
[llvm-project.git] / llvm / lib / Target / RISCV / GISel / RISCVCallLowering.h
blobabe704b4a645189596f6701a90aa325ad6545428
1 //===-- RISCVCallLowering.h - Call lowering ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H
15 #define LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H
17 #include "llvm/CodeGen/CallingConvLower.h"
18 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
20 namespace llvm {
22 class MachineInstrBuilder;
23 class MachineIRBuilder;
24 class RISCVTargetLowering;
26 class RISCVCallLowering : public CallLowering {
28 public:
29 RISCVCallLowering(const RISCVTargetLowering &TLI);
31 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
32 ArrayRef<Register> VRegs,
33 FunctionLoweringInfo &FLI) const override;
35 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
36 ArrayRef<ArrayRef<Register>> VRegs,
37 FunctionLoweringInfo &FLI) const override;
39 bool lowerCall(MachineIRBuilder &MIRBuilder,
40 CallLoweringInfo &Info) const override;
42 private:
43 bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
44 ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const;
46 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder,
47 CallLowering::IncomingValueHandler &Handler,
48 IncomingValueAssigner &Assigner,
49 CCState &CCInfo) const;
52 } // end namespace llvm
54 #endif // LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H