1 //===-- RISCVInstrFormatsV.td - RISC-V V Instruction Formats -*- tablegen -*-=//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file describes the RISC-V V extension instruction formats.
11 //===----------------------------------------------------------------------===//
13 class RISCVVFormat<bits<3> val> {
16 def OPIVV : RISCVVFormat<0b000>;
17 def OPFVV : RISCVVFormat<0b001>;
18 def OPMVV : RISCVVFormat<0b010>;
19 def OPIVI : RISCVVFormat<0b011>;
20 def OPIVX : RISCVVFormat<0b100>;
21 def OPFVF : RISCVVFormat<0b101>;
22 def OPMVX : RISCVVFormat<0b110>;
23 def OPCFG : RISCVVFormat<0b111>;
25 class RISCVMOP<bits<2> val> {
28 def MOPLDUnitStride : RISCVMOP<0b00>;
29 def MOPLDIndexedUnord : RISCVMOP<0b01>;
30 def MOPLDStrided : RISCVMOP<0b10>;
31 def MOPLDIndexedOrder : RISCVMOP<0b11>;
33 def MOPSTUnitStride : RISCVMOP<0b00>;
34 def MOPSTIndexedUnord : RISCVMOP<0b01>;
35 def MOPSTStrided : RISCVMOP<0b10>;
36 def MOPSTIndexedOrder : RISCVMOP<0b11>;
38 class RISCVLSUMOP<bits<5> val> {
41 def LUMOPUnitStride : RISCVLSUMOP<0b00000>;
42 def LUMOPUnitStrideMask : RISCVLSUMOP<0b01011>;
43 def LUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
44 def LUMOPUnitStrideFF: RISCVLSUMOP<0b10000>;
45 def SUMOPUnitStride : RISCVLSUMOP<0b00000>;
46 def SUMOPUnitStrideMask : RISCVLSUMOP<0b01011>;
47 def SUMOPUnitStrideWholeReg : RISCVLSUMOP<0b01000>;
49 class RISCVWidth<bits<4> val> {
52 def LSWidth8 : RISCVWidth<0b0000>;
53 def LSWidth16 : RISCVWidth<0b0101>;
54 def LSWidth32 : RISCVWidth<0b0110>;
55 def LSWidth64 : RISCVWidth<0b0111>;
57 class RVInstSetiVLi<dag outs, dag ins, string opcodestr, string argstr>
58 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
65 let Inst{29-20} = vtypei{9-0};
66 let Inst{19-15} = uimm;
67 let Inst{14-12} = OPCFG.Value;
69 let Inst{6-0} = OPC_OP_V.Value;
71 let Defs = [VTYPE, VL];
74 class RVInstSetVLi<dag outs, dag ins, string opcodestr, string argstr>
75 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
81 let Inst{30-20} = vtypei;
82 let Inst{19-15} = rs1;
83 let Inst{14-12} = OPCFG.Value;
85 let Inst{6-0} = OPC_OP_V.Value;
87 let Defs = [VTYPE, VL];
90 class RVInstSetVL<dag outs, dag ins, string opcodestr, string argstr>
91 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
97 let Inst{30-25} = 0b000000;
98 let Inst{24-20} = rs2;
99 let Inst{19-15} = rs1;
100 let Inst{14-12} = OPCFG.Value;
102 let Inst{6-0} = OPC_OP_V.Value;
104 let Defs = [VTYPE, VL];
107 class RVInstVV<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
108 string opcodestr, string argstr>
109 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
115 let Inst{31-26} = funct6;
117 let Inst{24-20} = vs2;
118 let Inst{19-15} = vs1;
119 let Inst{14-12} = opv.Value;
121 let Inst{6-0} = OPC_OP_V.Value;
123 let Uses = [VTYPE, VL];
124 let RVVConstraint = VMConstraint;
127 class RVInstVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
128 string opcodestr, string argstr>
129 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
135 let Inst{31-26} = funct6;
137 let Inst{24-20} = vs2;
138 let Inst{19-15} = rs1;
139 let Inst{14-12} = opv.Value;
141 let Inst{6-0} = OPC_OP_V.Value;
143 let Uses = [VTYPE, VL];
144 let RVVConstraint = VMConstraint;
147 class RVInstV2<bits<6> funct6, bits<5> vs2, RISCVVFormat opv, dag outs, dag ins,
148 string opcodestr, string argstr>
149 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
154 let Inst{31-26} = funct6;
156 let Inst{24-20} = vs2;
157 let Inst{19-15} = rs1;
158 let Inst{14-12} = opv.Value;
160 let Inst{6-0} = OPC_OP_V.Value;
162 let Uses = [VTYPE, VL];
163 let RVVConstraint = VMConstraint;
166 class RVInstIVI<bits<6> funct6, dag outs, dag ins, string opcodestr,
168 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
174 let Inst{31-26} = funct6;
176 let Inst{24-20} = vs2;
177 let Inst{19-15} = imm;
178 let Inst{14-12} = OPIVI.Value;
180 let Inst{6-0} = OPC_OP_V.Value;
182 let Uses = [VTYPE, VL];
183 let RVVConstraint = VMConstraint;
186 class RVInstV<bits<6> funct6, bits<5> vs1, RISCVVFormat opv, dag outs,
187 dag ins, string opcodestr, string argstr>
188 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
193 let Inst{31-26} = funct6;
195 let Inst{24-20} = vs2;
196 let Inst{19-15} = vs1;
197 let Inst{14-12} = opv.Value;
199 let Inst{6-0} = OPC_OP_V.Value;
201 let Uses = [VTYPE, VL];
202 let RVVConstraint = VMConstraint;
205 class RVInstVLU<bits<3> nf, bit mew, RISCVLSUMOP lumop,
206 bits<3> width, dag outs, dag ins, string opcodestr,
208 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
213 let Inst{31-29} = nf;
215 let Inst{27-26} = MOPLDUnitStride.Value;
217 let Inst{24-20} = lumop.Value;
218 let Inst{19-15} = rs1;
219 let Inst{14-12} = width;
221 let Inst{6-0} = OPC_LOAD_FP.Value;
223 let Uses = [VTYPE, VL];
224 let RVVConstraint = VMConstraint;
227 class RVInstVLS<bits<3> nf, bit mew, bits<3> width,
228 dag outs, dag ins, string opcodestr, string argstr>
229 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
235 let Inst{31-29} = nf;
237 let Inst{27-26} = MOPLDStrided.Value;
239 let Inst{24-20} = rs2;
240 let Inst{19-15} = rs1;
241 let Inst{14-12} = width;
243 let Inst{6-0} = OPC_LOAD_FP.Value;
245 let Uses = [VTYPE, VL];
246 let RVVConstraint = VMConstraint;
249 class RVInstVLX<bits<3> nf, bit mew, RISCVMOP mop, bits<3> width,
250 dag outs, dag ins, string opcodestr, string argstr>
251 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
257 let Inst{31-29} = nf;
259 let Inst{27-26} = mop.Value;
261 let Inst{24-20} = vs2;
262 let Inst{19-15} = rs1;
263 let Inst{14-12} = width;
265 let Inst{6-0} = OPC_LOAD_FP.Value;
267 let Uses = [VTYPE, VL];
268 let RVVConstraint = VMConstraint;
271 class RVInstVSU<bits<3> nf, bit mew, RISCVLSUMOP sumop,
272 bits<3> width, dag outs, dag ins, string opcodestr,
274 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
279 let Inst{31-29} = nf;
281 let Inst{27-26} = MOPSTUnitStride.Value;
283 let Inst{24-20} = sumop.Value;
284 let Inst{19-15} = rs1;
285 let Inst{14-12} = width;
286 let Inst{11-7} = vs3;
287 let Inst{6-0} = OPC_STORE_FP.Value;
289 let Uses = [VTYPE, VL];
292 class RVInstVSS<bits<3> nf, bit mew, bits<3> width,
293 dag outs, dag ins, string opcodestr, string argstr>
294 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
300 let Inst{31-29} = nf;
302 let Inst{27-26} = MOPSTStrided.Value;
304 let Inst{24-20} = rs2;
305 let Inst{19-15} = rs1;
306 let Inst{14-12} = width;
307 let Inst{11-7} = vs3;
308 let Inst{6-0} = OPC_STORE_FP.Value;
310 let Uses = [VTYPE, VL];
313 class RVInstVSX<bits<3> nf, bit mew, RISCVMOP mop, bits<3> width,
314 dag outs, dag ins, string opcodestr, string argstr>
315 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> {
321 let Inst{31-29} = nf;
323 let Inst{27-26} = mop.Value;
325 let Inst{24-20} = vs2;
326 let Inst{19-15} = rs1;
327 let Inst{14-12} = width;
328 let Inst{11-7} = vs3;
329 let Inst{6-0} = OPC_STORE_FP.Value;
331 let Uses = [VTYPE, VL];