[RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (...
[llvm-project.git] / llvm / lib / Target / RISCV / RISCVInstrInfoZicond.td
blob35d3fdae0bd79bb32359e3d82353621203fd7d63
1 //===-- RISCVInstrInfoZicond.td ----------------------------*- tablegen -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file describes the RISC-V instructions from the standard Integer
10 // Conditional operations extension (Zicond).
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // RISC-V specific DAG Nodes.
16 //===----------------------------------------------------------------------===//
18 def riscv_czero_eqz : SDNode<"RISCVISD::CZERO_EQZ", SDTIntBinOp>;
19 def riscv_czero_nez : SDNode<"RISCVISD::CZERO_NEZ", SDTIntBinOp>;
21 //===----------------------------------------------------------------------===//
22 // Instructions
23 //===----------------------------------------------------------------------===//
25 let Predicates = [HasStdExtZicond] in {
26 def CZERO_EQZ : ALU_rr<0b0000111, 0b101, "czero.eqz">,
27                 Sched<[WriteIALU, ReadIALU, ReadIALU]>;
28 def CZERO_NEZ : ALU_rr<0b0000111, 0b111, "czero.nez">,
29                 Sched<[WriteIALU, ReadIALU, ReadIALU]>;
30 } // Predicates = [HasStdExtZicond]
32 //===----------------------------------------------------------------------===//
33 // Pseudo-instructions and codegen patterns
34 //===----------------------------------------------------------------------===//
36 let Predicates = [HasStdExtZicond] in {
37 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
38           (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
39 def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, GPR:$rc)),
40           (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
42 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
43           (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
44 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
45           (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
46 def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
47           (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
48 def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
49           (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
50 } // Predicates = [HasStdExtZicond]