1 //===-- RISCVSchedule.td - RISC-V Scheduling Definitions ---*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// Define scheduler resources associated with def operands.
10 def WriteIALU : SchedWrite; // 32 or 64-bit integer ALU operations
11 def WriteIALU32 : SchedWrite; // 32-bit integer ALU operations on RV64I
12 def WriteShiftImm : SchedWrite; // 32 or 64-bit shift by immediate operations
13 def WriteShiftImm32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
14 def WriteShiftReg : SchedWrite; // 32 or 64-bit shift by immediate operations
15 def WriteShiftReg32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
16 def WriteIDiv : SchedWrite; // 32-bit or 64-bit divide and remainder
17 def WriteIDiv32 : SchedWrite; // 32-bit divide and remainder on RV64I
18 def WriteIMul : SchedWrite; // 32-bit or 64-bit multiply
19 def WriteIMul32 : SchedWrite; // 32-bit multiply on RV64I
20 def WriteJmp : SchedWrite; // Jump
21 def WriteJal : SchedWrite; // Jump and link
22 def WriteJalr : SchedWrite; // Jump and link register
23 def WriteNop : SchedWrite;
24 def WriteLDB : SchedWrite; // Load byte
25 def WriteLDH : SchedWrite; // Load half-word
26 def WriteLDW : SchedWrite; // Load word
27 def WriteLDD : SchedWrite; // Load double-word
28 def WriteCSR : SchedWrite; // CSR instructions
29 def WriteSTB : SchedWrite; // Store byte
30 def WriteSTH : SchedWrite; // Store half-word
31 def WriteSTW : SchedWrite; // Store word
32 def WriteSTD : SchedWrite; // Store double-word
33 def WriteAtomicW : SchedWrite; //Atomic memory operation word size
34 def WriteAtomicD : SchedWrite; //Atomic memory operation double word size
35 def WriteAtomicLDW : SchedWrite; // Atomic load word
36 def WriteAtomicLDD : SchedWrite; // Atomic load double word
37 def WriteAtomicSTW : SchedWrite; // Atomic store word
38 def WriteAtomicSTD : SchedWrite; // Atomic store double word
39 def WriteFAdd16 : SchedWrite; // 16-bit floating point addition/subtraction
40 def WriteFAdd32 : SchedWrite; // 32-bit floating point addition/subtraction
41 def WriteFAdd64 : SchedWrite; // 64-bit floating point addition/subtraction
42 def WriteFMul16 : SchedWrite; // 16-bit floating point multiply
43 def WriteFMul32 : SchedWrite; // 32-bit floating point multiply
44 def WriteFMul64 : SchedWrite; // 64-bit floating point multiply
45 def WriteFMA16 : SchedWrite; // 16-bit floating point fused multiply-add
46 def WriteFMA32 : SchedWrite; // 32-bit floating point fused multiply-add
47 def WriteFMA64 : SchedWrite; // 64-bit floating point fused multiply-add
48 def WriteFDiv16 : SchedWrite; // 16-bit floating point divide
49 def WriteFDiv32 : SchedWrite; // 32-bit floating point divide
50 def WriteFDiv64 : SchedWrite; // 64-bit floating point divide
51 def WriteFSqrt16 : SchedWrite; // 16-bit floating point sqrt
52 def WriteFSqrt32 : SchedWrite; // 32-bit floating point sqrt
53 def WriteFSqrt64 : SchedWrite; // 64-bit floating point sqrt
55 // Integer to float conversions
56 def WriteFCvtI32ToF16 : SchedWrite;
57 def WriteFCvtI32ToF32 : SchedWrite;
58 def WriteFCvtI32ToF64 : SchedWrite;
59 def WriteFCvtI64ToF16 : SchedWrite; // RV64I only
60 def WriteFCvtI64ToF32 : SchedWrite; // RV64I only
61 def WriteFCvtI64ToF64 : SchedWrite; // RV64I only
63 //Float to integer conversions
64 def WriteFCvtF16ToI32 : SchedWrite;
65 def WriteFCvtF16ToI64 : SchedWrite; // RV64I only
66 def WriteFCvtF32ToI32 : SchedWrite;
67 def WriteFCvtF32ToI64 : SchedWrite; // RV64I only
68 def WriteFCvtF64ToI32 : SchedWrite;
69 def WriteFCvtF64ToI64 : SchedWrite; // RV64I only
71 // Float to float conversions
72 def WriteFCvtF32ToF64 : SchedWrite;
73 def WriteFCvtF64ToF32 : SchedWrite;
74 def WriteFCvtF16ToF32 : SchedWrite;
75 def WriteFCvtF32ToF16 : SchedWrite;
76 def WriteFCvtF16ToF64 : SchedWrite;
77 def WriteFCvtF64ToF16 : SchedWrite;
79 // Zfa found instructions.
80 def WriteFRoundF32 : SchedWrite;
81 def WriteFRoundF64 : SchedWrite;
82 def WriteFRoundF16 : SchedWrite;
84 def WriteFClass16 : SchedWrite; // 16-bit floating point classify
85 def WriteFClass32 : SchedWrite; // 32-bit floating point classify
86 def WriteFClass64 : SchedWrite; // 64-bit floating point classify
87 def WriteFCmp16 : SchedWrite; // 16-bit floating point compare
88 def WriteFCmp32 : SchedWrite; // 32-bit floating point compare
89 def WriteFCmp64 : SchedWrite; // 64-bit floating point compare
90 def WriteFSGNJ16 : SchedWrite; // 16-bit floating point sign-injection
91 def WriteFSGNJ32 : SchedWrite; // 32-bit floating point sign-injection
92 def WriteFSGNJ64 : SchedWrite; // 64-bit floating point sign-injection
93 def WriteFMinMax16 : SchedWrite; // 16-bit floating point min or max
94 def WriteFMinMax32 : SchedWrite; // 32-bit floating point min or max
95 def WriteFMinMax64 : SchedWrite; // 64-bit floating point min or max
97 def WriteFMovF16ToI16 : SchedWrite;
98 def WriteFMovI16ToF16 : SchedWrite;
99 def WriteFMovF32ToI32 : SchedWrite;
100 def WriteFMovI32ToF32 : SchedWrite;
101 def WriteFMovF64ToI64 : SchedWrite; // RV64I only
102 def WriteFMovI64ToF64 : SchedWrite; // RV64I only
104 def WriteFLI16 : SchedWrite; // Floating point constant load
105 def WriteFLI32 : SchedWrite; // Floating point constant load
106 def WriteFLI64 : SchedWrite; // Floating point constant load
108 def WriteFLD16 : SchedWrite; // Floating point sp load
109 def WriteFLD32 : SchedWrite; // Floating point sp load
110 def WriteFLD64 : SchedWrite; // Floating point dp load
111 def WriteFST16 : SchedWrite; // Floating point sp store
112 def WriteFST32 : SchedWrite; // Floating point sp store
113 def WriteFST64 : SchedWrite; // Floating point dp store
115 // short forward branch for Bullet
116 def WriteSFB : SchedWrite;
117 def ReadSFBJmp : SchedRead;
118 def ReadSFBALU : SchedRead;
120 /// Define scheduler resources associated with use operands.
121 def ReadJmp : SchedRead;
122 def ReadJalr : SchedRead;
123 def ReadCSR : SchedRead;
124 def ReadMemBase : SchedRead;
125 def ReadFMemBase : SchedRead;
126 def ReadStoreData : SchedRead;
127 def ReadFStoreData : SchedRead;
128 def ReadIALU : SchedRead;
129 def ReadIALU32 : SchedRead; // 32-bit integer ALU operations on RV64I
130 def ReadShiftImm : SchedRead;
131 def ReadShiftImm32 : SchedRead; // 32-bit shift by immediate operations on RV64Ix
132 def ReadShiftReg : SchedRead;
133 def ReadShiftReg32 : SchedRead; // 32-bit shift by register operations on RV64Ix
134 def ReadIDiv : SchedRead;
135 def ReadIDiv32 : SchedRead;
136 def ReadIMul : SchedRead;
137 def ReadIMul32 : SchedRead;
138 def ReadAtomicWA : SchedRead;
139 def ReadAtomicWD : SchedRead;
140 def ReadAtomicDA : SchedRead;
141 def ReadAtomicDD : SchedRead;
142 def ReadAtomicLDW : SchedRead; // Atomic load word
143 def ReadAtomicLDD : SchedRead; // Atomic load double word
144 def ReadAtomicSTW : SchedRead; // Atomic store word
145 def ReadAtomicSTD : SchedRead; // Atomic store double word
146 def ReadFAdd16 : SchedRead; // 16-bit floating point addition/subtraction
147 def ReadFAdd32 : SchedRead; // 32-bit floating point addition/subtraction
148 def ReadFAdd64 : SchedRead; // 64-bit floating point addition/subtraction
149 def ReadFMul16 : SchedRead; // 16-bit floating point multiply
150 def ReadFMul32 : SchedRead; // 32-bit floating point multiply
151 def ReadFMul64 : SchedRead; // 64-bit floating point multiply
152 def ReadFMA16 : SchedRead; // 16-bit floating point fused multiply-add
153 def ReadFMA16Addend : SchedRead; // 16-bit floating point fused multiply-add (addend)
154 def ReadFMA32 : SchedRead; // 32-bit floating point fused multiply-add
155 def ReadFMA32Addend : SchedRead; // 32-bit floating point fused multiply-add (addend)
156 def ReadFMA64 : SchedRead; // 64-bit floating point fused multiply-add
157 def ReadFMA64Addend : SchedRead; // 64-bit floating point fused multiply-add (addend)
158 def ReadFDiv16 : SchedRead; // 16-bit floating point divide
159 def ReadFDiv32 : SchedRead; // 32-bit floating point divide
160 def ReadFDiv64 : SchedRead; // 64-bit floating point divide
161 def ReadFSqrt16 : SchedRead; // 16-bit floating point sqrt
162 def ReadFSqrt32 : SchedRead; // 32-bit floating point sqrt
163 def ReadFSqrt64 : SchedRead; // 64-bit floating point sqrt
164 def ReadFCmp16 : SchedRead;
165 def ReadFCmp32 : SchedRead;
166 def ReadFCmp64 : SchedRead;
167 def ReadFSGNJ16 : SchedRead;
168 def ReadFSGNJ32 : SchedRead;
169 def ReadFSGNJ64 : SchedRead;
170 def ReadFMinMax16 : SchedRead;
171 def ReadFMinMax32 : SchedRead;
172 def ReadFMinMax64 : SchedRead;
173 def ReadFCvtF16ToI32 : SchedRead;
174 def ReadFCvtF16ToI64 : SchedRead;
175 def ReadFCvtF32ToI32 : SchedRead;
176 def ReadFCvtF32ToI64 : SchedRead;
177 def ReadFCvtF64ToI32 : SchedRead;
178 def ReadFCvtF64ToI64 : SchedRead;
179 def ReadFCvtI32ToF16 : SchedRead;
180 def ReadFCvtI32ToF32 : SchedRead;
181 def ReadFCvtI32ToF64 : SchedRead;
182 def ReadFCvtI64ToF16 : SchedRead;
183 def ReadFCvtI64ToF32 : SchedRead;
184 def ReadFCvtI64ToF64 : SchedRead;
185 def ReadFMovF16ToI16 : SchedRead;
186 def ReadFMovI16ToF16 : SchedRead;
187 def ReadFMovF32ToI32 : SchedRead;
188 def ReadFMovI32ToF32 : SchedRead;
189 def ReadFMovF64ToI64 : SchedRead;
190 def ReadFMovI64ToF64 : SchedRead;
191 def ReadFCvtF32ToF64 : SchedRead;
192 def ReadFCvtF64ToF32 : SchedRead;
193 def ReadFCvtF16ToF32 : SchedRead;
194 def ReadFCvtF32ToF16 : SchedRead;
195 def ReadFCvtF16ToF64 : SchedRead;
196 def ReadFCvtF64ToF16 : SchedRead;
197 def ReadFRoundF16 : SchedRead;
198 def ReadFRoundF32 : SchedRead;
199 def ReadFRoundF64 : SchedRead;
200 def ReadFClass16 : SchedRead;
201 def ReadFClass32 : SchedRead;
202 def ReadFClass64 : SchedRead;
204 multiclass UnsupportedSchedZfh {
205 let Unsupported = true in {
206 def : WriteRes<WriteFAdd16, []>;
207 def : WriteRes<WriteFClass16, []>;
208 def : WriteRes<WriteFCvtF16ToF64, []>;
209 def : WriteRes<WriteFCvtF64ToF16, []>;
210 def : WriteRes<WriteFCvtI64ToF16, []>;
211 def : WriteRes<WriteFCvtF32ToF16, []>;
212 def : WriteRes<WriteFCvtI32ToF16, []>;
213 def : WriteRes<WriteFCvtF16ToI64, []>;
214 def : WriteRes<WriteFCvtF16ToF32, []>;
215 def : WriteRes<WriteFCvtF16ToI32, []>;
216 def : WriteRes<WriteFDiv16, []>;
217 def : WriteRes<WriteFCmp16, []>;
218 def : WriteRes<WriteFLD16, []>;
219 def : WriteRes<WriteFMA16, []>;
220 def : WriteRes<WriteFMinMax16, []>;
221 def : WriteRes<WriteFMul16, []>;
222 def : WriteRes<WriteFMovI16ToF16, []>;
223 def : WriteRes<WriteFMovF16ToI16, []>;
224 def : WriteRes<WriteFSGNJ16, []>;
225 def : WriteRes<WriteFST16, []>;
226 def : WriteRes<WriteFSqrt16, []>;
228 def : ReadAdvance<ReadFAdd16, 0>;
229 def : ReadAdvance<ReadFClass16, 0>;
230 def : ReadAdvance<ReadFCvtF16ToF64, 0>;
231 def : ReadAdvance<ReadFCvtF64ToF16, 0>;
232 def : ReadAdvance<ReadFCvtI64ToF16, 0>;
233 def : ReadAdvance<ReadFCvtF32ToF16, 0>;
234 def : ReadAdvance<ReadFCvtI32ToF16, 0>;
235 def : ReadAdvance<ReadFCvtF16ToI64, 0>;
236 def : ReadAdvance<ReadFCvtF16ToF32, 0>;
237 def : ReadAdvance<ReadFCvtF16ToI32, 0>;
238 def : ReadAdvance<ReadFDiv16, 0>;
239 def : ReadAdvance<ReadFCmp16, 0>;
240 def : ReadAdvance<ReadFMA16, 0>;
241 def : ReadAdvance<ReadFMinMax16, 0>;
242 def : ReadAdvance<ReadFMul16, 0>;
243 def : ReadAdvance<ReadFMovI16ToF16, 0>;
244 def : ReadAdvance<ReadFMovF16ToI16, 0>;
245 def : ReadAdvance<ReadFSGNJ16, 0>;
246 def : ReadAdvance<ReadFSqrt16, 0>;
247 } // Unsupported = true
250 multiclass UnsupportedSchedSFB {
251 let Unsupported = true in {
252 def : WriteRes<WriteSFB, []>;
254 def : ReadAdvance<ReadSFBJmp, 0>;
255 def : ReadAdvance<ReadSFBALU, 0>;
256 } // Unsupported = true
259 multiclass UnsupportedSchedZfa {
260 let Unsupported = true in {
261 def : WriteRes<WriteFRoundF16, []>;
262 def : WriteRes<WriteFRoundF32, []>;
263 def : WriteRes<WriteFRoundF64, []>;
264 def : WriteRes<WriteFLI16, []>;
265 def : WriteRes<WriteFLI32, []>;
266 def : WriteRes<WriteFLI64, []>;
268 def : ReadAdvance<ReadFRoundF32, 0>;
269 def : ReadAdvance<ReadFRoundF64, 0>;
270 def : ReadAdvance<ReadFRoundF16, 0>;
271 } // Unsupported = true
274 // Include the scheduler resources for other instruction extensions.
275 include "RISCVScheduleZb.td"
276 include "RISCVScheduleV.td"