llvm/lib/Target/RISCV/RISCVScheduleZb.td

   1 //===- RISCVScheduleB.td - RISC-V Scheduling Definitions B -*- tablegen -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 /// Define scheduler resources associated with def operands.
  10
  11 // Zba extension
  12 def WriteSHXADD      : SchedWrite; // sh1add/sh2add/sh3add
  13 def WriteSHXADD32    : SchedWrite; // sh1add.uw/sh2add.uw/sh3add.uw
  14
  15 // Zbb extension
  16 def WriteRotateImm   : SchedWrite;
  17 def WriteRotateImm32 : SchedWrite;
  18 def WriteRotateReg   : SchedWrite;
  19 def WriteRotateReg32 : SchedWrite;
  20 def WriteCLZ         : SchedWrite;
  21 def WriteCLZ32       : SchedWrite;
  22 def WriteCTZ         : SchedWrite;
  23 def WriteCTZ32       : SchedWrite;
  24 def WriteCPOP        : SchedWrite;
  25 def WriteCPOP32      : SchedWrite;
  26 def WriteREV8        : SchedWrite;
  27 def WriteORCB        : SchedWrite;
  28
  29 // Zbc extension
  30 def WriteCLMUL       : SchedWrite; // CLMUL/CLMULR/CLMULH
  31
  32 // Zbs extension
  33 def WriteSingleBit   : SchedWrite; // BCLR/BSET/BINV
  34 def WriteSingleBitImm: SchedWrite; // BCLRI/BSETI/BINVI
  35 def WriteBEXT : SchedWrite; // BEXT
  36 def WriteBEXTI : SchedWrite; // BEXTI
  37
  38 // Zbkb extension
  39 def WriteBREV8       : SchedWrite; // brev8
  40 def WritePACK        : SchedWrite; // pack/packh
  41 def WritePACK32      : SchedWrite; // packw
  42 def WriteZIP         : SchedWrite; // zip/unzip
  43
  44 // Zbkx extension
  45 def WriteXPERM       : SchedWrite; // xperm4/xperm8
  46
  47 /// Define scheduler resources associated with use operands.
  48
  49 // Zba extension
  50 def ReadSHXADD      : SchedRead; // sh1add/sh2add/sh3add
  51 def ReadSHXADD32    : SchedRead; // sh1add.uw/sh2add.uw/sh3add.uw
  52
  53 // Zbb extension
  54 def ReadRotateImm   : SchedRead;
  55 def ReadRotateImm32 : SchedRead;
  56 def ReadRotateReg   : SchedRead;
  57 def ReadRotateReg32 : SchedRead;
  58 def ReadCLZ         : SchedRead;
  59 def ReadCLZ32       : SchedRead;
  60 def ReadCTZ         : SchedRead;
  61 def ReadCTZ32       : SchedRead;
  62 def ReadCPOP        : SchedRead;
  63 def ReadCPOP32      : SchedRead;
  64 def ReadREV8        : SchedRead;
  65 def ReadORCB        : SchedRead;
  66
  67 // Zbc extension
  68 def ReadCLMUL       : SchedRead; // CLMUL/CLMULR/CLMULH
  69
  70 // Zbs extension
  71 def ReadSingleBit   : SchedRead; // BCLR/BSET/BINV/BEXT
  72 def ReadSingleBitImm: SchedRead; // BCLRI/BSETI/BINVI/BEXTI
  73
  74 // Zbkb extension
  75 def ReadBREV8       : SchedRead; // brev8
  76 def ReadPACK        : SchedRead; // pack/packh
  77 def ReadPACK32      : SchedRead; // packw
  78 def ReadZIP         : SchedRead; // zip/unzip
  79
  80 // Zbkx extension
  81 def ReadXPERM       : SchedRead; // xperm4/xperm8
  82
  83 /// Define default scheduler resources for B.
  84
  85 multiclass UnsupportedSchedZba {
  86 let Unsupported = true in {
  87 def : WriteRes<WriteSHXADD, []>;
  88 def : WriteRes<WriteSHXADD32, []>;
  89
  90 def : ReadAdvance<ReadSHXADD, 0>;
  91 def : ReadAdvance<ReadSHXADD32, 0>;
  92 }
  93 }
  94
  95 multiclass UnsupportedSchedZbb {
  96 let Unsupported = true in {
  97 def : WriteRes<WriteRotateImm, []>;
  98 def : WriteRes<WriteRotateImm32, []>;
  99 def : WriteRes<WriteRotateReg, []>;
 100 def : WriteRes<WriteRotateReg32, []>;
 101 def : WriteRes<WriteCLZ, []>;
 102 def : WriteRes<WriteCLZ32, []>;
 103 def : WriteRes<WriteCTZ, []>;
 104 def : WriteRes<WriteCTZ32, []>;
 105 def : WriteRes<WriteCPOP, []>;
 106 def : WriteRes<WriteCPOP32, []>;
 107 def : WriteRes<WriteREV8, []>;
 108 def : WriteRes<WriteORCB, []>;
 109
 110 def : ReadAdvance<ReadRotateImm, 0>;
 111 def : ReadAdvance<ReadRotateImm32, 0>;
 112 def : ReadAdvance<ReadRotateReg, 0>;
 113 def : ReadAdvance<ReadRotateReg32, 0>;
 114 def : ReadAdvance<ReadCLZ, 0>;
 115 def : ReadAdvance<ReadCLZ32, 0>;
 116 def : ReadAdvance<ReadCTZ, 0>;
 117 def : ReadAdvance<ReadCTZ32, 0>;
 118 def : ReadAdvance<ReadCPOP, 0>;
 119 def : ReadAdvance<ReadCPOP32, 0>;
 120 def : ReadAdvance<ReadREV8, 0>;
 121 def : ReadAdvance<ReadORCB, 0>;
 122 }
 123 }
 124
 125 multiclass UnsupportedSchedZbc {
 126 let Unsupported = true in {
 127 def : WriteRes<WriteCLMUL, []>;
 128
 129 def : ReadAdvance<ReadCLMUL, 0>;
 130 }
 131 }
 132
 133 multiclass UnsupportedSchedZbs {
 134 let Unsupported = true in {
 135 def : WriteRes<WriteSingleBit, []>;
 136 def : WriteRes<WriteSingleBitImm, []>;
 137 def : WriteRes<WriteBEXT, []>;
 138 def : WriteRes<WriteBEXTI, []>;
 139
 140 def : ReadAdvance<ReadSingleBit, 0>;
 141 def : ReadAdvance<ReadSingleBitImm, 0>;
 142 }
 143 }
 144
 145 multiclass UnsupportedSchedZbkb {
 146 let Unsupported = true in {
 147 def : WriteRes<WriteBREV8, []>;
 148 def : WriteRes<WritePACK, []>;
 149 def : WriteRes<WritePACK32, []>;
 150 def : WriteRes<WriteZIP, []>;
 151
 152 def : ReadAdvance<ReadBREV8, 0>;
 153 def : ReadAdvance<ReadPACK, 0>;
 154 def : ReadAdvance<ReadPACK32, 0>;
 155 def : ReadAdvance<ReadZIP, 0>;
 156 }
 157 }
 158
 159 multiclass UnsupportedSchedZbkx {
 160 let Unsupported = true in {
 161 def : WriteRes<WriteXPERM, []>;
 162
 163 def : ReadAdvance<ReadXPERM, 0>;
 164 }
 165 }