1 //===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This pass is a simple pass wrapper around the PromoteMemToReg function call
10 // exposed by the Utils library.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Transforms/Utils/Mem2Reg.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/Analysis/AssumptionCache.h"
17 #include "llvm/IR/BasicBlock.h"
18 #include "llvm/IR/Dominators.h"
19 #include "llvm/IR/Function.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/PassManager.h"
22 #include "llvm/InitializePasses.h"
23 #include "llvm/Pass.h"
24 #include "llvm/Support/Casting.h"
25 #include "llvm/Transforms/Utils.h"
26 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
31 #define DEBUG_TYPE "mem2reg"
33 STATISTIC(NumPromoted
, "Number of alloca's promoted");
35 static bool promoteMemoryToRegister(Function
&F
, DominatorTree
&DT
,
36 AssumptionCache
&AC
) {
37 std::vector
<AllocaInst
*> Allocas
;
38 BasicBlock
&BB
= F
.getEntryBlock(); // Get the entry node for the function
44 // Find allocas that are safe to promote, by looking at all instructions in
46 for (BasicBlock::iterator I
= BB
.begin(), E
= --BB
.end(); I
!= E
; ++I
)
47 if (AllocaInst
*AI
= dyn_cast
<AllocaInst
>(I
)) // Is it an alloca?
48 if (isAllocaPromotable(AI
))
49 Allocas
.push_back(AI
);
54 PromoteMemToReg(Allocas
, DT
, &AC
);
55 NumPromoted
+= Allocas
.size();
61 PreservedAnalyses
PromotePass::run(Function
&F
, FunctionAnalysisManager
&AM
) {
62 auto &DT
= AM
.getResult
<DominatorTreeAnalysis
>(F
);
63 auto &AC
= AM
.getResult
<AssumptionAnalysis
>(F
);
64 if (!promoteMemoryToRegister(F
, DT
, AC
))
65 return PreservedAnalyses::all();
68 PA
.preserveSet
<CFGAnalyses
>();
74 struct PromoteLegacyPass
: public FunctionPass
{
75 // Pass identification, replacement for typeid
77 bool ForcePass
; /// If true, forces pass to execute, instead of skipping.
79 PromoteLegacyPass() : FunctionPass(ID
), ForcePass(false) {
80 initializePromoteLegacyPassPass(*PassRegistry::getPassRegistry());
82 PromoteLegacyPass(bool IsForced
) : FunctionPass(ID
), ForcePass(IsForced
) {
83 initializePromoteLegacyPassPass(*PassRegistry::getPassRegistry());
86 // runOnFunction - To run this pass, first we calculate the alloca
87 // instructions that are safe for promotion, then we promote each one.
88 bool runOnFunction(Function
&F
) override
{
89 if (!ForcePass
&& skipFunction(F
))
92 DominatorTree
&DT
= getAnalysis
<DominatorTreeWrapperPass
>().getDomTree();
94 getAnalysis
<AssumptionCacheTracker
>().getAssumptionCache(F
);
95 return promoteMemoryToRegister(F
, DT
, AC
);
98 void getAnalysisUsage(AnalysisUsage
&AU
) const override
{
99 AU
.addRequired
<AssumptionCacheTracker
>();
100 AU
.addRequired
<DominatorTreeWrapperPass
>();
101 AU
.setPreservesCFG();
105 } // end anonymous namespace
107 char PromoteLegacyPass::ID
= 0;
109 INITIALIZE_PASS_BEGIN(PromoteLegacyPass
, "mem2reg", "Promote Memory to "
112 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker
)
113 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass
)
114 INITIALIZE_PASS_END(PromoteLegacyPass
, "mem2reg", "Promote Memory to Register",
117 // createPromoteMemoryToRegister - Provide an entry point to create this pass.
118 FunctionPass
*llvm::createPromoteMemoryToRegisterPass(bool IsForced
) {
119 return new PromoteLegacyPass(IsForced
);