[RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (...
[llvm-project.git] / polly / test / CodeGen / 20100718-DomInfo.ll
blobe12334359c33fe4aa69d1246653d63b99ced24dd
1 ; RUN: opt %loadPolly -polly-codegen -verify-dom-info -disable-output < %s
2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4 define void @intrapred_luma_16x16(i32 %predmode) nounwind {
5 entry:
6   switch i32 %predmode, label %bb81 [
7     i32 0, label %bb25
8     i32 1, label %bb26
9   ]
11 bb23:                                             ; preds = %bb25
12   %indvar.next95 = add i64 %indvar94, 1           ; <i64> [#uses=1]
13   br label %bb25
15 bb25:                                             ; preds = %bb23, %entry
16   %indvar94 = phi i64 [ %indvar.next95, %bb23 ], [ 0, %entry ] ; <i64> [#uses=1]
17   br i1 false, label %bb23, label %return
19 bb26:                                             ; preds = %entry
20   ret void
22 bb81:                                             ; preds = %entry
23   ret void
25 return:                                           ; preds = %bb25
26   ret void