clang/test/CodeGen/LoongArch/intrinsic-la32.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple loongarch32 -target-feature +f -O2 -emit-llvm %s -o - \
   3 // RUN:     | FileCheck %s -check-prefix=LA32
   4
   5 #include <larchintrin.h>
   6
   7 // LA32-LABEL: @dbar(
   8 // LA32-NEXT:  entry:
   9 // LA32-NEXT:    tail call void @llvm.loongarch.dbar(i32 0)
  10 // LA32-NEXT:    tail call void @llvm.loongarch.dbar(i32 0)
  11 // LA32-NEXT:    ret void
  12 //
  13 void dbar() {
  14   __dbar(0);
  15   __builtin_loongarch_dbar(0);
  16 }
  17
  18 // LA32-LABEL: @ibar(
  19 // LA32-NEXT:  entry:
  20 // LA32-NEXT:    tail call void @llvm.loongarch.ibar(i32 0)
  21 // LA32-NEXT:    tail call void @llvm.loongarch.ibar(i32 0)
  22 // LA32-NEXT:    ret void
  23 //
  24 void ibar() {
  25   __ibar(0);
  26   __builtin_loongarch_ibar(0);
  27 }
  28
  29 // LA32-LABEL: @loongarch_break(
  30 // LA32-NEXT:  entry:
  31 // LA32-NEXT:    tail call void @llvm.loongarch.break(i32 1)
  32 // LA32-NEXT:    tail call void @llvm.loongarch.break(i32 1)
  33 // LA32-NEXT:    ret void
  34 //
  35 void loongarch_break() {
  36   __break(1);
  37   __builtin_loongarch_break(1);
  38 }
  39
  40 // LA32-LABEL: @syscall(
  41 // LA32-NEXT:  entry:
  42 // LA32-NEXT:    tail call void @llvm.loongarch.syscall(i32 1)
  43 // LA32-NEXT:    tail call void @llvm.loongarch.syscall(i32 1)
  44 // LA32-NEXT:    ret void
  45 //
  46 void syscall() {
  47   __syscall(1);
  48   __builtin_loongarch_syscall(1);
  49 }
  50
  51 // LA32-LABEL: @csrrd_w(
  52 // LA32-NEXT:  entry:
  53 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.csrrd.w(i32 1)
  54 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.csrrd.w(i32 1)
  55 // LA32-NEXT:    ret i32 0
  56 //
  57 unsigned int csrrd_w() {
  58   unsigned int a = __csrrd_w(1);
  59   unsigned int b = __builtin_loongarch_csrrd_w(1);
  60   return 0;
  61 }
  62
  63 // LA32-LABEL: @csrwr_w(
  64 // LA32-NEXT:  entry:
  65 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.csrwr.w(i32 [[A:%.*]], i32 1)
  66 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.csrwr.w(i32 [[A]], i32 1)
  67 // LA32-NEXT:    ret i32 0
  68 //
  69 unsigned int csrwr_w(unsigned int a) {
  70   unsigned int b = __csrwr_w(a, 1);
  71   unsigned int c = __builtin_loongarch_csrwr_w(a, 1);
  72   return 0;
  73 }
  74
  75 // LA32-LABEL: @csrxchg_w(
  76 // LA32-NEXT:  entry:
  77 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.csrxchg.w(i32 [[A:%.*]], i32 [[B:%.*]], i32 1)
  78 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.csrxchg.w(i32 [[A]], i32 [[B]], i32 1)
  79 // LA32-NEXT:    ret i32 0
  80 //
  81 unsigned int csrxchg_w(unsigned int a, unsigned int b) {
  82   unsigned int c = __csrxchg_w(a, b, 1);
  83   unsigned int d = __builtin_loongarch_csrxchg_w(a, b, 1);
  84   return 0;
  85 }
  86
  87 // LA32-LABEL: @iocsrrd_b(
  88 // LA32-NEXT:  entry:
  89 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.b(i32 [[A:%.*]])
  90 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.b(i32 [[A]])
  91 // LA32-NEXT:    ret i8 0
  92 //
  93 unsigned char iocsrrd_b(unsigned int a) {
  94   unsigned char b = __iocsrrd_b(a);
  95   unsigned char c = __builtin_loongarch_iocsrrd_b(a);
  96   return 0;
  97 }
  98
  99 // LA32-LABEL: @iocsrrd_h(
 100 // LA32-NEXT:  entry:
 101 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A:%.*]])
 102 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A]])
 103 // LA32-NEXT:    ret i16 0
 104 //
 105 unsigned short iocsrrd_h(unsigned int a) {
 106   unsigned short b = __iocsrrd_h(a);
 107   unsigned short c = __builtin_loongarch_iocsrrd_h(a);
 108   return 0;
 109 }
 110
 111 // LA32-LABEL: @iocsrrd_w(
 112 // LA32-NEXT:  entry:
 113 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.w(i32 [[A:%.*]])
 114 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.w(i32 [[A]])
 115 // LA32-NEXT:    ret i32 0
 116 //
 117 unsigned int iocsrrd_w(unsigned int a) {
 118   unsigned int b = __iocsrrd_w(a);
 119   unsigned int c = __builtin_loongarch_iocsrrd_w(a);
 120   return 0;
 121 }
 122
 123 // LA32-LABEL: @iocsrwr_b(
 124 // LA32-NEXT:  entry:
 125 // LA32-NEXT:    [[CONV_I:%.*]] = zext i8 [[A:%.*]] to i32
 126 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.b(i32 [[CONV_I]], i32 [[B:%.*]])
 127 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.b(i32 [[CONV_I]], i32 [[B]])
 128 // LA32-NEXT:    ret void
 129 //
 130 void iocsrwr_b(unsigned char a, unsigned int b) {
 131   __iocsrwr_b(a, b);
 132   __builtin_loongarch_iocsrwr_b(a, b);
 133 }
 134
 135 // LA32-LABEL: @iocsrwr_h(
 136 // LA32-NEXT:  entry:
 137 // LA32-NEXT:    [[CONV_I:%.*]] = zext i16 [[A:%.*]] to i32
 138 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.h(i32 [[CONV_I]], i32 [[B:%.*]])
 139 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.h(i32 [[CONV_I]], i32 [[B]])
 140 // LA32-NEXT:    ret void
 141 //
 142 void iocsrwr_h(unsigned short a, unsigned int b) {
 143   __iocsrwr_h(a, b);
 144   __builtin_loongarch_iocsrwr_h(a, b);
 145 }
 146
 147 // LA32-LABEL: @iocsrwr_w(
 148 // LA32-NEXT:  entry:
 149 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.w(i32 [[A:%.*]], i32 [[B:%.*]])
 150 // LA32-NEXT:    tail call void @llvm.loongarch.iocsrwr.w(i32 [[A]], i32 [[B]])
 151 // LA32-NEXT:    ret void
 152 //
 153 void iocsrwr_w(unsigned int a, unsigned int b) {
 154   __iocsrwr_w(a, b);
 155   __builtin_loongarch_iocsrwr_w(a, b);
 156 }
 157
 158 // LA32-LABEL: @cpucfg(
 159 // LA32-NEXT:  entry:
 160 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.cpucfg(i32 [[A:%.*]])
 161 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.cpucfg(i32 [[A]])
 162 // LA32-NEXT:    ret i32 0
 163 //
 164 unsigned int cpucfg(unsigned int a) {
 165   unsigned int b = __cpucfg(a);
 166   unsigned int c = __builtin_loongarch_cpucfg(a);
 167   return 0;
 168 }
 169
 170 // LA32-LABEL: @rdtime(
 171 // LA32-NEXT:  entry:
 172 // LA32-NEXT:    [[TMP0:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimeh.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1:[0-9]+]], !srcloc !2
 173 // LA32-NEXT:    [[TMP1:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimel.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc !3
 174 // LA32-NEXT:    ret void
 175 //
 176 void rdtime() {
 177   __rdtimeh_w();
 178   __rdtimel_w();
 179 }
 180
 181 // LA32-LABEL: @loongarch_movfcsr2gr(
 182 // LA32-NEXT:  entry:
 183 // LA32-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.loongarch.movfcsr2gr(i32 1)
 184 // LA32-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.loongarch.movfcsr2gr(i32 1)
 185 // LA32-NEXT:    ret i32 0
 186 //
 187 int loongarch_movfcsr2gr() {
 188   int a =  __movfcsr2gr(1);
 189   int b = __builtin_loongarch_movfcsr2gr(1);
 190   return 0;
 191 }
 192
 193 // LA32-LABEL: @loongarch_movgr2fcsr(
 194 // LA32-NEXT:  entry:
 195 // LA32-NEXT:    tail call void @llvm.loongarch.movgr2fcsr(i32 1, i32 [[A:%.*]])
 196 // LA32-NEXT:    tail call void @llvm.loongarch.movgr2fcsr(i32 1, i32 [[A]])
 197 // LA32-NEXT:    ret void
 198 //
 199 void loongarch_movgr2fcsr(int a) {
 200   __movgr2fcsr(1, a);
 201   __builtin_loongarch_movgr2fcsr(1, a);
 202 }
 203
 204 // CHECK-LABEL: @cacop_w(
 205 // CHECK-NEXT:  entry:
 206 // CHECK-NEXT:    tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A:%.*]], i32 1024)
 207 // CHECK-NEXT:    tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A]], i32 1024)
 208 // CHECK-NEXT:    ret void
 209 //
 210 void cacop_w(unsigned long int a) {
 211   __cacop_w(1, a, 1024);
 212   __builtin_loongarch_cacop_w(1, a, 1024);
 213 }