clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-compare.c

   1 // REQUIRES: powerpc-registered-target
   2 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
   3 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=CHECK-64B
   4 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
   5 // RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=CHECK-64B
   6 // RUN: %clang_cc1 -triple powerpc-unknown-aix \
   7 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=CHECK-32B
   8 // RUN: %clang_cc1 -triple powerpc64-unknown-aix \
   9 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=CHECK-64B
  10
  11 // CHECK-64B-LABEL: @test_builtin_ppc_cmpb(
  12 // CHECK-64B:         [[LLA_ADDR:%.*]] = alloca i64, align 8
  13 // CHECK-64B-NEXT:    [[LLB_ADDR:%.*]] = alloca i64, align 8
  14 // CHECK-64B-NEXT:    store i64 [[LLA:%.*]], ptr [[LLA_ADDR]], align 8
  15 // CHECK-64B-NEXT:    store i64 [[LLB:%.*]], ptr [[LLB_ADDR]], align 8
  16 // CHECK-64B-NEXT:    [[TMP0:%.*]] = load i64, ptr [[LLA_ADDR]], align 8
  17 // CHECK-64B-NEXT:    [[TMP1:%.*]] = load i64, ptr [[LLB_ADDR]], align 8
  18 // CHECK-64B-NEXT:    [[CMPB:%.*]] = call i64 @llvm.ppc.cmpb.i64.i64.i64(i64 [[TMP0]], i64 [[TMP1]])
  19 // CHECK-64B-NEXT:    ret i64 [[CMPB]]
  20 //
  21 // CHECK-32B-LABEL: @test_builtin_ppc_cmpb(
  22 // CHECK-32B:         [[LLA_ADDR:%.*]] = alloca i64, align 8
  23 // CHECK-32B-NEXT:    [[LLB_ADDR:%.*]] = alloca i64, align 8
  24 // CHECK-32B-NEXT:    store i64 [[LLA:%.*]], ptr [[LLA_ADDR]], align 8
  25 // CHECK-32B-NEXT:    store i64 [[LLB:%.*]], ptr [[LLB_ADDR]], align 8
  26 // CHECK-32B-NEXT:    [[TMP0:%.*]] = load i64, ptr [[LLA_ADDR]], align 8
  27 // CHECK-32B-NEXT:    [[TMP1:%.*]] = load i64, ptr [[LLB_ADDR]], align 8
  28 // CHECK-32B-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
  29 // CHECK-32B-NEXT:    [[TMP3:%.*]] = trunc i64 [[TMP1]] to i32
  30 // CHECK-32B-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP0]], 32
  31 // CHECK-32B-NEXT:    [[TMP5:%.*]] = trunc i64 [[TMP4]] to i32
  32 // CHECK-32B-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP1]], 32
  33 // CHECK-32B-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i32
  34 // CHECK-32B-NEXT:    [[CMPB:%.*]] = call i32 @llvm.ppc.cmpb.i32.i32.i32(i32 [[TMP2]], i32 [[TMP3]])
  35 // CHECK-32B-NEXT:    [[TMP8:%.*]] = zext i32 [[CMPB]] to i64
  36 // CHECK-32B-NEXT:    [[CMPB1:%.*]] = call i32 @llvm.ppc.cmpb.i32.i32.i32(i32 [[TMP5]], i32 [[TMP7]])
  37 // CHECK-32B-NEXT:    [[TMP9:%.*]] = zext i32 [[CMPB1]] to i64
  38 // CHECK-32B-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP9]], 32
  39 // CHECK-32B-NEXT:    [[TMP11:%.*]] = or i64 [[TMP8]], [[TMP10]]
  40 // CHECK-32B-NEXT:    ret i64 [[TMP11]]
  41 //
  42 long long test_builtin_ppc_cmpb(long long lla, long long llb) {
  43   return __builtin_ppc_cmpb(lla, llb);
  44 }