clang/test/CodeGen/PowerPC/ppc-mm-malloc-le.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: native, target=powerpc64le-{{.*}}
   3 // The stdlib.h included in mm_malloc.h references native system header
   4 // like: bits/libc-header-start.h or features.h, cross-compile it may
   5 // require installing target headers in build env, otherwise expecting
   6 // failures. So this test will focus on native build only.
   7
   8 // RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt | FileCheck %s
   9
  10 #include <mm_malloc.h>
  11
  12
  13 void __attribute__((noinline))
  14 test_mm_malloc() {
  15   char *buf = _mm_malloc(100, 16);
  16   _mm_free(buf);
  17 }
  18
  19 // CHECK-LABEL: @test_mm_malloc
  20
  21 // CHECK: define internal ptr @_mm_malloc(i64 noundef [[REG1:[0-9a-zA-Z_%.]+]], i64 noundef [[REG2:[0-9a-zA-Z_%.]+]])
  22 // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca ptr, align 8
  23 // CHECK: store i64 [[REG1]], ptr [[REG4:[0-9a-zA-Z_%.]+]], align 8
  24 // CHECK-NEXT: store i64 [[REG2]], ptr [[REG5:[0-9a-zA-Z_%.]+]], align 8
  25 // CHECK-NEXT: store i64 16, ptr [[REG6:[0-9a-zA-Z_%.]+]], align 8
  26 // CHECK-NEXT: [[REG8:[0-9a-zA-Z_%.]+]] = load i64, ptr [[REG5]], align 8
  27 // CHECK-NEXT: [[REG9:[0-9a-zA-Z_%.]+]] = load i64, ptr [[REG6]], align 8
  28 // CHECK-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = icmp ult i64 [[REG8]], [[REG9]]
  29 // CHECK-NEXT: br i1 [[REG10]], label %[[REG23:[0-9a-zA-Z_%.]+]], label %[[REG24:[0-9a-zA-Z_%.]+]]
  30 // CHECK: [[REG23]]:
  31 // CHECK-NEXT: [[REG25:[0-9a-zA-Z_%.]+]] = load i64, ptr [[REG6]], align 8
  32 // CHECK-NEXT: store i64 [[REG25]], ptr [[REG5]], align 8
  33 // CHECK-NEXT: br label %[[REG24:[0-9a-zA-Z_%.]+]]
  34 // CHECK: [[REG24]]:
  35 // CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = load i64, ptr [[REG5]], align 8
  36 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load i64, ptr [[REG4]], align 8
  37 // CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 @posix_memalign(ptr noundef [[REG29:[0-9a-zA-Z_%.]+]], i64 noundef [[REG26]], i64 noundef [[REG27]])
  38 // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = icmp eq i32 [[REG28]], 0
  39 // CHECK-NEXT: br i1 [[REG30]], label %[[REG31:[0-9a-zA-Z_%.]+]], label %[[REG32:[0-9a-zA-Z_%.]+]]
  40 // CHECK: [[REG31]]:
  41 // CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = load ptr, ptr [[REG29]], align 8
  42 // CHECK-NEXT: store ptr [[REG33]], ptr [[REG3]], align 8
  43 // CHECK-NEXT: br label %[[REG19:[0-9a-zA-Z_%.]+]]
  44 // CHECK: [[REG32]]:
  45 // CHECK-NEXT: store ptr null, ptr [[REG3]], align 8
  46 // CHECK-NEXT: br label %[[REG19:[0-9a-zA-Z_%.]+]]
  47 // CHECK: [[REG19]]:
  48 // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load ptr, ptr [[REG3]], align 8
  49 // CHECK-NEXT: ret ptr [[REG34]]
  50
  51 // CHECK: define internal void @_mm_free(ptr noundef [[REG35:[0-9a-zA-Z_%.]+]])
  52 // CHECK: store ptr [[REG35]], ptr [[REG36:[0-9a-zA-Z_%.]+]], align 8
  53 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load ptr, ptr [[REG36]], align 8
  54 // CHECK-NEXT: call void @free(ptr noundef [[REG37]])
  55 // CHECK-NEXT: ret void