flang/test/Lower/PowerPC/ppc-vec-any.f90

   1 ! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR" %s
   2 ! REQUIRES: target=powerpc{{.*}}
   3
   4 !----------------------
   5 ! vec_any_ge
   6 !----------------------
   7
   8 ! CHECK-LABEL: vec_any_ge_test_i1
   9 subroutine vec_any_ge_test_i1(arg1, arg2)
  10   vector(integer(1)), intent(in) :: arg1, arg2
  11   integer(4) :: r
  12   r = vec_any_ge(arg1, arg2)
  13
  14 ! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16
  15 ! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16
  16 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtsb.p(i32 3, <16 x i8> %[[arg2]], <16 x i8> %[[arg1]])
  17 end subroutine vec_any_ge_test_i1
  18
  19 ! CHECK-LABEL: vec_any_ge_test_i2
  20 subroutine vec_any_ge_test_i2(arg1, arg2)
  21   vector(integer(2)), intent(in) :: arg1, arg2
  22   integer(4) :: r
  23   r = vec_any_ge(arg1, arg2)
  24
  25 ! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16
  26 ! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16
  27 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtsh.p(i32 3, <8 x i16> %[[arg2]], <8 x i16> %[[arg1]])
  28 end subroutine vec_any_ge_test_i2
  29
  30 ! CHECK-LABEL: vec_any_ge_test_i4
  31 subroutine vec_any_ge_test_i4(arg1, arg2)
  32   vector(integer(4)), intent(in) :: arg1, arg2
  33   integer(4) :: r
  34   r = vec_any_ge(arg1, arg2)
  35
  36 ! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16
  37 ! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16
  38 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtsw.p(i32 3, <4 x i32> %[[arg2]], <4 x i32> %[[arg1]])
  39 end subroutine vec_any_ge_test_i4
  40
  41 ! CHECK-LABEL: vec_any_ge_test_i8
  42 subroutine vec_any_ge_test_i8(arg1, arg2)
  43   vector(integer(8)), intent(in) :: arg1, arg2
  44   integer(4) :: r
  45   r = vec_any_ge(arg1, arg2)
  46
  47 ! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16
  48 ! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16
  49 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtsd.p(i32 3, <2 x i64> %[[arg2]], <2 x i64> %[[arg1]])
  50 end subroutine vec_any_ge_test_i8
  51
  52 ! CHECK-LABEL: vec_any_ge_test_u1
  53 subroutine vec_any_ge_test_u1(arg1, arg2)
  54   vector(unsigned(1)), intent(in) :: arg1, arg2
  55   integer(4) :: r
  56   r = vec_any_ge(arg1, arg2)
  57
  58 ! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16
  59 ! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16
  60 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtub.p(i32 3, <16 x i8> %[[arg2]], <16 x i8> %[[arg1]])
  61 end subroutine vec_any_ge_test_u1
  62
  63 ! CHECK-LABEL: vec_any_ge_test_u2
  64 subroutine vec_any_ge_test_u2(arg1, arg2)
  65   vector(unsigned(2)), intent(in) :: arg1, arg2
  66   integer(4) :: r
  67   r = vec_any_ge(arg1, arg2)
  68
  69 ! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16
  70 ! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16
  71 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtuh.p(i32 3, <8 x i16> %[[arg2]], <8 x i16> %[[arg1]])
  72 end subroutine vec_any_ge_test_u2
  73
  74 ! CHECK-LABEL: vec_any_ge_test_u4
  75 subroutine vec_any_ge_test_u4(arg1, arg2)
  76   vector(unsigned(4)), intent(in) :: arg1, arg2
  77   integer(4) :: r
  78   r = vec_any_ge(arg1, arg2)
  79
  80 ! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16
  81 ! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16
  82 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtuw.p(i32 3, <4 x i32> %[[arg2]], <4 x i32> %[[arg1]])
  83 end subroutine vec_any_ge_test_u4
  84
  85 ! CHECK-LABEL: vec_any_ge_test_u8
  86 subroutine vec_any_ge_test_u8(arg1, arg2)
  87   vector(unsigned(8)), intent(in) :: arg1, arg2
  88   integer(4) :: r
  89   r = vec_any_ge(arg1, arg2)
  90
  91 ! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16
  92 ! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16
  93 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.altivec.vcmpgtud.p(i32 3, <2 x i64> %[[arg2]], <2 x i64> %[[arg1]])
  94 end subroutine vec_any_ge_test_u8
  95
  96 ! CHECK-LABEL: vec_any_ge_test_r4
  97 subroutine vec_any_ge_test_r4(arg1, arg2)
  98   vector(real(4)), intent(in) :: arg1, arg2
  99   integer(4) :: r
 100   r = vec_any_ge(arg1, arg2)
 101
 102 ! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16
 103 ! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16
 104 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.vsx.xvcmpgesp.p(i32 1, <4 x float> %[[arg1]], <4 x float> %[[arg2]])
 105 end subroutine vec_any_ge_test_r4
 106
 107 ! CHECK-LABEL: vec_any_ge_test_r8
 108 subroutine vec_any_ge_test_r8(arg1, arg2)
 109   vector(real(8)), intent(in) :: arg1, arg2
 110   integer(4) :: r
 111   r = vec_any_ge(arg1, arg2)
 112
 113 ! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16
 114 ! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16
 115 ! LLVMIR: %{{[0-9]+}} = call i32 @llvm.ppc.vsx.xvcmpgedp.p(i32 1, <2 x double> %[[arg1]], <2 x double> %[[arg2]])
 116 end subroutine vec_any_ge_test_r8
 117