lldb/unittests/Disassembler/ARM/TestArm64Disassembly.cpp

   1 //===-- TestArm64Disassembly.cpp ------------------------------------------===//
   2
   3 //
   4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   5 // See https://llvm.org/LICENSE.txt for license information.
   6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "gtest/gtest.h"
  11
  12 #include "lldb/Core/Address.h"
  13 #include "lldb/Core/Disassembler.h"
  14 #include "lldb/Utility/ArchSpec.h"
  15 #include "lldb/Target/ExecutionContext.h"
  16
  17 #include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h"
  18 #include "llvm/Support/TargetSelect.h"
  19
  20 using namespace lldb;
  21 using namespace lldb_private;
  22
  23 namespace {
  24 class TestArm64Disassembly : public testing::Test {
  25 public:
  26   static void SetUpTestCase();
  27   static void TearDownTestCase();
  28
  29   //  virtual void SetUp() override { }
  30   //  virtual void TearDown() override { }
  31
  32 protected:
  33 };
  34
  35 void TestArm64Disassembly::SetUpTestCase() {
  36   llvm::InitializeAllTargets();
  37   llvm::InitializeAllAsmPrinters();
  38   llvm::InitializeAllTargetMCs();
  39   llvm::InitializeAllDisassemblers();
  40   DisassemblerLLVMC::Initialize();
  41 }
  42
  43 void TestArm64Disassembly::TearDownTestCase() {
  44   DisassemblerLLVMC::Terminate();
  45 }
  46 } // namespace
  47
  48 TEST_F(TestArm64Disassembly, TestArmv81Instruction) {
  49   ArchSpec arch("arm64-apple-ios");
  50
  51   const unsigned num_of_instructions = 2;
  52   uint8_t data[] = {
  53       0xff, 0x43, 0x00, 0xd1, // 0xd10043ff :  sub    sp, sp, #0x10
  54       0x62, 0x7c, 0xa1, 0xc8, // 0xc8a17c62 :  cas    x1, x2, [x3] (cas defined in ARM v8.1 & newer)
  55   };
  56
  57   DisassemblerSP disass_sp;
  58   Address start_addr(0x100);
  59   disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
  60                                  &data, sizeof (data), num_of_instructions, false);
  61
  62   // If we failed to get a disassembler, we can assume it is because
  63   // the llvm we linked against was not built with the ARM target,
  64   // and we should skip these tests without marking anything as failing.
  65
  66   if (disass_sp) {
  67     const InstructionList inst_list (disass_sp->GetInstructionList());
  68     EXPECT_EQ (num_of_instructions, inst_list.GetSize());
  69
  70     InstructionSP inst_sp;
  71     const char *mnemonic;
  72     ExecutionContext exe_ctx (nullptr, nullptr, nullptr);
  73     inst_sp = inst_list.GetInstructionAtIndex (0);
  74     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
  75     ASSERT_STREQ ("sub", mnemonic);
  76
  77     inst_sp = inst_list.GetInstructionAtIndex (1);
  78     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
  79     ASSERT_STREQ ("cas", mnemonic);
  80   }
  81 }