| blob | c13d9144d2aea31cb7b618960aba4e300d0356bc |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3 ; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4 ; RUN: llc -mtriple=aarch64-none-eabi -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5 ; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
7 ; CHECK-GI: warning: Instruction selection used fallback path for fptos_v3f64_v3i64
8 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f64_v3i64
9 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f64_v4i64
10 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f64_v4i64
11 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f64_v8i64
12 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f64_v8i64
13 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f64_v16i64
14 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f64_v16i64
15 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f64_v32i64
16 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f64_v32i64
17 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f64_v3i32
18 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f64_v3i32
19 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f64_v4i32
20 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f64_v4i32
21 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f64_v8i32
22 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f64_v8i32
23 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f64_v16i32
24 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f64_v16i32
25 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f64_v32i32
26 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f64_v32i32
27 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f64_v2i16
28 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f64_v2i16
29 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f64_v3i16
30 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f64_v3i16
31 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f64_v4i16
32 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f64_v4i16
33 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f64_v8i16
34 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f64_v8i16
35 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f64_v16i16
36 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f64_v16i16
37 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f64_v32i16
38 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f64_v32i16
39 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f64_v2i8
40 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f64_v2i8
41 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f64_v3i8
42 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f64_v3i8
43 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f64_v4i8
44 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f64_v4i8
45 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f64_v8i8
46 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f64_v8i8
47 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f64_v16i8
48 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f64_v16i8
49 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f64_v32i8
50 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f64_v32i8
51 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f32_v3i64
52 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f32_v3i64
53 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f32_v4i64
54 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f32_v4i64
55 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f32_v8i64
56 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f32_v8i64
57 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f32_v16i64
58 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f32_v16i64
59 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f32_v32i64
60 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f32_v32i64
61 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f32_v3i32
62 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f32_v3i32
63 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f32_v8i32
64 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f32_v8i32
65 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f32_v16i32
66 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f32_v16i32
67 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f32_v32i32
68 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f32_v32i32
69 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f32_v2i16
70 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f32_v2i16
71 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f32_v3i16
72 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f32_v3i16
73 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f32_v4i16
74 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f32_v4i16
75 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f32_v8i16
76 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f32_v8i16
77 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f32_v16i16
78 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f32_v16i16
79 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f32_v32i16
80 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f32_v32i16
81 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f32_v2i8
82 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f32_v2i8
83 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f32_v3i8
84 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f32_v3i8
85 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f32_v4i8
86 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f32_v4i8
87 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f32_v8i8
88 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f32_v8i8
89 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f32_v16i8
90 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f32_v16i8
91 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f32_v32i8
92 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f32_v32i8
93 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f16_v2i64
94 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f16_v2i64
95 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f16_v3i64
96 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f16_v3i64
97 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f16_v4i64
98 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f16_v4i64
99 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f16_v8i64
100 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f16_v8i64
101 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f16_v16i64
102 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f16_v16i64
103 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f16_v32i64
104 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f16_v32i64
105 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f16_v2i32
106 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f16_v2i32
107 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f16_v3i32
108 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f16_v3i32
109 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f16_v4i32
110 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f16_v4i32
111 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f16_v8i32
112 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f16_v8i32
113 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f16_v16i32
114 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f16_v16i32
115 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f16_v32i32
116 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f16_v32i32
117 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f16_v2i16
118 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f16_v2i16
119 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f16_v3i16
120 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f16_v3i16
121 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f16_v4i16
122 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f16_v4i16
123 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f16_v8i16
124 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f16_v8i16
125 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f16_v16i16
126 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f16_v16i16
127 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f16_v32i16
128 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f16_v32i16
129 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v2f16_v2i8
130 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v2f16_v2i8
131 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v3f16_v3i8
132 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v3f16_v3i8
133 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v4f16_v4i8
134 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v4f16_v4i8
135 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v8f16_v8i8
136 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v8f16_v8i8
137 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v16f16_v16i8
138 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v16f16_v16i8
139 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptos_v32f16_v32i8
140 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for fptou_v32f16_v32i8
142 define i64 @fptos_f64_i64(double %a) {
143 ; CHECK-LABEL: fptos_f64_i64:
144 ; CHECK: // %bb.0: // %entry
145 ; CHECK-NEXT: fcvtzs x0, d0
146 ; CHECK-NEXT: ret
147 entry:
148 %c = fptosi double %a to i64
149 ret i64 %c
150 }
152 define i64 @fptou_f64_i64(double %a) {
153 ; CHECK-LABEL: fptou_f64_i64:
154 ; CHECK: // %bb.0: // %entry
155 ; CHECK-NEXT: fcvtzu x0, d0
156 ; CHECK-NEXT: ret
157 entry:
158 %c = fptoui double %a to i64
159 ret i64 %c
160 }
162 define i32 @fptos_f64_i32(double %a) {
163 ; CHECK-LABEL: fptos_f64_i32:
164 ; CHECK: // %bb.0: // %entry
165 ; CHECK-NEXT: fcvtzs w0, d0
166 ; CHECK-NEXT: ret
167 entry:
168 %c = fptosi double %a to i32
169 ret i32 %c
170 }
172 define i32 @fptou_f64_i32(double %a) {
173 ; CHECK-LABEL: fptou_f64_i32:
174 ; CHECK: // %bb.0: // %entry
175 ; CHECK-NEXT: fcvtzu w0, d0
176 ; CHECK-NEXT: ret
177 entry:
178 %c = fptoui double %a to i32
179 ret i32 %c
180 }
182 define i16 @fptos_f64_i16(double %a) {
183 ; CHECK-LABEL: fptos_f64_i16:
184 ; CHECK: // %bb.0: // %entry
185 ; CHECK-NEXT: fcvtzs w0, d0
186 ; CHECK-NEXT: ret
187 entry:
188 %c = fptosi double %a to i16
189 ret i16 %c
190 }
192 define i16 @fptou_f64_i16(double %a) {
193 ; CHECK-SD-LABEL: fptou_f64_i16:
194 ; CHECK-SD: // %bb.0: // %entry
195 ; CHECK-SD-NEXT: fcvtzs w0, d0
196 ; CHECK-SD-NEXT: ret
197 ;
198 ; CHECK-GI-LABEL: fptou_f64_i16:
199 ; CHECK-GI: // %bb.0: // %entry
200 ; CHECK-GI-NEXT: fcvtzu w0, d0
201 ; CHECK-GI-NEXT: ret
202 entry:
203 %c = fptoui double %a to i16
204 ret i16 %c
205 }
207 define i8 @fptos_f64_i8(double %a) {
208 ; CHECK-LABEL: fptos_f64_i8:
209 ; CHECK: // %bb.0: // %entry
210 ; CHECK-NEXT: fcvtzs w0, d0
211 ; CHECK-NEXT: ret
212 entry:
213 %c = fptosi double %a to i8
214 ret i8 %c
215 }
217 define i8 @fptou_f64_i8(double %a) {
218 ; CHECK-SD-LABEL: fptou_f64_i8:
219 ; CHECK-SD: // %bb.0: // %entry
220 ; CHECK-SD-NEXT: fcvtzs w0, d0
221 ; CHECK-SD-NEXT: ret
222 ;
223 ; CHECK-GI-LABEL: fptou_f64_i8:
224 ; CHECK-GI: // %bb.0: // %entry
225 ; CHECK-GI-NEXT: fcvtzu w0, d0
226 ; CHECK-GI-NEXT: ret
227 entry:
228 %c = fptoui double %a to i8
229 ret i8 %c
230 }
232 define i64 @fptos_f32_i64(float %a) {
233 ; CHECK-LABEL: fptos_f32_i64:
234 ; CHECK: // %bb.0: // %entry
235 ; CHECK-NEXT: fcvtzs x0, s0
236 ; CHECK-NEXT: ret
237 entry:
238 %c = fptosi float %a to i64
239 ret i64 %c
240 }
242 define i64 @fptou_f32_i64(float %a) {
243 ; CHECK-LABEL: fptou_f32_i64:
244 ; CHECK: // %bb.0: // %entry
245 ; CHECK-NEXT: fcvtzu x0, s0
246 ; CHECK-NEXT: ret
247 entry:
248 %c = fptoui float %a to i64
249 ret i64 %c
250 }
252 define i32 @fptos_f32_i32(float %a) {
253 ; CHECK-LABEL: fptos_f32_i32:
254 ; CHECK: // %bb.0: // %entry
255 ; CHECK-NEXT: fcvtzs w0, s0
256 ; CHECK-NEXT: ret
257 entry:
258 %c = fptosi float %a to i32
259 ret i32 %c
260 }
262 define i32 @fptou_f32_i32(float %a) {
263 ; CHECK-LABEL: fptou_f32_i32:
264 ; CHECK: // %bb.0: // %entry
265 ; CHECK-NEXT: fcvtzu w0, s0
266 ; CHECK-NEXT: ret
267 entry:
268 %c = fptoui float %a to i32
269 ret i32 %c
270 }
272 define i16 @fptos_f32_i16(float %a) {
273 ; CHECK-LABEL: fptos_f32_i16:
274 ; CHECK: // %bb.0: // %entry
275 ; CHECK-NEXT: fcvtzs w0, s0
276 ; CHECK-NEXT: ret
277 entry:
278 %c = fptosi float %a to i16
279 ret i16 %c
280 }
282 define i16 @fptou_f32_i16(float %a) {
283 ; CHECK-SD-LABEL: fptou_f32_i16:
284 ; CHECK-SD: // %bb.0: // %entry
285 ; CHECK-SD-NEXT: fcvtzs w0, s0
286 ; CHECK-SD-NEXT: ret
287 ;
288 ; CHECK-GI-LABEL: fptou_f32_i16:
289 ; CHECK-GI: // %bb.0: // %entry
290 ; CHECK-GI-NEXT: fcvtzu w0, s0
291 ; CHECK-GI-NEXT: ret
292 entry:
293 %c = fptoui float %a to i16
294 ret i16 %c
295 }
297 define i8 @fptos_f32_i8(float %a) {
298 ; CHECK-LABEL: fptos_f32_i8:
299 ; CHECK: // %bb.0: // %entry
300 ; CHECK-NEXT: fcvtzs w0, s0
301 ; CHECK-NEXT: ret
302 entry:
303 %c = fptosi float %a to i8
304 ret i8 %c
305 }
307 define i8 @fptou_f32_i8(float %a) {
308 ; CHECK-SD-LABEL: fptou_f32_i8:
309 ; CHECK-SD: // %bb.0: // %entry
310 ; CHECK-SD-NEXT: fcvtzs w0, s0
311 ; CHECK-SD-NEXT: ret
312 ;
313 ; CHECK-GI-LABEL: fptou_f32_i8:
314 ; CHECK-GI: // %bb.0: // %entry
315 ; CHECK-GI-NEXT: fcvtzu w0, s0
316 ; CHECK-GI-NEXT: ret
317 entry:
318 %c = fptoui float %a to i8
319 ret i8 %c
320 }
322 define i64 @fptos_f16_i64(half %a) {
323 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i64:
324 ; CHECK-SD-NOFP16: // %bb.0: // %entry
325 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
326 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s0
327 ; CHECK-SD-NOFP16-NEXT: ret
328 ;
329 ; CHECK-SD-FP16-LABEL: fptos_f16_i64:
330 ; CHECK-SD-FP16: // %bb.0: // %entry
331 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h0
332 ; CHECK-SD-FP16-NEXT: ret
333 ;
334 ; CHECK-GI-LABEL: fptos_f16_i64:
335 ; CHECK-GI: // %bb.0: // %entry
336 ; CHECK-GI-NEXT: fcvt s0, h0
337 ; CHECK-GI-NEXT: fcvtzs x0, s0
338 ; CHECK-GI-NEXT: ret
339 entry:
340 %c = fptosi half %a to i64
341 ret i64 %c
342 }
344 define i64 @fptou_f16_i64(half %a) {
345 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i64:
346 ; CHECK-SD-NOFP16: // %bb.0: // %entry
347 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
348 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s0
349 ; CHECK-SD-NOFP16-NEXT: ret
350 ;
351 ; CHECK-SD-FP16-LABEL: fptou_f16_i64:
352 ; CHECK-SD-FP16: // %bb.0: // %entry
353 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h0
354 ; CHECK-SD-FP16-NEXT: ret
355 ;
356 ; CHECK-GI-LABEL: fptou_f16_i64:
357 ; CHECK-GI: // %bb.0: // %entry
358 ; CHECK-GI-NEXT: fcvt s0, h0
359 ; CHECK-GI-NEXT: fcvtzu x0, s0
360 ; CHECK-GI-NEXT: ret
361 entry:
362 %c = fptoui half %a to i64
363 ret i64 %c
364 }
366 define i32 @fptos_f16_i32(half %a) {
367 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i32:
368 ; CHECK-SD-NOFP16: // %bb.0: // %entry
369 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
370 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
371 ; CHECK-SD-NOFP16-NEXT: ret
372 ;
373 ; CHECK-SD-FP16-LABEL: fptos_f16_i32:
374 ; CHECK-SD-FP16: // %bb.0: // %entry
375 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
376 ; CHECK-SD-FP16-NEXT: ret
377 ;
378 ; CHECK-GI-LABEL: fptos_f16_i32:
379 ; CHECK-GI: // %bb.0: // %entry
380 ; CHECK-GI-NEXT: fcvt s0, h0
381 ; CHECK-GI-NEXT: fcvtzs w0, s0
382 ; CHECK-GI-NEXT: ret
383 entry:
384 %c = fptosi half %a to i32
385 ret i32 %c
386 }
388 define i32 @fptou_f16_i32(half %a) {
389 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i32:
390 ; CHECK-SD-NOFP16: // %bb.0: // %entry
391 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
392 ; CHECK-SD-NOFP16-NEXT: fcvtzu w0, s0
393 ; CHECK-SD-NOFP16-NEXT: ret
394 ;
395 ; CHECK-SD-FP16-LABEL: fptou_f16_i32:
396 ; CHECK-SD-FP16: // %bb.0: // %entry
397 ; CHECK-SD-FP16-NEXT: fcvtzu w0, h0
398 ; CHECK-SD-FP16-NEXT: ret
399 ;
400 ; CHECK-GI-LABEL: fptou_f16_i32:
401 ; CHECK-GI: // %bb.0: // %entry
402 ; CHECK-GI-NEXT: fcvt s0, h0
403 ; CHECK-GI-NEXT: fcvtzu w0, s0
404 ; CHECK-GI-NEXT: ret
405 entry:
406 %c = fptoui half %a to i32
407 ret i32 %c
408 }
410 define i16 @fptos_f16_i16(half %a) {
411 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i16:
412 ; CHECK-SD-NOFP16: // %bb.0: // %entry
413 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
414 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
415 ; CHECK-SD-NOFP16-NEXT: ret
416 ;
417 ; CHECK-SD-FP16-LABEL: fptos_f16_i16:
418 ; CHECK-SD-FP16: // %bb.0: // %entry
419 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
420 ; CHECK-SD-FP16-NEXT: ret
421 ;
422 ; CHECK-GI-LABEL: fptos_f16_i16:
423 ; CHECK-GI: // %bb.0: // %entry
424 ; CHECK-GI-NEXT: fcvt s0, h0
425 ; CHECK-GI-NEXT: fcvtzs w0, s0
426 ; CHECK-GI-NEXT: ret
427 entry:
428 %c = fptosi half %a to i16
429 ret i16 %c
430 }
432 define i16 @fptou_f16_i16(half %a) {
433 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i16:
434 ; CHECK-SD-NOFP16: // %bb.0: // %entry
435 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
436 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
437 ; CHECK-SD-NOFP16-NEXT: ret
438 ;
439 ; CHECK-SD-FP16-LABEL: fptou_f16_i16:
440 ; CHECK-SD-FP16: // %bb.0: // %entry
441 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
442 ; CHECK-SD-FP16-NEXT: ret
443 ;
444 ; CHECK-GI-LABEL: fptou_f16_i16:
445 ; CHECK-GI: // %bb.0: // %entry
446 ; CHECK-GI-NEXT: fcvt s0, h0
447 ; CHECK-GI-NEXT: fcvtzu w0, s0
448 ; CHECK-GI-NEXT: ret
449 entry:
450 %c = fptoui half %a to i16
451 ret i16 %c
452 }
454 define i8 @fptos_f16_i8(half %a) {
455 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i8:
456 ; CHECK-SD-NOFP16: // %bb.0: // %entry
457 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
458 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
459 ; CHECK-SD-NOFP16-NEXT: ret
460 ;
461 ; CHECK-SD-FP16-LABEL: fptos_f16_i8:
462 ; CHECK-SD-FP16: // %bb.0: // %entry
463 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
464 ; CHECK-SD-FP16-NEXT: ret
465 ;
466 ; CHECK-GI-LABEL: fptos_f16_i8:
467 ; CHECK-GI: // %bb.0: // %entry
468 ; CHECK-GI-NEXT: fcvt s0, h0
469 ; CHECK-GI-NEXT: fcvtzs w0, s0
470 ; CHECK-GI-NEXT: ret
471 entry:
472 %c = fptosi half %a to i8
473 ret i8 %c
474 }
476 define i8 @fptou_f16_i8(half %a) {
477 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i8:
478 ; CHECK-SD-NOFP16: // %bb.0: // %entry
479 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
480 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
481 ; CHECK-SD-NOFP16-NEXT: ret
482 ;
483 ; CHECK-SD-FP16-LABEL: fptou_f16_i8:
484 ; CHECK-SD-FP16: // %bb.0: // %entry
485 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
486 ; CHECK-SD-FP16-NEXT: ret
487 ;
488 ; CHECK-GI-LABEL: fptou_f16_i8:
489 ; CHECK-GI: // %bb.0: // %entry
490 ; CHECK-GI-NEXT: fcvt s0, h0
491 ; CHECK-GI-NEXT: fcvtzu w0, s0
492 ; CHECK-GI-NEXT: ret
493 entry:
494 %c = fptoui half %a to i8
495 ret i8 %c
496 }
498 define <2 x i64> @fptos_v2f64_v2i64(<2 x double> %a) {
499 ; CHECK-LABEL: fptos_v2f64_v2i64:
500 ; CHECK: // %bb.0: // %entry
501 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
502 ; CHECK-NEXT: ret
503 entry:
504 %c = fptosi <2 x double> %a to <2 x i64>
505 ret <2 x i64> %c
506 }
508 define <2 x i64> @fptou_v2f64_v2i64(<2 x double> %a) {
509 ; CHECK-LABEL: fptou_v2f64_v2i64:
510 ; CHECK: // %bb.0: // %entry
511 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
512 ; CHECK-NEXT: ret
513 entry:
514 %c = fptoui <2 x double> %a to <2 x i64>
515 ret <2 x i64> %c
516 }
518 define <3 x i64> @fptos_v3f64_v3i64(<3 x double> %a) {
519 ; CHECK-LABEL: fptos_v3f64_v3i64:
520 ; CHECK: // %bb.0: // %entry
521 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
522 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
523 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
524 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
525 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
526 ; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
527 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
528 ; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
529 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
530 ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
531 ; CHECK-NEXT: ret
532 entry:
533 %c = fptosi <3 x double> %a to <3 x i64>
534 ret <3 x i64> %c
535 }
537 define <3 x i64> @fptou_v3f64_v3i64(<3 x double> %a) {
538 ; CHECK-LABEL: fptou_v3f64_v3i64:
539 ; CHECK: // %bb.0: // %entry
540 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
541 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
542 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
543 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
544 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
545 ; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
546 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
547 ; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
548 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
549 ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
550 ; CHECK-NEXT: ret
551 entry:
552 %c = fptoui <3 x double> %a to <3 x i64>
553 ret <3 x i64> %c
554 }
556 define <4 x i64> @fptos_v4f64_v4i64(<4 x double> %a) {
557 ; CHECK-LABEL: fptos_v4f64_v4i64:
558 ; CHECK: // %bb.0: // %entry
559 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
560 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
561 ; CHECK-NEXT: ret
562 entry:
563 %c = fptosi <4 x double> %a to <4 x i64>
564 ret <4 x i64> %c
565 }
567 define <4 x i64> @fptou_v4f64_v4i64(<4 x double> %a) {
568 ; CHECK-LABEL: fptou_v4f64_v4i64:
569 ; CHECK: // %bb.0: // %entry
570 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
571 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
572 ; CHECK-NEXT: ret
573 entry:
574 %c = fptoui <4 x double> %a to <4 x i64>
575 ret <4 x i64> %c
576 }
578 define <8 x i64> @fptos_v8f64_v8i64(<8 x double> %a) {
579 ; CHECK-LABEL: fptos_v8f64_v8i64:
580 ; CHECK: // %bb.0: // %entry
581 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
582 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
583 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
584 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
585 ; CHECK-NEXT: ret
586 entry:
587 %c = fptosi <8 x double> %a to <8 x i64>
588 ret <8 x i64> %c
589 }
591 define <8 x i64> @fptou_v8f64_v8i64(<8 x double> %a) {
592 ; CHECK-LABEL: fptou_v8f64_v8i64:
593 ; CHECK: // %bb.0: // %entry
594 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
595 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
596 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
597 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
598 ; CHECK-NEXT: ret
599 entry:
600 %c = fptoui <8 x double> %a to <8 x i64>
601 ret <8 x i64> %c
602 }
604 define <16 x i64> @fptos_v16f64_v16i64(<16 x double> %a) {
605 ; CHECK-LABEL: fptos_v16f64_v16i64:
606 ; CHECK: // %bb.0: // %entry
607 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
608 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
609 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
610 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
611 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
612 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
613 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
614 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
615 ; CHECK-NEXT: ret
616 entry:
617 %c = fptosi <16 x double> %a to <16 x i64>
618 ret <16 x i64> %c
619 }
621 define <16 x i64> @fptou_v16f64_v16i64(<16 x double> %a) {
622 ; CHECK-LABEL: fptou_v16f64_v16i64:
623 ; CHECK: // %bb.0: // %entry
624 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
625 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
626 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
627 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
628 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
629 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
630 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
631 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
632 ; CHECK-NEXT: ret
633 entry:
634 %c = fptoui <16 x double> %a to <16 x i64>
635 ret <16 x i64> %c
636 }
638 define <32 x i64> @fptos_v32f64_v32i64(<32 x double> %a) {
639 ; CHECK-LABEL: fptos_v32f64_v32i64:
640 ; CHECK: // %bb.0: // %entry
641 ; CHECK-NEXT: ldp q17, q16, [sp, #96]
642 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
643 ; CHECK-NEXT: ldp q19, q18, [sp, #64]
644 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
645 ; CHECK-NEXT: ldp q21, q20, [sp, #32]
646 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
647 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
648 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
649 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
650 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
651 ; CHECK-NEXT: fcvtzs v19.2d, v19.2d
652 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
653 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
654 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
655 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
656 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
657 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
658 ; CHECK-NEXT: stp q5, q6, [x8, #80]
659 ; CHECK-NEXT: str q16, [x8, #240]
660 ; CHECK-NEXT: ldp q22, q16, [sp]
661 ; CHECK-NEXT: stp q3, q4, [x8, #48]
662 ; CHECK-NEXT: stp q20, q19, [x8, #176]
663 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
664 ; CHECK-NEXT: stp q1, q2, [x8, #16]
665 ; CHECK-NEXT: stp q18, q17, [x8, #208]
666 ; CHECK-NEXT: fcvtzs v17.2d, v22.2d
667 ; CHECK-NEXT: str q0, [x8]
668 ; CHECK-NEXT: stp q16, q21, [x8, #144]
669 ; CHECK-NEXT: stp q7, q17, [x8, #112]
670 ; CHECK-NEXT: ret
671 entry:
672 %c = fptosi <32 x double> %a to <32 x i64>
673 ret <32 x i64> %c
674 }
676 define <32 x i64> @fptou_v32f64_v32i64(<32 x double> %a) {
677 ; CHECK-LABEL: fptou_v32f64_v32i64:
678 ; CHECK: // %bb.0: // %entry
679 ; CHECK-NEXT: ldp q17, q16, [sp, #96]
680 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
681 ; CHECK-NEXT: ldp q19, q18, [sp, #64]
682 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
683 ; CHECK-NEXT: ldp q21, q20, [sp, #32]
684 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
685 ; CHECK-NEXT: fcvtzu v16.2d, v16.2d
686 ; CHECK-NEXT: fcvtzu v17.2d, v17.2d
687 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
688 ; CHECK-NEXT: fcvtzu v18.2d, v18.2d
689 ; CHECK-NEXT: fcvtzu v19.2d, v19.2d
690 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
691 ; CHECK-NEXT: fcvtzu v20.2d, v20.2d
692 ; CHECK-NEXT: fcvtzu v21.2d, v21.2d
693 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
694 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
695 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
696 ; CHECK-NEXT: stp q5, q6, [x8, #80]
697 ; CHECK-NEXT: str q16, [x8, #240]
698 ; CHECK-NEXT: ldp q22, q16, [sp]
699 ; CHECK-NEXT: stp q3, q4, [x8, #48]
700 ; CHECK-NEXT: stp q20, q19, [x8, #176]
701 ; CHECK-NEXT: fcvtzu v16.2d, v16.2d
702 ; CHECK-NEXT: stp q1, q2, [x8, #16]
703 ; CHECK-NEXT: stp q18, q17, [x8, #208]
704 ; CHECK-NEXT: fcvtzu v17.2d, v22.2d
705 ; CHECK-NEXT: str q0, [x8]
706 ; CHECK-NEXT: stp q16, q21, [x8, #144]
707 ; CHECK-NEXT: stp q7, q17, [x8, #112]
708 ; CHECK-NEXT: ret
709 entry:
710 %c = fptoui <32 x double> %a to <32 x i64>
711 ret <32 x i64> %c
712 }
714 define <2 x i32> @fptos_v2f64_v2i32(<2 x double> %a) {
715 ; CHECK-LABEL: fptos_v2f64_v2i32:
716 ; CHECK: // %bb.0: // %entry
717 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
718 ; CHECK-NEXT: xtn v0.2s, v0.2d
719 ; CHECK-NEXT: ret
720 entry:
721 %c = fptosi <2 x double> %a to <2 x i32>
722 ret <2 x i32> %c
723 }
725 define <2 x i32> @fptou_v2f64_v2i32(<2 x double> %a) {
726 ; CHECK-LABEL: fptou_v2f64_v2i32:
727 ; CHECK: // %bb.0: // %entry
728 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
729 ; CHECK-NEXT: xtn v0.2s, v0.2d
730 ; CHECK-NEXT: ret
731 entry:
732 %c = fptoui <2 x double> %a to <2 x i32>
733 ret <2 x i32> %c
734 }
736 define <3 x i32> @fptos_v3f64_v3i32(<3 x double> %a) {
737 ; CHECK-LABEL: fptos_v3f64_v3i32:
738 ; CHECK: // %bb.0: // %entry
739 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
740 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
741 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
742 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
743 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
744 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
745 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
746 ; CHECK-NEXT: ret
747 entry:
748 %c = fptosi <3 x double> %a to <3 x i32>
749 ret <3 x i32> %c
750 }
752 define <3 x i32> @fptou_v3f64_v3i32(<3 x double> %a) {
753 ; CHECK-LABEL: fptou_v3f64_v3i32:
754 ; CHECK: // %bb.0: // %entry
755 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
756 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
757 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
758 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
759 ; CHECK-NEXT: fcvtzu v1.2d, v2.2d
760 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
761 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
762 ; CHECK-NEXT: ret
763 entry:
764 %c = fptoui <3 x double> %a to <3 x i32>
765 ret <3 x i32> %c
766 }
768 define <4 x i32> @fptos_v4f64_v4i32(<4 x double> %a) {
769 ; CHECK-LABEL: fptos_v4f64_v4i32:
770 ; CHECK: // %bb.0: // %entry
771 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
772 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
773 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
774 ; CHECK-NEXT: ret
775 entry:
776 %c = fptosi <4 x double> %a to <4 x i32>
777 ret <4 x i32> %c
778 }
780 define <4 x i32> @fptou_v4f64_v4i32(<4 x double> %a) {
781 ; CHECK-LABEL: fptou_v4f64_v4i32:
782 ; CHECK: // %bb.0: // %entry
783 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
784 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
785 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
786 ; CHECK-NEXT: ret
787 entry:
788 %c = fptoui <4 x double> %a to <4 x i32>
789 ret <4 x i32> %c
790 }
792 define <8 x i32> @fptos_v8f64_v8i32(<8 x double> %a) {
793 ; CHECK-LABEL: fptos_v8f64_v8i32:
794 ; CHECK: // %bb.0: // %entry
795 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
796 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
797 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
798 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
799 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
800 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
801 ; CHECK-NEXT: ret
802 entry:
803 %c = fptosi <8 x double> %a to <8 x i32>
804 ret <8 x i32> %c
805 }
807 define <8 x i32> @fptou_v8f64_v8i32(<8 x double> %a) {
808 ; CHECK-LABEL: fptou_v8f64_v8i32:
809 ; CHECK: // %bb.0: // %entry
810 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
811 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
812 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
813 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
814 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
815 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
816 ; CHECK-NEXT: ret
817 entry:
818 %c = fptoui <8 x double> %a to <8 x i32>
819 ret <8 x i32> %c
820 }
822 define <16 x i32> @fptos_v16f64_v16i32(<16 x double> %a) {
823 ; CHECK-LABEL: fptos_v16f64_v16i32:
824 ; CHECK: // %bb.0: // %entry
825 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
826 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
827 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
828 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
829 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
830 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
831 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
832 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
833 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
834 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
835 ; CHECK-NEXT: uzp1 v2.4s, v4.4s, v5.4s
836 ; CHECK-NEXT: uzp1 v3.4s, v6.4s, v7.4s
837 ; CHECK-NEXT: ret
838 entry:
839 %c = fptosi <16 x double> %a to <16 x i32>
840 ret <16 x i32> %c
841 }
843 define <16 x i32> @fptou_v16f64_v16i32(<16 x double> %a) {
844 ; CHECK-LABEL: fptou_v16f64_v16i32:
845 ; CHECK: // %bb.0: // %entry
846 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
847 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
848 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
849 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
850 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
851 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
852 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
853 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
854 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
855 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
856 ; CHECK-NEXT: uzp1 v2.4s, v4.4s, v5.4s
857 ; CHECK-NEXT: uzp1 v3.4s, v6.4s, v7.4s
858 ; CHECK-NEXT: ret
859 entry:
860 %c = fptoui <16 x double> %a to <16 x i32>
861 ret <16 x i32> %c
862 }
864 define <32 x i32> @fptos_v32f64_v32i32(<32 x double> %a) {
865 ; CHECK-LABEL: fptos_v32f64_v32i32:
866 ; CHECK: // %bb.0: // %entry
867 ; CHECK-NEXT: ldp q16, q17, [sp, #96]
868 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
869 ; CHECK-NEXT: ldp q18, q19, [sp, #64]
870 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
871 ; CHECK-NEXT: ldp q20, q21, [sp, #32]
872 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
873 ; CHECK-NEXT: ldp q22, q23, [sp]
874 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
875 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
876 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
877 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
878 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
879 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
880 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
881 ; CHECK-NEXT: fcvtzs v23.2d, v23.2d
882 ; CHECK-NEXT: fcvtzs v22.2d, v22.2d
883 ; CHECK-NEXT: fcvtzs v19.2d, v19.2d
884 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
885 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
886 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
887 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
888 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
889 ; CHECK-NEXT: uzp1 v2.4s, v4.4s, v5.4s
890 ; CHECK-NEXT: uzp1 v3.4s, v6.4s, v7.4s
891 ; CHECK-NEXT: uzp1 v5.4s, v20.4s, v21.4s
892 ; CHECK-NEXT: uzp1 v4.4s, v22.4s, v23.4s
893 ; CHECK-NEXT: uzp1 v6.4s, v18.4s, v19.4s
894 ; CHECK-NEXT: uzp1 v7.4s, v16.4s, v17.4s
895 ; CHECK-NEXT: ret
896 entry:
897 %c = fptosi <32 x double> %a to <32 x i32>
898 ret <32 x i32> %c
899 }
901 define <32 x i32> @fptou_v32f64_v32i32(<32 x double> %a) {
902 ; CHECK-LABEL: fptou_v32f64_v32i32:
903 ; CHECK: // %bb.0: // %entry
904 ; CHECK-NEXT: ldp q16, q17, [sp, #96]
905 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
906 ; CHECK-NEXT: ldp q18, q19, [sp, #64]
907 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
908 ; CHECK-NEXT: ldp q20, q21, [sp, #32]
909 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
910 ; CHECK-NEXT: ldp q22, q23, [sp]
911 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
912 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
913 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
914 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
915 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
916 ; CHECK-NEXT: fcvtzu v21.2d, v21.2d
917 ; CHECK-NEXT: fcvtzu v20.2d, v20.2d
918 ; CHECK-NEXT: fcvtzu v23.2d, v23.2d
919 ; CHECK-NEXT: fcvtzu v22.2d, v22.2d
920 ; CHECK-NEXT: fcvtzu v19.2d, v19.2d
921 ; CHECK-NEXT: fcvtzu v18.2d, v18.2d
922 ; CHECK-NEXT: fcvtzu v17.2d, v17.2d
923 ; CHECK-NEXT: fcvtzu v16.2d, v16.2d
924 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
925 ; CHECK-NEXT: uzp1 v1.4s, v2.4s, v3.4s
926 ; CHECK-NEXT: uzp1 v2.4s, v4.4s, v5.4s
927 ; CHECK-NEXT: uzp1 v3.4s, v6.4s, v7.4s
928 ; CHECK-NEXT: uzp1 v5.4s, v20.4s, v21.4s
929 ; CHECK-NEXT: uzp1 v4.4s, v22.4s, v23.4s
930 ; CHECK-NEXT: uzp1 v6.4s, v18.4s, v19.4s
931 ; CHECK-NEXT: uzp1 v7.4s, v16.4s, v17.4s
932 ; CHECK-NEXT: ret
933 entry:
934 %c = fptoui <32 x double> %a to <32 x i32>
935 ret <32 x i32> %c
936 }
938 define <2 x i16> @fptos_v2f64_v2i16(<2 x double> %a) {
939 ; CHECK-LABEL: fptos_v2f64_v2i16:
940 ; CHECK: // %bb.0: // %entry
941 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
942 ; CHECK-NEXT: xtn v0.2s, v0.2d
943 ; CHECK-NEXT: ret
944 entry:
945 %c = fptosi <2 x double> %a to <2 x i16>
946 ret <2 x i16> %c
947 }
949 define <2 x i16> @fptou_v2f64_v2i16(<2 x double> %a) {
950 ; CHECK-LABEL: fptou_v2f64_v2i16:
951 ; CHECK: // %bb.0: // %entry
952 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
953 ; CHECK-NEXT: xtn v0.2s, v0.2d
954 ; CHECK-NEXT: ret
955 entry:
956 %c = fptoui <2 x double> %a to <2 x i16>
957 ret <2 x i16> %c
958 }
960 define <3 x i16> @fptos_v3f64_v3i16(<3 x double> %a) {
961 ; CHECK-LABEL: fptos_v3f64_v3i16:
962 ; CHECK: // %bb.0: // %entry
963 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
964 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
965 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
966 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
967 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
968 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
969 ; CHECK-NEXT: xtn v1.2s, v1.2d
970 ; CHECK-NEXT: xtn v0.2s, v0.2d
971 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
972 ; CHECK-NEXT: ret
973 entry:
974 %c = fptosi <3 x double> %a to <3 x i16>
975 ret <3 x i16> %c
976 }
978 define <3 x i16> @fptou_v3f64_v3i16(<3 x double> %a) {
979 ; CHECK-LABEL: fptou_v3f64_v3i16:
980 ; CHECK: // %bb.0: // %entry
981 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
982 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
983 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
984 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
985 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
986 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
987 ; CHECK-NEXT: xtn v1.2s, v1.2d
988 ; CHECK-NEXT: xtn v0.2s, v0.2d
989 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
990 ; CHECK-NEXT: ret
991 entry:
992 %c = fptoui <3 x double> %a to <3 x i16>
993 ret <3 x i16> %c
994 }
996 define <4 x i16> @fptos_v4f64_v4i16(<4 x double> %a) {
997 ; CHECK-LABEL: fptos_v4f64_v4i16:
998 ; CHECK: // %bb.0: // %entry
999 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1000 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1001 ; CHECK-NEXT: xtn v1.2s, v1.2d
1002 ; CHECK-NEXT: xtn v0.2s, v0.2d
1003 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1004 ; CHECK-NEXT: ret
1005 entry:
1006 %c = fptosi <4 x double> %a to <4 x i16>
1007 ret <4 x i16> %c
1008 }
1010 define <4 x i16> @fptou_v4f64_v4i16(<4 x double> %a) {
1011 ; CHECK-LABEL: fptou_v4f64_v4i16:
1012 ; CHECK: // %bb.0: // %entry
1013 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1014 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1015 ; CHECK-NEXT: xtn v1.2s, v1.2d
1016 ; CHECK-NEXT: xtn v0.2s, v0.2d
1017 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1018 ; CHECK-NEXT: ret
1019 entry:
1020 %c = fptoui <4 x double> %a to <4 x i16>
1021 ret <4 x i16> %c
1022 }
1024 define <8 x i16> @fptos_v8f64_v8i16(<8 x double> %a) {
1025 ; CHECK-LABEL: fptos_v8f64_v8i16:
1026 ; CHECK: // %bb.0: // %entry
1027 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1028 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1029 ; CHECK-NEXT: adrp x8, .LCPI54_0
1030 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1031 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1032 ; CHECK-NEXT: xtn v6.2s, v3.2d
1033 ; CHECK-NEXT: xtn v5.2s, v2.2d
1034 ; CHECK-NEXT: xtn v4.2s, v1.2d
1035 ; CHECK-NEXT: xtn v3.2s, v0.2d
1036 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI54_0]
1037 ; CHECK-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1038 ; CHECK-NEXT: ret
1039 entry:
1040 %c = fptosi <8 x double> %a to <8 x i16>
1041 ret <8 x i16> %c
1042 }
1044 define <8 x i16> @fptou_v8f64_v8i16(<8 x double> %a) {
1045 ; CHECK-LABEL: fptou_v8f64_v8i16:
1046 ; CHECK: // %bb.0: // %entry
1047 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1048 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1049 ; CHECK-NEXT: adrp x8, .LCPI55_0
1050 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1051 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1052 ; CHECK-NEXT: xtn v6.2s, v3.2d
1053 ; CHECK-NEXT: xtn v5.2s, v2.2d
1054 ; CHECK-NEXT: xtn v4.2s, v1.2d
1055 ; CHECK-NEXT: xtn v3.2s, v0.2d
1056 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI55_0]
1057 ; CHECK-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1058 ; CHECK-NEXT: ret
1059 entry:
1060 %c = fptoui <8 x double> %a to <8 x i16>
1061 ret <8 x i16> %c
1062 }
1064 define <16 x i16> @fptos_v16f64_v16i16(<16 x double> %a) {
1065 ; CHECK-LABEL: fptos_v16f64_v16i16:
1066 ; CHECK: // %bb.0: // %entry
1067 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1068 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1069 ; CHECK-NEXT: adrp x8, .LCPI56_0
1070 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1071 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1072 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1073 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1074 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1075 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1076 ; CHECK-NEXT: xtn v19.2s, v3.2d
1077 ; CHECK-NEXT: xtn v23.2s, v7.2d
1078 ; CHECK-NEXT: xtn v18.2s, v2.2d
1079 ; CHECK-NEXT: xtn v22.2s, v6.2d
1080 ; CHECK-NEXT: xtn v17.2s, v1.2d
1081 ; CHECK-NEXT: xtn v21.2s, v5.2d
1082 ; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI56_0]
1083 ; CHECK-NEXT: xtn v16.2s, v0.2d
1084 ; CHECK-NEXT: xtn v20.2s, v4.2d
1085 ; CHECK-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1086 ; CHECK-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1087 ; CHECK-NEXT: ret
1088 entry:
1089 %c = fptosi <16 x double> %a to <16 x i16>
1090 ret <16 x i16> %c
1091 }
1093 define <16 x i16> @fptou_v16f64_v16i16(<16 x double> %a) {
1094 ; CHECK-LABEL: fptou_v16f64_v16i16:
1095 ; CHECK: // %bb.0: // %entry
1096 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1097 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1098 ; CHECK-NEXT: adrp x8, .LCPI57_0
1099 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1100 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1101 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1102 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1103 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1104 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1105 ; CHECK-NEXT: xtn v19.2s, v3.2d
1106 ; CHECK-NEXT: xtn v23.2s, v7.2d
1107 ; CHECK-NEXT: xtn v18.2s, v2.2d
1108 ; CHECK-NEXT: xtn v22.2s, v6.2d
1109 ; CHECK-NEXT: xtn v17.2s, v1.2d
1110 ; CHECK-NEXT: xtn v21.2s, v5.2d
1111 ; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI57_0]
1112 ; CHECK-NEXT: xtn v16.2s, v0.2d
1113 ; CHECK-NEXT: xtn v20.2s, v4.2d
1114 ; CHECK-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1115 ; CHECK-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1116 ; CHECK-NEXT: ret
1117 entry:
1118 %c = fptoui <16 x double> %a to <16 x i16>
1119 ret <16 x i16> %c
1120 }
1122 define <32 x i16> @fptos_v32f64_v32i16(<32 x double> %a) {
1123 ; CHECK-LABEL: fptos_v32f64_v32i16:
1124 ; CHECK: // %bb.0: // %entry
1125 ; CHECK-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1126 ; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1127 ; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1128 ; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1129 ; CHECK-NEXT: .cfi_def_cfa_offset 64
1130 ; CHECK-NEXT: .cfi_offset b8, -8
1131 ; CHECK-NEXT: .cfi_offset b9, -16
1132 ; CHECK-NEXT: .cfi_offset b10, -24
1133 ; CHECK-NEXT: .cfi_offset b11, -32
1134 ; CHECK-NEXT: .cfi_offset b12, -40
1135 ; CHECK-NEXT: .cfi_offset b13, -48
1136 ; CHECK-NEXT: .cfi_offset b14, -56
1137 ; CHECK-NEXT: .cfi_offset b15, -64
1138 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1139 ; CHECK-NEXT: fcvtzs v18.2d, v2.2d
1140 ; CHECK-NEXT: adrp x8, .LCPI58_0
1141 ; CHECK-NEXT: fcvtzs v19.2d, v1.2d
1142 ; CHECK-NEXT: ldp q20, q21, [sp, #160]
1143 ; CHECK-NEXT: fcvtzs v22.2d, v0.2d
1144 ; CHECK-NEXT: ldp q23, q24, [sp, #96]
1145 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1146 ; CHECK-NEXT: ldp q16, q17, [sp, #128]
1147 ; CHECK-NEXT: xtn v3.2s, v3.2d
1148 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
1149 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
1150 ; CHECK-NEXT: xtn v2.2s, v18.2d
1151 ; CHECK-NEXT: ldp q18, q25, [sp, #64]
1152 ; CHECK-NEXT: xtn v1.2s, v19.2d
1153 ; CHECK-NEXT: fcvtzs v19.2d, v24.2d
1154 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
1155 ; CHECK-NEXT: xtn v0.2s, v22.2d
1156 ; CHECK-NEXT: fcvtzs v22.2d, v23.2d
1157 ; CHECK-NEXT: xtn v29.2s, v7.2d
1158 ; CHECK-NEXT: fcvtzs v7.2d, v25.2d
1159 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1160 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
1161 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
1162 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1163 ; CHECK-NEXT: xtn v15.2s, v21.2d
1164 ; CHECK-NEXT: xtn v11.2s, v19.2d
1165 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1166 ; CHECK-NEXT: xtn v14.2s, v20.2d
1167 ; CHECK-NEXT: xtn v10.2s, v22.2d
1168 ; CHECK-NEXT: xtn v13.2s, v17.2d
1169 ; CHECK-NEXT: xtn v9.2s, v7.2d
1170 ; CHECK-NEXT: xtn v28.2s, v6.2d
1171 ; CHECK-NEXT: xtn v8.2s, v18.2d
1172 ; CHECK-NEXT: xtn v12.2s, v16.2d
1173 ; CHECK-NEXT: xtn v27.2s, v5.2d
1174 ; CHECK-NEXT: xtn v26.2s, v4.2d
1175 ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI58_0]
1176 ; CHECK-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1177 ; CHECK-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1178 ; CHECK-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1179 ; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1180 ; CHECK-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1181 ; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1182 ; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1183 ; CHECK-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1184 ; CHECK-NEXT: ret
1185 entry:
1186 %c = fptosi <32 x double> %a to <32 x i16>
1187 ret <32 x i16> %c
1188 }
1190 define <32 x i16> @fptou_v32f64_v32i16(<32 x double> %a) {
1191 ; CHECK-LABEL: fptou_v32f64_v32i16:
1192 ; CHECK: // %bb.0: // %entry
1193 ; CHECK-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1194 ; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1195 ; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1196 ; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1197 ; CHECK-NEXT: .cfi_def_cfa_offset 64
1198 ; CHECK-NEXT: .cfi_offset b8, -8
1199 ; CHECK-NEXT: .cfi_offset b9, -16
1200 ; CHECK-NEXT: .cfi_offset b10, -24
1201 ; CHECK-NEXT: .cfi_offset b11, -32
1202 ; CHECK-NEXT: .cfi_offset b12, -40
1203 ; CHECK-NEXT: .cfi_offset b13, -48
1204 ; CHECK-NEXT: .cfi_offset b14, -56
1205 ; CHECK-NEXT: .cfi_offset b15, -64
1206 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1207 ; CHECK-NEXT: fcvtzs v18.2d, v2.2d
1208 ; CHECK-NEXT: adrp x8, .LCPI59_0
1209 ; CHECK-NEXT: fcvtzs v19.2d, v1.2d
1210 ; CHECK-NEXT: ldp q20, q21, [sp, #160]
1211 ; CHECK-NEXT: fcvtzs v22.2d, v0.2d
1212 ; CHECK-NEXT: ldp q23, q24, [sp, #96]
1213 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1214 ; CHECK-NEXT: ldp q16, q17, [sp, #128]
1215 ; CHECK-NEXT: xtn v3.2s, v3.2d
1216 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
1217 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
1218 ; CHECK-NEXT: xtn v2.2s, v18.2d
1219 ; CHECK-NEXT: ldp q18, q25, [sp, #64]
1220 ; CHECK-NEXT: xtn v1.2s, v19.2d
1221 ; CHECK-NEXT: fcvtzs v19.2d, v24.2d
1222 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
1223 ; CHECK-NEXT: xtn v0.2s, v22.2d
1224 ; CHECK-NEXT: fcvtzs v22.2d, v23.2d
1225 ; CHECK-NEXT: xtn v29.2s, v7.2d
1226 ; CHECK-NEXT: fcvtzs v7.2d, v25.2d
1227 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1228 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
1229 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
1230 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1231 ; CHECK-NEXT: xtn v15.2s, v21.2d
1232 ; CHECK-NEXT: xtn v11.2s, v19.2d
1233 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1234 ; CHECK-NEXT: xtn v14.2s, v20.2d
1235 ; CHECK-NEXT: xtn v10.2s, v22.2d
1236 ; CHECK-NEXT: xtn v13.2s, v17.2d
1237 ; CHECK-NEXT: xtn v9.2s, v7.2d
1238 ; CHECK-NEXT: xtn v28.2s, v6.2d
1239 ; CHECK-NEXT: xtn v8.2s, v18.2d
1240 ; CHECK-NEXT: xtn v12.2s, v16.2d
1241 ; CHECK-NEXT: xtn v27.2s, v5.2d
1242 ; CHECK-NEXT: xtn v26.2s, v4.2d
1243 ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI59_0]
1244 ; CHECK-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1245 ; CHECK-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1246 ; CHECK-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1247 ; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1248 ; CHECK-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1249 ; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1250 ; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1251 ; CHECK-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1252 ; CHECK-NEXT: ret
1253 entry:
1254 %c = fptoui <32 x double> %a to <32 x i16>
1255 ret <32 x i16> %c
1256 }
1258 define <2 x i8> @fptos_v2f64_v2i8(<2 x double> %a) {
1259 ; CHECK-LABEL: fptos_v2f64_v2i8:
1260 ; CHECK: // %bb.0: // %entry
1261 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1262 ; CHECK-NEXT: xtn v0.2s, v0.2d
1263 ; CHECK-NEXT: ret
1264 entry:
1265 %c = fptosi <2 x double> %a to <2 x i8>
1266 ret <2 x i8> %c
1267 }
1269 define <2 x i8> @fptou_v2f64_v2i8(<2 x double> %a) {
1270 ; CHECK-LABEL: fptou_v2f64_v2i8:
1271 ; CHECK: // %bb.0: // %entry
1272 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1273 ; CHECK-NEXT: xtn v0.2s, v0.2d
1274 ; CHECK-NEXT: ret
1275 entry:
1276 %c = fptoui <2 x double> %a to <2 x i8>
1277 ret <2 x i8> %c
1278 }
1280 define <3 x i8> @fptos_v3f64_v3i8(<3 x double> %a) {
1281 ; CHECK-LABEL: fptos_v3f64_v3i8:
1282 ; CHECK: // %bb.0: // %entry
1283 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1284 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1285 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1286 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1287 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1288 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1289 ; CHECK-NEXT: xtn v1.2s, v1.2d
1290 ; CHECK-NEXT: xtn v0.2s, v0.2d
1291 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1292 ; CHECK-NEXT: umov w0, v0.h[0]
1293 ; CHECK-NEXT: umov w1, v0.h[1]
1294 ; CHECK-NEXT: umov w2, v0.h[2]
1295 ; CHECK-NEXT: ret
1296 entry:
1297 %c = fptosi <3 x double> %a to <3 x i8>
1298 ret <3 x i8> %c
1299 }
1301 define <3 x i8> @fptou_v3f64_v3i8(<3 x double> %a) {
1302 ; CHECK-LABEL: fptou_v3f64_v3i8:
1303 ; CHECK: // %bb.0: // %entry
1304 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1305 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1306 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1307 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1308 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1309 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1310 ; CHECK-NEXT: xtn v1.2s, v1.2d
1311 ; CHECK-NEXT: xtn v0.2s, v0.2d
1312 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1313 ; CHECK-NEXT: umov w0, v0.h[0]
1314 ; CHECK-NEXT: umov w1, v0.h[1]
1315 ; CHECK-NEXT: umov w2, v0.h[2]
1316 ; CHECK-NEXT: ret
1317 entry:
1318 %c = fptoui <3 x double> %a to <3 x i8>
1319 ret <3 x i8> %c
1320 }
1322 define <4 x i8> @fptos_v4f64_v4i8(<4 x double> %a) {
1323 ; CHECK-LABEL: fptos_v4f64_v4i8:
1324 ; CHECK: // %bb.0: // %entry
1325 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1326 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1327 ; CHECK-NEXT: xtn v1.2s, v1.2d
1328 ; CHECK-NEXT: xtn v0.2s, v0.2d
1329 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1330 ; CHECK-NEXT: ret
1331 entry:
1332 %c = fptosi <4 x double> %a to <4 x i8>
1333 ret <4 x i8> %c
1334 }
1336 define <4 x i8> @fptou_v4f64_v4i8(<4 x double> %a) {
1337 ; CHECK-LABEL: fptou_v4f64_v4i8:
1338 ; CHECK: // %bb.0: // %entry
1339 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1340 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1341 ; CHECK-NEXT: xtn v1.2s, v1.2d
1342 ; CHECK-NEXT: xtn v0.2s, v0.2d
1343 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1344 ; CHECK-NEXT: ret
1345 entry:
1346 %c = fptoui <4 x double> %a to <4 x i8>
1347 ret <4 x i8> %c
1348 }
1350 define <8 x i8> @fptos_v8f64_v8i8(<8 x double> %a) {
1351 ; CHECK-LABEL: fptos_v8f64_v8i8:
1352 ; CHECK: // %bb.0: // %entry
1353 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1354 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1355 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1356 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1357 ; CHECK-NEXT: xtn v3.2s, v3.2d
1358 ; CHECK-NEXT: xtn v2.2s, v2.2d
1359 ; CHECK-NEXT: xtn v1.2s, v1.2d
1360 ; CHECK-NEXT: xtn v0.2s, v0.2d
1361 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1362 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1363 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v2.8b
1364 ; CHECK-NEXT: ret
1365 entry:
1366 %c = fptosi <8 x double> %a to <8 x i8>
1367 ret <8 x i8> %c
1368 }
1370 define <8 x i8> @fptou_v8f64_v8i8(<8 x double> %a) {
1371 ; CHECK-LABEL: fptou_v8f64_v8i8:
1372 ; CHECK: // %bb.0: // %entry
1373 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1374 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1375 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1376 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1377 ; CHECK-NEXT: xtn v3.2s, v3.2d
1378 ; CHECK-NEXT: xtn v2.2s, v2.2d
1379 ; CHECK-NEXT: xtn v1.2s, v1.2d
1380 ; CHECK-NEXT: xtn v0.2s, v0.2d
1381 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1382 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1383 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v2.8b
1384 ; CHECK-NEXT: ret
1385 entry:
1386 %c = fptoui <8 x double> %a to <8 x i8>
1387 ret <8 x i8> %c
1388 }
1390 define <16 x i8> @fptos_v16f64_v16i8(<16 x double> %a) {
1391 ; CHECK-LABEL: fptos_v16f64_v16i8:
1392 ; CHECK: // %bb.0: // %entry
1393 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1394 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1395 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1396 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1397 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1398 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1399 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1400 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1401 ; CHECK-NEXT: xtn v7.2s, v7.2d
1402 ; CHECK-NEXT: xtn v6.2s, v6.2d
1403 ; CHECK-NEXT: xtn v5.2s, v5.2d
1404 ; CHECK-NEXT: xtn v4.2s, v4.2d
1405 ; CHECK-NEXT: xtn v3.2s, v3.2d
1406 ; CHECK-NEXT: xtn v2.2s, v2.2d
1407 ; CHECK-NEXT: xtn v1.2s, v1.2d
1408 ; CHECK-NEXT: xtn v0.2s, v0.2d
1409 ; CHECK-NEXT: uzp1 v6.4h, v6.4h, v7.4h
1410 ; CHECK-NEXT: uzp1 v4.4h, v4.4h, v5.4h
1411 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1412 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1413 ; CHECK-NEXT: mov v4.d[1], v6.d[0]
1414 ; CHECK-NEXT: mov v0.d[1], v2.d[0]
1415 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v4.16b
1416 ; CHECK-NEXT: ret
1417 entry:
1418 %c = fptosi <16 x double> %a to <16 x i8>
1419 ret <16 x i8> %c
1420 }
1422 define <16 x i8> @fptou_v16f64_v16i8(<16 x double> %a) {
1423 ; CHECK-LABEL: fptou_v16f64_v16i8:
1424 ; CHECK: // %bb.0: // %entry
1425 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1426 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1427 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1428 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1429 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1430 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1431 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1432 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1433 ; CHECK-NEXT: xtn v7.2s, v7.2d
1434 ; CHECK-NEXT: xtn v6.2s, v6.2d
1435 ; CHECK-NEXT: xtn v5.2s, v5.2d
1436 ; CHECK-NEXT: xtn v4.2s, v4.2d
1437 ; CHECK-NEXT: xtn v3.2s, v3.2d
1438 ; CHECK-NEXT: xtn v2.2s, v2.2d
1439 ; CHECK-NEXT: xtn v1.2s, v1.2d
1440 ; CHECK-NEXT: xtn v0.2s, v0.2d
1441 ; CHECK-NEXT: uzp1 v6.4h, v6.4h, v7.4h
1442 ; CHECK-NEXT: uzp1 v4.4h, v4.4h, v5.4h
1443 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1444 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1445 ; CHECK-NEXT: mov v4.d[1], v6.d[0]
1446 ; CHECK-NEXT: mov v0.d[1], v2.d[0]
1447 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v4.16b
1448 ; CHECK-NEXT: ret
1449 entry:
1450 %c = fptoui <16 x double> %a to <16 x i8>
1451 ret <16 x i8> %c
1452 }
1454 define <32 x i8> @fptos_v32f64_v32i8(<32 x double> %a) {
1455 ; CHECK-LABEL: fptos_v32f64_v32i8:
1456 ; CHECK: // %bb.0: // %entry
1457 ; CHECK-NEXT: ldp q16, q17, [sp]
1458 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1459 ; CHECK-NEXT: ldp q18, q19, [sp, #32]
1460 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1461 ; CHECK-NEXT: ldp q20, q21, [sp, #64]
1462 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1463 ; CHECK-NEXT: ldp q22, q23, [sp, #96]
1464 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1465 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1466 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1467 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1468 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1469 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
1470 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
1471 ; CHECK-NEXT: fcvtzs v23.2d, v23.2d
1472 ; CHECK-NEXT: fcvtzs v22.2d, v22.2d
1473 ; CHECK-NEXT: fcvtzs v19.2d, v19.2d
1474 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
1475 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
1476 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
1477 ; CHECK-NEXT: xtn v7.2s, v7.2d
1478 ; CHECK-NEXT: xtn v6.2s, v6.2d
1479 ; CHECK-NEXT: xtn v5.2s, v5.2d
1480 ; CHECK-NEXT: xtn v4.2s, v4.2d
1481 ; CHECK-NEXT: xtn v3.2s, v3.2d
1482 ; CHECK-NEXT: xtn v2.2s, v2.2d
1483 ; CHECK-NEXT: xtn v1.2s, v1.2d
1484 ; CHECK-NEXT: xtn v0.2s, v0.2d
1485 ; CHECK-NEXT: xtn v23.2s, v23.2d
1486 ; CHECK-NEXT: xtn v22.2s, v22.2d
1487 ; CHECK-NEXT: xtn v21.2s, v21.2d
1488 ; CHECK-NEXT: xtn v20.2s, v20.2d
1489 ; CHECK-NEXT: xtn v19.2s, v19.2d
1490 ; CHECK-NEXT: xtn v18.2s, v18.2d
1491 ; CHECK-NEXT: xtn v17.2s, v17.2d
1492 ; CHECK-NEXT: xtn v16.2s, v16.2d
1493 ; CHECK-NEXT: uzp1 v6.4h, v6.4h, v7.4h
1494 ; CHECK-NEXT: uzp1 v4.4h, v4.4h, v5.4h
1495 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1496 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1497 ; CHECK-NEXT: uzp1 v1.4h, v22.4h, v23.4h
1498 ; CHECK-NEXT: uzp1 v3.4h, v20.4h, v21.4h
1499 ; CHECK-NEXT: uzp1 v5.4h, v18.4h, v19.4h
1500 ; CHECK-NEXT: uzp1 v7.4h, v16.4h, v17.4h
1501 ; CHECK-NEXT: mov v4.d[1], v6.d[0]
1502 ; CHECK-NEXT: mov v0.d[1], v2.d[0]
1503 ; CHECK-NEXT: mov v3.d[1], v1.d[0]
1504 ; CHECK-NEXT: mov v7.d[1], v5.d[0]
1505 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v4.16b
1506 ; CHECK-NEXT: uzp1 v1.16b, v7.16b, v3.16b
1507 ; CHECK-NEXT: ret
1508 entry:
1509 %c = fptosi <32 x double> %a to <32 x i8>
1510 ret <32 x i8> %c
1511 }
1513 define <32 x i8> @fptou_v32f64_v32i8(<32 x double> %a) {
1514 ; CHECK-LABEL: fptou_v32f64_v32i8:
1515 ; CHECK: // %bb.0: // %entry
1516 ; CHECK-NEXT: ldp q16, q17, [sp]
1517 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1518 ; CHECK-NEXT: ldp q18, q19, [sp, #32]
1519 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1520 ; CHECK-NEXT: ldp q20, q21, [sp, #64]
1521 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1522 ; CHECK-NEXT: ldp q22, q23, [sp, #96]
1523 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1524 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1525 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1526 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1527 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1528 ; CHECK-NEXT: fcvtzs v21.2d, v21.2d
1529 ; CHECK-NEXT: fcvtzs v20.2d, v20.2d
1530 ; CHECK-NEXT: fcvtzs v23.2d, v23.2d
1531 ; CHECK-NEXT: fcvtzs v22.2d, v22.2d
1532 ; CHECK-NEXT: fcvtzs v19.2d, v19.2d
1533 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
1534 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
1535 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
1536 ; CHECK-NEXT: xtn v7.2s, v7.2d
1537 ; CHECK-NEXT: xtn v6.2s, v6.2d
1538 ; CHECK-NEXT: xtn v5.2s, v5.2d
1539 ; CHECK-NEXT: xtn v4.2s, v4.2d
1540 ; CHECK-NEXT: xtn v3.2s, v3.2d
1541 ; CHECK-NEXT: xtn v2.2s, v2.2d
1542 ; CHECK-NEXT: xtn v1.2s, v1.2d
1543 ; CHECK-NEXT: xtn v0.2s, v0.2d
1544 ; CHECK-NEXT: xtn v23.2s, v23.2d
1545 ; CHECK-NEXT: xtn v22.2s, v22.2d
1546 ; CHECK-NEXT: xtn v21.2s, v21.2d
1547 ; CHECK-NEXT: xtn v20.2s, v20.2d
1548 ; CHECK-NEXT: xtn v19.2s, v19.2d
1549 ; CHECK-NEXT: xtn v18.2s, v18.2d
1550 ; CHECK-NEXT: xtn v17.2s, v17.2d
1551 ; CHECK-NEXT: xtn v16.2s, v16.2d
1552 ; CHECK-NEXT: uzp1 v6.4h, v6.4h, v7.4h
1553 ; CHECK-NEXT: uzp1 v4.4h, v4.4h, v5.4h
1554 ; CHECK-NEXT: uzp1 v2.4h, v2.4h, v3.4h
1555 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
1556 ; CHECK-NEXT: uzp1 v1.4h, v22.4h, v23.4h
1557 ; CHECK-NEXT: uzp1 v3.4h, v20.4h, v21.4h
1558 ; CHECK-NEXT: uzp1 v5.4h, v18.4h, v19.4h
1559 ; CHECK-NEXT: uzp1 v7.4h, v16.4h, v17.4h
1560 ; CHECK-NEXT: mov v4.d[1], v6.d[0]
1561 ; CHECK-NEXT: mov v0.d[1], v2.d[0]
1562 ; CHECK-NEXT: mov v3.d[1], v1.d[0]
1563 ; CHECK-NEXT: mov v7.d[1], v5.d[0]
1564 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v4.16b
1565 ; CHECK-NEXT: uzp1 v1.16b, v7.16b, v3.16b
1566 ; CHECK-NEXT: ret
1567 entry:
1568 %c = fptoui <32 x double> %a to <32 x i8>
1569 ret <32 x i8> %c
1570 }
1572 define <2 x i64> @fptos_v2f32_v2i64(<2 x float> %a) {
1573 ; CHECK-LABEL: fptos_v2f32_v2i64:
1574 ; CHECK: // %bb.0: // %entry
1575 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1576 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1577 ; CHECK-NEXT: ret
1578 entry:
1579 %c = fptosi <2 x float> %a to <2 x i64>
1580 ret <2 x i64> %c
1581 }
1583 define <2 x i64> @fptou_v2f32_v2i64(<2 x float> %a) {
1584 ; CHECK-LABEL: fptou_v2f32_v2i64:
1585 ; CHECK: // %bb.0: // %entry
1586 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1587 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1588 ; CHECK-NEXT: ret
1589 entry:
1590 %c = fptoui <2 x float> %a to <2 x i64>
1591 ret <2 x i64> %c
1592 }
1594 define <3 x i64> @fptos_v3f32_v3i64(<3 x float> %a) {
1595 ; CHECK-LABEL: fptos_v3f32_v3i64:
1596 ; CHECK: // %bb.0: // %entry
1597 ; CHECK-NEXT: fcvtl v1.2d, v0.2s
1598 ; CHECK-NEXT: fcvtl2 v0.2d, v0.4s
1599 ; CHECK-NEXT: fcvtzs v3.2d, v1.2d
1600 ; CHECK-NEXT: fcvtzs v2.2d, v0.2d
1601 ; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
1602 ; CHECK-NEXT: fmov d0, d3
1603 ; CHECK-NEXT: ext v1.16b, v3.16b, v3.16b, #8
1604 ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
1605 ; CHECK-NEXT: ret
1606 entry:
1607 %c = fptosi <3 x float> %a to <3 x i64>
1608 ret <3 x i64> %c
1609 }
1611 define <3 x i64> @fptou_v3f32_v3i64(<3 x float> %a) {
1612 ; CHECK-LABEL: fptou_v3f32_v3i64:
1613 ; CHECK: // %bb.0: // %entry
1614 ; CHECK-NEXT: fcvtl v1.2d, v0.2s
1615 ; CHECK-NEXT: fcvtl2 v0.2d, v0.4s
1616 ; CHECK-NEXT: fcvtzu v3.2d, v1.2d
1617 ; CHECK-NEXT: fcvtzu v2.2d, v0.2d
1618 ; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
1619 ; CHECK-NEXT: fmov d0, d3
1620 ; CHECK-NEXT: ext v1.16b, v3.16b, v3.16b, #8
1621 ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
1622 ; CHECK-NEXT: ret
1623 entry:
1624 %c = fptoui <3 x float> %a to <3 x i64>
1625 ret <3 x i64> %c
1626 }
1628 define <4 x i64> @fptos_v4f32_v4i64(<4 x float> %a) {
1629 ; CHECK-LABEL: fptos_v4f32_v4i64:
1630 ; CHECK: // %bb.0: // %entry
1631 ; CHECK-NEXT: fcvtl2 v1.2d, v0.4s
1632 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1633 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1634 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1635 ; CHECK-NEXT: ret
1636 entry:
1637 %c = fptosi <4 x float> %a to <4 x i64>
1638 ret <4 x i64> %c
1639 }
1641 define <4 x i64> @fptou_v4f32_v4i64(<4 x float> %a) {
1642 ; CHECK-LABEL: fptou_v4f32_v4i64:
1643 ; CHECK: // %bb.0: // %entry
1644 ; CHECK-NEXT: fcvtl2 v1.2d, v0.4s
1645 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1646 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
1647 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1648 ; CHECK-NEXT: ret
1649 entry:
1650 %c = fptoui <4 x float> %a to <4 x i64>
1651 ret <4 x i64> %c
1652 }
1654 define <8 x i64> @fptos_v8f32_v8i64(<8 x float> %a) {
1655 ; CHECK-LABEL: fptos_v8f32_v8i64:
1656 ; CHECK: // %bb.0: // %entry
1657 ; CHECK-NEXT: fcvtl v2.2d, v0.2s
1658 ; CHECK-NEXT: fcvtl2 v3.2d, v0.4s
1659 ; CHECK-NEXT: fcvtl2 v4.2d, v1.4s
1660 ; CHECK-NEXT: fcvtl v5.2d, v1.2s
1661 ; CHECK-NEXT: fcvtzs v0.2d, v2.2d
1662 ; CHECK-NEXT: fcvtzs v1.2d, v3.2d
1663 ; CHECK-NEXT: fcvtzs v3.2d, v4.2d
1664 ; CHECK-NEXT: fcvtzs v2.2d, v5.2d
1665 ; CHECK-NEXT: ret
1666 entry:
1667 %c = fptosi <8 x float> %a to <8 x i64>
1668 ret <8 x i64> %c
1669 }
1671 define <8 x i64> @fptou_v8f32_v8i64(<8 x float> %a) {
1672 ; CHECK-LABEL: fptou_v8f32_v8i64:
1673 ; CHECK: // %bb.0: // %entry
1674 ; CHECK-NEXT: fcvtl v2.2d, v0.2s
1675 ; CHECK-NEXT: fcvtl2 v3.2d, v0.4s
1676 ; CHECK-NEXT: fcvtl2 v4.2d, v1.4s
1677 ; CHECK-NEXT: fcvtl v5.2d, v1.2s
1678 ; CHECK-NEXT: fcvtzu v0.2d, v2.2d
1679 ; CHECK-NEXT: fcvtzu v1.2d, v3.2d
1680 ; CHECK-NEXT: fcvtzu v3.2d, v4.2d
1681 ; CHECK-NEXT: fcvtzu v2.2d, v5.2d
1682 ; CHECK-NEXT: ret
1683 entry:
1684 %c = fptoui <8 x float> %a to <8 x i64>
1685 ret <8 x i64> %c
1686 }
1688 define <16 x i64> @fptos_v16f32_v16i64(<16 x float> %a) {
1689 ; CHECK-LABEL: fptos_v16f32_v16i64:
1690 ; CHECK: // %bb.0: // %entry
1691 ; CHECK-NEXT: fcvtl2 v4.2d, v0.4s
1692 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1693 ; CHECK-NEXT: fcvtl2 v5.2d, v1.4s
1694 ; CHECK-NEXT: fcvtl v6.2d, v1.2s
1695 ; CHECK-NEXT: fcvtl v7.2d, v2.2s
1696 ; CHECK-NEXT: fcvtl2 v16.2d, v2.4s
1697 ; CHECK-NEXT: fcvtl2 v17.2d, v3.4s
1698 ; CHECK-NEXT: fcvtl v18.2d, v3.2s
1699 ; CHECK-NEXT: fcvtzs v1.2d, v4.2d
1700 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1701 ; CHECK-NEXT: fcvtzs v3.2d, v5.2d
1702 ; CHECK-NEXT: fcvtzs v2.2d, v6.2d
1703 ; CHECK-NEXT: fcvtzs v4.2d, v7.2d
1704 ; CHECK-NEXT: fcvtzs v5.2d, v16.2d
1705 ; CHECK-NEXT: fcvtzs v7.2d, v17.2d
1706 ; CHECK-NEXT: fcvtzs v6.2d, v18.2d
1707 ; CHECK-NEXT: ret
1708 entry:
1709 %c = fptosi <16 x float> %a to <16 x i64>
1710 ret <16 x i64> %c
1711 }
1713 define <16 x i64> @fptou_v16f32_v16i64(<16 x float> %a) {
1714 ; CHECK-LABEL: fptou_v16f32_v16i64:
1715 ; CHECK: // %bb.0: // %entry
1716 ; CHECK-NEXT: fcvtl2 v4.2d, v0.4s
1717 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1718 ; CHECK-NEXT: fcvtl2 v5.2d, v1.4s
1719 ; CHECK-NEXT: fcvtl v6.2d, v1.2s
1720 ; CHECK-NEXT: fcvtl v7.2d, v2.2s
1721 ; CHECK-NEXT: fcvtl2 v16.2d, v2.4s
1722 ; CHECK-NEXT: fcvtl2 v17.2d, v3.4s
1723 ; CHECK-NEXT: fcvtl v18.2d, v3.2s
1724 ; CHECK-NEXT: fcvtzu v1.2d, v4.2d
1725 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1726 ; CHECK-NEXT: fcvtzu v3.2d, v5.2d
1727 ; CHECK-NEXT: fcvtzu v2.2d, v6.2d
1728 ; CHECK-NEXT: fcvtzu v4.2d, v7.2d
1729 ; CHECK-NEXT: fcvtzu v5.2d, v16.2d
1730 ; CHECK-NEXT: fcvtzu v7.2d, v17.2d
1731 ; CHECK-NEXT: fcvtzu v6.2d, v18.2d
1732 ; CHECK-NEXT: ret
1733 entry:
1734 %c = fptoui <16 x float> %a to <16 x i64>
1735 ret <16 x i64> %c
1736 }
1738 define <32 x i64> @fptos_v32f32_v32i64(<32 x float> %a) {
1739 ; CHECK-LABEL: fptos_v32f32_v32i64:
1740 ; CHECK: // %bb.0: // %entry
1741 ; CHECK-NEXT: fcvtl2 v16.2d, v7.4s
1742 ; CHECK-NEXT: fcvtl v7.2d, v7.2s
1743 ; CHECK-NEXT: fcvtl2 v17.2d, v6.4s
1744 ; CHECK-NEXT: fcvtl v6.2d, v6.2s
1745 ; CHECK-NEXT: fcvtl2 v18.2d, v5.4s
1746 ; CHECK-NEXT: fcvtl v5.2d, v5.2s
1747 ; CHECK-NEXT: fcvtl2 v19.2d, v4.4s
1748 ; CHECK-NEXT: fcvtl v4.2d, v4.2s
1749 ; CHECK-NEXT: fcvtl2 v20.2d, v3.4s
1750 ; CHECK-NEXT: fcvtl v3.2d, v3.2s
1751 ; CHECK-NEXT: fcvtzs v16.2d, v16.2d
1752 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1753 ; CHECK-NEXT: fcvtzs v17.2d, v17.2d
1754 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
1755 ; CHECK-NEXT: fcvtzs v18.2d, v18.2d
1756 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
1757 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
1758 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
1759 ; CHECK-NEXT: stp q7, q16, [x8, #224]
1760 ; CHECK-NEXT: fcvtl2 v7.2d, v2.4s
1761 ; CHECK-NEXT: fcvtzs v16.2d, v19.2d
1762 ; CHECK-NEXT: stp q5, q18, [x8, #160]
1763 ; CHECK-NEXT: fcvtl v2.2d, v2.2s
1764 ; CHECK-NEXT: fcvtl2 v5.2d, v0.4s
1765 ; CHECK-NEXT: stp q6, q17, [x8, #192]
1766 ; CHECK-NEXT: fcvtl2 v6.2d, v1.4s
1767 ; CHECK-NEXT: fcvtzs v17.2d, v20.2d
1768 ; CHECK-NEXT: fcvtl v1.2d, v1.2s
1769 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1770 ; CHECK-NEXT: stp q4, q16, [x8, #128]
1771 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
1772 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
1773 ; CHECK-NEXT: fcvtzs v4.2d, v6.2d
1774 ; CHECK-NEXT: stp q3, q17, [x8, #96]
1775 ; CHECK-NEXT: fcvtzs v3.2d, v5.2d
1776 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
1777 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1778 ; CHECK-NEXT: stp q2, q7, [x8, #64]
1779 ; CHECK-NEXT: stp q0, q3, [x8]
1780 ; CHECK-NEXT: stp q1, q4, [x8, #32]
1781 ; CHECK-NEXT: ret
1782 entry:
1783 %c = fptosi <32 x float> %a to <32 x i64>
1784 ret <32 x i64> %c
1785 }
1787 define <32 x i64> @fptou_v32f32_v32i64(<32 x float> %a) {
1788 ; CHECK-LABEL: fptou_v32f32_v32i64:
1789 ; CHECK: // %bb.0: // %entry
1790 ; CHECK-NEXT: fcvtl2 v16.2d, v7.4s
1791 ; CHECK-NEXT: fcvtl v7.2d, v7.2s
1792 ; CHECK-NEXT: fcvtl2 v17.2d, v6.4s
1793 ; CHECK-NEXT: fcvtl v6.2d, v6.2s
1794 ; CHECK-NEXT: fcvtl2 v18.2d, v5.4s
1795 ; CHECK-NEXT: fcvtl v5.2d, v5.2s
1796 ; CHECK-NEXT: fcvtl2 v19.2d, v4.4s
1797 ; CHECK-NEXT: fcvtl v4.2d, v4.2s
1798 ; CHECK-NEXT: fcvtl2 v20.2d, v3.4s
1799 ; CHECK-NEXT: fcvtl v3.2d, v3.2s
1800 ; CHECK-NEXT: fcvtzu v16.2d, v16.2d
1801 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
1802 ; CHECK-NEXT: fcvtzu v17.2d, v17.2d
1803 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
1804 ; CHECK-NEXT: fcvtzu v18.2d, v18.2d
1805 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
1806 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
1807 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
1808 ; CHECK-NEXT: stp q7, q16, [x8, #224]
1809 ; CHECK-NEXT: fcvtl2 v7.2d, v2.4s
1810 ; CHECK-NEXT: fcvtzu v16.2d, v19.2d
1811 ; CHECK-NEXT: stp q5, q18, [x8, #160]
1812 ; CHECK-NEXT: fcvtl v2.2d, v2.2s
1813 ; CHECK-NEXT: fcvtl2 v5.2d, v0.4s
1814 ; CHECK-NEXT: stp q6, q17, [x8, #192]
1815 ; CHECK-NEXT: fcvtl2 v6.2d, v1.4s
1816 ; CHECK-NEXT: fcvtzu v17.2d, v20.2d
1817 ; CHECK-NEXT: fcvtl v1.2d, v1.2s
1818 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
1819 ; CHECK-NEXT: stp q4, q16, [x8, #128]
1820 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
1821 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
1822 ; CHECK-NEXT: fcvtzu v4.2d, v6.2d
1823 ; CHECK-NEXT: stp q3, q17, [x8, #96]
1824 ; CHECK-NEXT: fcvtzu v3.2d, v5.2d
1825 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
1826 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1827 ; CHECK-NEXT: stp q2, q7, [x8, #64]
1828 ; CHECK-NEXT: stp q0, q3, [x8]
1829 ; CHECK-NEXT: stp q1, q4, [x8, #32]
1830 ; CHECK-NEXT: ret
1831 entry:
1832 %c = fptoui <32 x float> %a to <32 x i64>
1833 ret <32 x i64> %c
1834 }
1836 define <2 x i32> @fptos_v2f32_v2i32(<2 x float> %a) {
1837 ; CHECK-LABEL: fptos_v2f32_v2i32:
1838 ; CHECK: // %bb.0: // %entry
1839 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
1840 ; CHECK-NEXT: ret
1841 entry:
1842 %c = fptosi <2 x float> %a to <2 x i32>
1843 ret <2 x i32> %c
1844 }
1846 define <2 x i32> @fptou_v2f32_v2i32(<2 x float> %a) {
1847 ; CHECK-LABEL: fptou_v2f32_v2i32:
1848 ; CHECK: // %bb.0: // %entry
1849 ; CHECK-NEXT: fcvtzu v0.2s, v0.2s
1850 ; CHECK-NEXT: ret
1851 entry:
1852 %c = fptoui <2 x float> %a to <2 x i32>
1853 ret <2 x i32> %c
1854 }
1856 define <3 x i32> @fptos_v3f32_v3i32(<3 x float> %a) {
1857 ; CHECK-LABEL: fptos_v3f32_v3i32:
1858 ; CHECK: // %bb.0: // %entry
1859 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
1860 ; CHECK-NEXT: ret
1861 entry:
1862 %c = fptosi <3 x float> %a to <3 x i32>
1863 ret <3 x i32> %c
1864 }
1866 define <3 x i32> @fptou_v3f32_v3i32(<3 x float> %a) {
1867 ; CHECK-LABEL: fptou_v3f32_v3i32:
1868 ; CHECK: // %bb.0: // %entry
1869 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
1870 ; CHECK-NEXT: ret
1871 entry:
1872 %c = fptoui <3 x float> %a to <3 x i32>
1873 ret <3 x i32> %c
1874 }
1876 define <4 x i32> @fptos_v4f32_v4i32(<4 x float> %a) {
1877 ; CHECK-LABEL: fptos_v4f32_v4i32:
1878 ; CHECK: // %bb.0: // %entry
1879 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
1880 ; CHECK-NEXT: ret
1881 entry:
1882 %c = fptosi <4 x float> %a to <4 x i32>
1883 ret <4 x i32> %c
1884 }
1886 define <4 x i32> @fptou_v4f32_v4i32(<4 x float> %a) {
1887 ; CHECK-LABEL: fptou_v4f32_v4i32:
1888 ; CHECK: // %bb.0: // %entry
1889 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
1890 ; CHECK-NEXT: ret
1891 entry:
1892 %c = fptoui <4 x float> %a to <4 x i32>
1893 ret <4 x i32> %c
1894 }
1896 define <8 x i32> @fptos_v8f32_v8i32(<8 x float> %a) {
1897 ; CHECK-LABEL: fptos_v8f32_v8i32:
1898 ; CHECK: // %bb.0: // %entry
1899 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
1900 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
1901 ; CHECK-NEXT: ret
1902 entry:
1903 %c = fptosi <8 x float> %a to <8 x i32>
1904 ret <8 x i32> %c
1905 }
1907 define <8 x i32> @fptou_v8f32_v8i32(<8 x float> %a) {
1908 ; CHECK-LABEL: fptou_v8f32_v8i32:
1909 ; CHECK: // %bb.0: // %entry
1910 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
1911 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
1912 ; CHECK-NEXT: ret
1913 entry:
1914 %c = fptoui <8 x float> %a to <8 x i32>
1915 ret <8 x i32> %c
1916 }
1918 define <16 x i32> @fptos_v16f32_v16i32(<16 x float> %a) {
1919 ; CHECK-LABEL: fptos_v16f32_v16i32:
1920 ; CHECK: // %bb.0: // %entry
1921 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
1922 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
1923 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
1924 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
1925 ; CHECK-NEXT: ret
1926 entry:
1927 %c = fptosi <16 x float> %a to <16 x i32>
1928 ret <16 x i32> %c
1929 }
1931 define <16 x i32> @fptou_v16f32_v16i32(<16 x float> %a) {
1932 ; CHECK-LABEL: fptou_v16f32_v16i32:
1933 ; CHECK: // %bb.0: // %entry
1934 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
1935 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
1936 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
1937 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
1938 ; CHECK-NEXT: ret
1939 entry:
1940 %c = fptoui <16 x float> %a to <16 x i32>
1941 ret <16 x i32> %c
1942 }
1944 define <32 x i32> @fptos_v32f32_v32i32(<32 x float> %a) {
1945 ; CHECK-LABEL: fptos_v32f32_v32i32:
1946 ; CHECK: // %bb.0: // %entry
1947 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
1948 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
1949 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
1950 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
1951 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
1952 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
1953 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
1954 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
1955 ; CHECK-NEXT: ret
1956 entry:
1957 %c = fptosi <32 x float> %a to <32 x i32>
1958 ret <32 x i32> %c
1959 }
1961 define <32 x i32> @fptou_v32f32_v32i32(<32 x float> %a) {
1962 ; CHECK-LABEL: fptou_v32f32_v32i32:
1963 ; CHECK: // %bb.0: // %entry
1964 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
1965 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
1966 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
1967 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
1968 ; CHECK-NEXT: fcvtzu v4.4s, v4.4s
1969 ; CHECK-NEXT: fcvtzu v5.4s, v5.4s
1970 ; CHECK-NEXT: fcvtzu v6.4s, v6.4s
1971 ; CHECK-NEXT: fcvtzu v7.4s, v7.4s
1972 ; CHECK-NEXT: ret
1973 entry:
1974 %c = fptoui <32 x float> %a to <32 x i32>
1975 ret <32 x i32> %c
1976 }
1978 define <2 x i16> @fptos_v2f32_v2i16(<2 x float> %a) {
1979 ; CHECK-LABEL: fptos_v2f32_v2i16:
1980 ; CHECK: // %bb.0: // %entry
1981 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
1982 ; CHECK-NEXT: ret
1983 entry:
1984 %c = fptosi <2 x float> %a to <2 x i16>
1985 ret <2 x i16> %c
1986 }
1988 define <2 x i16> @fptou_v2f32_v2i16(<2 x float> %a) {
1989 ; CHECK-LABEL: fptou_v2f32_v2i16:
1990 ; CHECK: // %bb.0: // %entry
1991 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
1992 ; CHECK-NEXT: ret
1993 entry:
1994 %c = fptoui <2 x float> %a to <2 x i16>
1995 ret <2 x i16> %c
1996 }
1998 define <3 x i16> @fptos_v3f32_v3i16(<3 x float> %a) {
1999 ; CHECK-LABEL: fptos_v3f32_v3i16:
2000 ; CHECK: // %bb.0: // %entry
2001 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2002 ; CHECK-NEXT: xtn v0.4h, v0.4s
2003 ; CHECK-NEXT: ret
2004 entry:
2005 %c = fptosi <3 x float> %a to <3 x i16>
2006 ret <3 x i16> %c
2007 }
2009 define <3 x i16> @fptou_v3f32_v3i16(<3 x float> %a) {
2010 ; CHECK-LABEL: fptou_v3f32_v3i16:
2011 ; CHECK: // %bb.0: // %entry
2012 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
2013 ; CHECK-NEXT: xtn v0.4h, v0.4s
2014 ; CHECK-NEXT: ret
2015 entry:
2016 %c = fptoui <3 x float> %a to <3 x i16>
2017 ret <3 x i16> %c
2018 }
2020 define <4 x i16> @fptos_v4f32_v4i16(<4 x float> %a) {
2021 ; CHECK-LABEL: fptos_v4f32_v4i16:
2022 ; CHECK: // %bb.0: // %entry
2023 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2024 ; CHECK-NEXT: xtn v0.4h, v0.4s
2025 ; CHECK-NEXT: ret
2026 entry:
2027 %c = fptosi <4 x float> %a to <4 x i16>
2028 ret <4 x i16> %c
2029 }
2031 define <4 x i16> @fptou_v4f32_v4i16(<4 x float> %a) {
2032 ; CHECK-LABEL: fptou_v4f32_v4i16:
2033 ; CHECK: // %bb.0: // %entry
2034 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
2035 ; CHECK-NEXT: xtn v0.4h, v0.4s
2036 ; CHECK-NEXT: ret
2037 entry:
2038 %c = fptoui <4 x float> %a to <4 x i16>
2039 ret <4 x i16> %c
2040 }
2042 define <8 x i16> @fptos_v8f32_v8i16(<8 x float> %a) {
2043 ; CHECK-LABEL: fptos_v8f32_v8i16:
2044 ; CHECK: // %bb.0: // %entry
2045 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2046 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2047 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2048 ; CHECK-NEXT: ret
2049 entry:
2050 %c = fptosi <8 x float> %a to <8 x i16>
2051 ret <8 x i16> %c
2052 }
2054 define <8 x i16> @fptou_v8f32_v8i16(<8 x float> %a) {
2055 ; CHECK-LABEL: fptou_v8f32_v8i16:
2056 ; CHECK: // %bb.0: // %entry
2057 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
2058 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
2059 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2060 ; CHECK-NEXT: ret
2061 entry:
2062 %c = fptoui <8 x float> %a to <8 x i16>
2063 ret <8 x i16> %c
2064 }
2066 define <16 x i16> @fptos_v16f32_v16i16(<16 x float> %a) {
2067 ; CHECK-LABEL: fptos_v16f32_v16i16:
2068 ; CHECK: // %bb.0: // %entry
2069 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2070 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2071 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2072 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2073 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2074 ; CHECK-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2075 ; CHECK-NEXT: ret
2076 entry:
2077 %c = fptosi <16 x float> %a to <16 x i16>
2078 ret <16 x i16> %c
2079 }
2081 define <16 x i16> @fptou_v16f32_v16i16(<16 x float> %a) {
2082 ; CHECK-LABEL: fptou_v16f32_v16i16:
2083 ; CHECK: // %bb.0: // %entry
2084 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
2085 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
2086 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
2087 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
2088 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2089 ; CHECK-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2090 ; CHECK-NEXT: ret
2091 entry:
2092 %c = fptoui <16 x float> %a to <16 x i16>
2093 ret <16 x i16> %c
2094 }
2096 define <32 x i16> @fptos_v32f32_v32i16(<32 x float> %a) {
2097 ; CHECK-LABEL: fptos_v32f32_v32i16:
2098 ; CHECK: // %bb.0: // %entry
2099 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2100 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2101 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2102 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2103 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
2104 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
2105 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
2106 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
2107 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2108 ; CHECK-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2109 ; CHECK-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2110 ; CHECK-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2111 ; CHECK-NEXT: ret
2112 entry:
2113 %c = fptosi <32 x float> %a to <32 x i16>
2114 ret <32 x i16> %c
2115 }
2117 define <32 x i16> @fptou_v32f32_v32i16(<32 x float> %a) {
2118 ; CHECK-LABEL: fptou_v32f32_v32i16:
2119 ; CHECK: // %bb.0: // %entry
2120 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
2121 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
2122 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
2123 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
2124 ; CHECK-NEXT: fcvtzu v5.4s, v5.4s
2125 ; CHECK-NEXT: fcvtzu v4.4s, v4.4s
2126 ; CHECK-NEXT: fcvtzu v7.4s, v7.4s
2127 ; CHECK-NEXT: fcvtzu v6.4s, v6.4s
2128 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2129 ; CHECK-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2130 ; CHECK-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2131 ; CHECK-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2132 ; CHECK-NEXT: ret
2133 entry:
2134 %c = fptoui <32 x float> %a to <32 x i16>
2135 ret <32 x i16> %c
2136 }
2138 define <2 x i8> @fptos_v2f32_v2i8(<2 x float> %a) {
2139 ; CHECK-LABEL: fptos_v2f32_v2i8:
2140 ; CHECK: // %bb.0: // %entry
2141 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
2142 ; CHECK-NEXT: ret
2143 entry:
2144 %c = fptosi <2 x float> %a to <2 x i8>
2145 ret <2 x i8> %c
2146 }
2148 define <2 x i8> @fptou_v2f32_v2i8(<2 x float> %a) {
2149 ; CHECK-LABEL: fptou_v2f32_v2i8:
2150 ; CHECK: // %bb.0: // %entry
2151 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
2152 ; CHECK-NEXT: ret
2153 entry:
2154 %c = fptoui <2 x float> %a to <2 x i8>
2155 ret <2 x i8> %c
2156 }
2158 define <3 x i8> @fptos_v3f32_v3i8(<3 x float> %a) {
2159 ; CHECK-LABEL: fptos_v3f32_v3i8:
2160 ; CHECK: // %bb.0: // %entry
2161 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2162 ; CHECK-NEXT: xtn v0.4h, v0.4s
2163 ; CHECK-NEXT: umov w0, v0.h[0]
2164 ; CHECK-NEXT: umov w1, v0.h[1]
2165 ; CHECK-NEXT: umov w2, v0.h[2]
2166 ; CHECK-NEXT: ret
2167 entry:
2168 %c = fptosi <3 x float> %a to <3 x i8>
2169 ret <3 x i8> %c
2170 }
2172 define <3 x i8> @fptou_v3f32_v3i8(<3 x float> %a) {
2173 ; CHECK-LABEL: fptou_v3f32_v3i8:
2174 ; CHECK: // %bb.0: // %entry
2175 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2176 ; CHECK-NEXT: xtn v0.4h, v0.4s
2177 ; CHECK-NEXT: umov w0, v0.h[0]
2178 ; CHECK-NEXT: umov w1, v0.h[1]
2179 ; CHECK-NEXT: umov w2, v0.h[2]
2180 ; CHECK-NEXT: ret
2181 entry:
2182 %c = fptoui <3 x float> %a to <3 x i8>
2183 ret <3 x i8> %c
2184 }
2186 define <4 x i8> @fptos_v4f32_v4i8(<4 x float> %a) {
2187 ; CHECK-LABEL: fptos_v4f32_v4i8:
2188 ; CHECK: // %bb.0: // %entry
2189 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2190 ; CHECK-NEXT: xtn v0.4h, v0.4s
2191 ; CHECK-NEXT: ret
2192 entry:
2193 %c = fptosi <4 x float> %a to <4 x i8>
2194 ret <4 x i8> %c
2195 }
2197 define <4 x i8> @fptou_v4f32_v4i8(<4 x float> %a) {
2198 ; CHECK-LABEL: fptou_v4f32_v4i8:
2199 ; CHECK: // %bb.0: // %entry
2200 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2201 ; CHECK-NEXT: xtn v0.4h, v0.4s
2202 ; CHECK-NEXT: ret
2203 entry:
2204 %c = fptoui <4 x float> %a to <4 x i8>
2205 ret <4 x i8> %c
2206 }
2208 define <8 x i8> @fptos_v8f32_v8i8(<8 x float> %a) {
2209 ; CHECK-LABEL: fptos_v8f32_v8i8:
2210 ; CHECK: // %bb.0: // %entry
2211 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2212 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2213 ; CHECK-NEXT: xtn v1.4h, v1.4s
2214 ; CHECK-NEXT: xtn v0.4h, v0.4s
2215 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
2216 ; CHECK-NEXT: ret
2217 entry:
2218 %c = fptosi <8 x float> %a to <8 x i8>
2219 ret <8 x i8> %c
2220 }
2222 define <8 x i8> @fptou_v8f32_v8i8(<8 x float> %a) {
2223 ; CHECK-LABEL: fptou_v8f32_v8i8:
2224 ; CHECK: // %bb.0: // %entry
2225 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2226 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2227 ; CHECK-NEXT: xtn v1.4h, v1.4s
2228 ; CHECK-NEXT: xtn v0.4h, v0.4s
2229 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
2230 ; CHECK-NEXT: ret
2231 entry:
2232 %c = fptoui <8 x float> %a to <8 x i8>
2233 ret <8 x i8> %c
2234 }
2236 define <16 x i8> @fptos_v16f32_v16i8(<16 x float> %a) {
2237 ; CHECK-LABEL: fptos_v16f32_v16i8:
2238 ; CHECK: // %bb.0: // %entry
2239 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2240 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2241 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2242 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2243 ; CHECK-NEXT: xtn v3.4h, v3.4s
2244 ; CHECK-NEXT: xtn v2.4h, v2.4s
2245 ; CHECK-NEXT: xtn v1.4h, v1.4s
2246 ; CHECK-NEXT: xtn v0.4h, v0.4s
2247 ; CHECK-NEXT: mov v2.d[1], v3.d[0]
2248 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
2249 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b
2250 ; CHECK-NEXT: ret
2251 entry:
2252 %c = fptosi <16 x float> %a to <16 x i8>
2253 ret <16 x i8> %c
2254 }
2256 define <16 x i8> @fptou_v16f32_v16i8(<16 x float> %a) {
2257 ; CHECK-LABEL: fptou_v16f32_v16i8:
2258 ; CHECK: // %bb.0: // %entry
2259 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2260 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2261 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2262 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2263 ; CHECK-NEXT: uzp1 v2.8h, v2.8h, v3.8h
2264 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2265 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b
2266 ; CHECK-NEXT: ret
2267 entry:
2268 %c = fptoui <16 x float> %a to <16 x i8>
2269 ret <16 x i8> %c
2270 }
2272 define <32 x i8> @fptos_v32f32_v32i8(<32 x float> %a) {
2273 ; CHECK-LABEL: fptos_v32f32_v32i8:
2274 ; CHECK: // %bb.0: // %entry
2275 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2276 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2277 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2278 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2279 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
2280 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
2281 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
2282 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
2283 ; CHECK-NEXT: xtn v3.4h, v3.4s
2284 ; CHECK-NEXT: xtn v2.4h, v2.4s
2285 ; CHECK-NEXT: xtn v1.4h, v1.4s
2286 ; CHECK-NEXT: xtn v0.4h, v0.4s
2287 ; CHECK-NEXT: xtn v7.4h, v7.4s
2288 ; CHECK-NEXT: xtn v6.4h, v6.4s
2289 ; CHECK-NEXT: xtn v5.4h, v5.4s
2290 ; CHECK-NEXT: xtn v4.4h, v4.4s
2291 ; CHECK-NEXT: mov v2.d[1], v3.d[0]
2292 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
2293 ; CHECK-NEXT: mov v6.d[1], v7.d[0]
2294 ; CHECK-NEXT: mov v4.d[1], v5.d[0]
2295 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b
2296 ; CHECK-NEXT: uzp1 v1.16b, v4.16b, v6.16b
2297 ; CHECK-NEXT: ret
2298 entry:
2299 %c = fptosi <32 x float> %a to <32 x i8>
2300 ret <32 x i8> %c
2301 }
2303 define <32 x i8> @fptou_v32f32_v32i8(<32 x float> %a) {
2304 ; CHECK-LABEL: fptou_v32f32_v32i8:
2305 ; CHECK: // %bb.0: // %entry
2306 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
2307 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
2308 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
2309 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
2310 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
2311 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
2312 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
2313 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
2314 ; CHECK-NEXT: uzp1 v2.8h, v2.8h, v3.8h
2315 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2316 ; CHECK-NEXT: uzp1 v1.8h, v6.8h, v7.8h
2317 ; CHECK-NEXT: uzp1 v3.8h, v4.8h, v5.8h
2318 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b
2319 ; CHECK-NEXT: uzp1 v1.16b, v3.16b, v1.16b
2320 ; CHECK-NEXT: ret
2321 entry:
2322 %c = fptoui <32 x float> %a to <32 x i8>
2323 ret <32 x i8> %c
2324 }
2326 define <2 x i64> @fptos_v2f16_v2i64(<2 x half> %a) {
2327 ; CHECK-SD-NOFP16-LABEL: fptos_v2f16_v2i64:
2328 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2329 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2330 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
2331 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2332 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2333 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
2334 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
2335 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2336 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
2337 ; CHECK-SD-NOFP16-NEXT: ret
2338 ;
2339 ; CHECK-SD-FP16-LABEL: fptos_v2f16_v2i64:
2340 ; CHECK-SD-FP16: // %bb.0: // %entry
2341 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2342 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
2343 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
2344 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
2345 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2346 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
2347 ; CHECK-SD-FP16-NEXT: ret
2348 ;
2349 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i64:
2350 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2351 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2352 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
2353 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2354 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2355 ; CHECK-GI-NOFP16-NEXT: fcvtzs x8, s0
2356 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s1
2357 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2358 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x9
2359 ; CHECK-GI-NOFP16-NEXT: ret
2360 ;
2361 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i64:
2362 ; CHECK-GI-FP16: // %bb.0: // %entry
2363 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2364 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
2365 ; CHECK-GI-FP16-NEXT: fcvtzs x8, h0
2366 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h1
2367 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2368 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x9
2369 ; CHECK-GI-FP16-NEXT: ret
2370 entry:
2371 %c = fptosi <2 x half> %a to <2 x i64>
2372 ret <2 x i64> %c
2373 }
2375 define <2 x i64> @fptou_v2f16_v2i64(<2 x half> %a) {
2376 ; CHECK-SD-NOFP16-LABEL: fptou_v2f16_v2i64:
2377 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2378 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2379 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
2380 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2381 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2382 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
2383 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
2384 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2385 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
2386 ; CHECK-SD-NOFP16-NEXT: ret
2387 ;
2388 ; CHECK-SD-FP16-LABEL: fptou_v2f16_v2i64:
2389 ; CHECK-SD-FP16: // %bb.0: // %entry
2390 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2391 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
2392 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
2393 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
2394 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2395 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
2396 ; CHECK-SD-FP16-NEXT: ret
2397 ;
2398 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i64:
2399 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2400 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2401 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
2402 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2403 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2404 ; CHECK-GI-NOFP16-NEXT: fcvtzu x8, s0
2405 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s1
2406 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2407 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x9
2408 ; CHECK-GI-NOFP16-NEXT: ret
2409 ;
2410 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i64:
2411 ; CHECK-GI-FP16: // %bb.0: // %entry
2412 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2413 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
2414 ; CHECK-GI-FP16-NEXT: fcvtzu x8, h0
2415 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h1
2416 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2417 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x9
2418 ; CHECK-GI-FP16-NEXT: ret
2419 entry:
2420 %c = fptoui <2 x half> %a to <2 x i64>
2421 ret <2 x i64> %c
2422 }
2424 define <3 x i64> @fptos_v3f16_v3i64(<3 x half> %a) {
2425 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i64:
2426 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2427 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2428 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
2429 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
2430 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2431 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2432 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2433 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
2434 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
2435 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
2436 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2437 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
2438 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
2439 ; CHECK-SD-NOFP16-NEXT: ret
2440 ;
2441 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i64:
2442 ; CHECK-SD-FP16: // %bb.0: // %entry
2443 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2444 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
2445 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
2446 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
2447 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
2448 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
2449 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2450 ; CHECK-SD-FP16-NEXT: fmov d1, x9
2451 ; CHECK-SD-FP16-NEXT: fmov d2, x10
2452 ; CHECK-SD-FP16-NEXT: ret
2453 ;
2454 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i64:
2455 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2456 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2457 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
2458 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
2459 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2460 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2461 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2462 ; CHECK-GI-NOFP16-NEXT: fcvtzs x8, s0
2463 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s1
2464 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s2
2465 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2466 ; CHECK-GI-NOFP16-NEXT: fmov d1, x9
2467 ; CHECK-GI-NOFP16-NEXT: fmov d2, x10
2468 ; CHECK-GI-NOFP16-NEXT: ret
2469 ;
2470 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i64:
2471 ; CHECK-GI-FP16: // %bb.0: // %entry
2472 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2473 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
2474 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
2475 ; CHECK-GI-FP16-NEXT: fcvtzs x8, h0
2476 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h1
2477 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h2
2478 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2479 ; CHECK-GI-FP16-NEXT: fmov d1, x9
2480 ; CHECK-GI-FP16-NEXT: fmov d2, x10
2481 ; CHECK-GI-FP16-NEXT: ret
2482 entry:
2483 %c = fptosi <3 x half> %a to <3 x i64>
2484 ret <3 x i64> %c
2485 }
2487 define <3 x i64> @fptou_v3f16_v3i64(<3 x half> %a) {
2488 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i64:
2489 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2490 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2491 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
2492 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
2493 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2494 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2495 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2496 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
2497 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
2498 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
2499 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2500 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
2501 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
2502 ; CHECK-SD-NOFP16-NEXT: ret
2503 ;
2504 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i64:
2505 ; CHECK-SD-FP16: // %bb.0: // %entry
2506 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2507 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
2508 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
2509 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
2510 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
2511 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
2512 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2513 ; CHECK-SD-FP16-NEXT: fmov d1, x9
2514 ; CHECK-SD-FP16-NEXT: fmov d2, x10
2515 ; CHECK-SD-FP16-NEXT: ret
2516 ;
2517 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i64:
2518 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2519 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2520 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
2521 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
2522 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2523 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2524 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2525 ; CHECK-GI-NOFP16-NEXT: fcvtzu x8, s0
2526 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s1
2527 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s2
2528 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2529 ; CHECK-GI-NOFP16-NEXT: fmov d1, x9
2530 ; CHECK-GI-NOFP16-NEXT: fmov d2, x10
2531 ; CHECK-GI-NOFP16-NEXT: ret
2532 ;
2533 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i64:
2534 ; CHECK-GI-FP16: // %bb.0: // %entry
2535 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2536 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
2537 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
2538 ; CHECK-GI-FP16-NEXT: fcvtzu x8, h0
2539 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h1
2540 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h2
2541 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2542 ; CHECK-GI-FP16-NEXT: fmov d1, x9
2543 ; CHECK-GI-FP16-NEXT: fmov d2, x10
2544 ; CHECK-GI-FP16-NEXT: ret
2545 entry:
2546 %c = fptoui <3 x half> %a to <3 x i64>
2547 ret <3 x i64> %c
2548 }
2550 define <4 x i64> @fptos_v4f16_v4i64(<4 x half> %a) {
2551 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i64:
2552 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2553 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2554 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
2555 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
2556 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
2557 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2558 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2559 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2560 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
2561 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
2562 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
2563 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
2564 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
2565 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2566 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
2567 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
2568 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
2569 ; CHECK-SD-NOFP16-NEXT: ret
2570 ;
2571 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i64:
2572 ; CHECK-SD-FP16: // %bb.0: // %entry
2573 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2574 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
2575 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
2576 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
2577 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
2578 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
2579 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
2580 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
2581 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2582 ; CHECK-SD-FP16-NEXT: fmov d1, x9
2583 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
2584 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
2585 ; CHECK-SD-FP16-NEXT: ret
2586 ;
2587 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i64:
2588 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2589 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2590 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[2]
2591 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[1]
2592 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[3]
2593 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2594 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2595 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2596 ; CHECK-GI-NOFP16-NEXT: fcvt s3, h3
2597 ; CHECK-GI-NOFP16-NEXT: fcvtzs x8, s0
2598 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s1
2599 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s2
2600 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s3
2601 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2602 ; CHECK-GI-NOFP16-NEXT: fmov d1, x9
2603 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x10
2604 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x11
2605 ; CHECK-GI-NOFP16-NEXT: ret
2606 ;
2607 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i64:
2608 ; CHECK-GI-FP16: // %bb.0: // %entry
2609 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2610 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[2]
2611 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
2612 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
2613 ; CHECK-GI-FP16-NEXT: fcvtzs x8, h0
2614 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h1
2615 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h2
2616 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h3
2617 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2618 ; CHECK-GI-FP16-NEXT: fmov d1, x9
2619 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x10
2620 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x11
2621 ; CHECK-GI-FP16-NEXT: ret
2622 entry:
2623 %c = fptosi <4 x half> %a to <4 x i64>
2624 ret <4 x i64> %c
2625 }
2627 define <4 x i64> @fptou_v4f16_v4i64(<4 x half> %a) {
2628 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i64:
2629 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2630 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2631 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
2632 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
2633 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
2634 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2635 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2636 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2637 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
2638 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
2639 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
2640 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
2641 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
2642 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
2643 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
2644 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
2645 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
2646 ; CHECK-SD-NOFP16-NEXT: ret
2647 ;
2648 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i64:
2649 ; CHECK-SD-FP16: // %bb.0: // %entry
2650 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2651 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
2652 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
2653 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
2654 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
2655 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
2656 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
2657 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
2658 ; CHECK-SD-FP16-NEXT: fmov d0, x8
2659 ; CHECK-SD-FP16-NEXT: fmov d1, x9
2660 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
2661 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
2662 ; CHECK-SD-FP16-NEXT: ret
2663 ;
2664 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i64:
2665 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2666 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
2667 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[2]
2668 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[1]
2669 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[3]
2670 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2671 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2672 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2673 ; CHECK-GI-NOFP16-NEXT: fcvt s3, h3
2674 ; CHECK-GI-NOFP16-NEXT: fcvtzu x8, s0
2675 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s1
2676 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s2
2677 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s3
2678 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
2679 ; CHECK-GI-NOFP16-NEXT: fmov d1, x9
2680 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x10
2681 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x11
2682 ; CHECK-GI-NOFP16-NEXT: ret
2683 ;
2684 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i64:
2685 ; CHECK-GI-FP16: // %bb.0: // %entry
2686 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
2687 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[2]
2688 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
2689 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
2690 ; CHECK-GI-FP16-NEXT: fcvtzu x8, h0
2691 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h1
2692 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h2
2693 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h3
2694 ; CHECK-GI-FP16-NEXT: fmov d0, x8
2695 ; CHECK-GI-FP16-NEXT: fmov d1, x9
2696 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x10
2697 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x11
2698 ; CHECK-GI-FP16-NEXT: ret
2699 entry:
2700 %c = fptoui <4 x half> %a to <4 x i64>
2701 ret <4 x i64> %c
2702 }
2704 define <8 x i64> @fptos_v8f16_v8i64(<8 x half> %a) {
2705 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i64:
2706 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2707 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2708 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
2709 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
2710 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
2711 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2712 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
2713 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
2714 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
2715 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2716 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
2717 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
2718 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
2719 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s0
2720 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2721 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
2722 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
2723 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s1
2724 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
2725 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
2726 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s7
2727 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
2728 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
2729 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
2730 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
2731 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
2732 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
2733 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
2734 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
2735 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
2736 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
2737 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
2738 ; CHECK-SD-NOFP16-NEXT: ret
2739 ;
2740 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i64:
2741 ; CHECK-SD-FP16: // %bb.0: // %entry
2742 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2743 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
2744 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
2745 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
2746 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
2747 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
2748 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
2749 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
2750 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h1
2751 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h4
2752 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
2753 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h7
2754 ; CHECK-SD-FP16-NEXT: fmov d0, x9
2755 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
2756 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h5
2757 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
2758 ; CHECK-SD-FP16-NEXT: fmov d2, x8
2759 ; CHECK-SD-FP16-NEXT: fmov d1, x12
2760 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
2761 ; CHECK-SD-FP16-NEXT: fmov d3, x10
2762 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
2763 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
2764 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
2765 ; CHECK-SD-FP16-NEXT: ret
2766 ;
2767 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i64:
2768 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2769 ; CHECK-GI-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2770 ; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[2]
2771 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[1]
2772 ; CHECK-GI-NOFP16-NEXT: mov h7, v0.h[3]
2773 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2774 ; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[2]
2775 ; CHECK-GI-NOFP16-NEXT: mov h5, v1.h[1]
2776 ; CHECK-GI-NOFP16-NEXT: mov h6, v1.h[3]
2777 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2778 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
2779 ; CHECK-GI-NOFP16-NEXT: fcvt s3, h3
2780 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h7
2781 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s0
2782 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2783 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
2784 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h6
2785 ; CHECK-GI-NOFP16-NEXT: fcvtzs x8, s1
2786 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s4
2787 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s3
2788 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s7
2789 ; CHECK-GI-NOFP16-NEXT: fmov d0, x9
2790 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s2
2791 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s5
2792 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s6
2793 ; CHECK-GI-NOFP16-NEXT: fmov d2, x8
2794 ; CHECK-GI-NOFP16-NEXT: fmov d1, x12
2795 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
2796 ; CHECK-GI-NOFP16-NEXT: fmov d3, x10
2797 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x13
2798 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x15
2799 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x14
2800 ; CHECK-GI-NOFP16-NEXT: ret
2801 ;
2802 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i64:
2803 ; CHECK-GI-FP16: // %bb.0: // %entry
2804 ; CHECK-GI-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2805 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
2806 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
2807 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[3]
2808 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h0
2809 ; CHECK-GI-FP16-NEXT: mov h2, v1.h[2]
2810 ; CHECK-GI-FP16-NEXT: mov h5, v1.h[1]
2811 ; CHECK-GI-FP16-NEXT: mov h6, v1.h[3]
2812 ; CHECK-GI-FP16-NEXT: fcvtzs x8, h1
2813 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h4
2814 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h3
2815 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h7
2816 ; CHECK-GI-FP16-NEXT: fmov d0, x9
2817 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h2
2818 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h5
2819 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h6
2820 ; CHECK-GI-FP16-NEXT: fmov d2, x8
2821 ; CHECK-GI-FP16-NEXT: fmov d1, x12
2822 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x11
2823 ; CHECK-GI-FP16-NEXT: fmov d3, x10
2824 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x13
2825 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x15
2826 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x14
2827 ; CHECK-GI-FP16-NEXT: ret
2828 entry:
2829 %c = fptosi <8 x half> %a to <8 x i64>
2830 ret <8 x i64> %c
2831 }
2833 define <8 x i64> @fptou_v8f16_v8i64(<8 x half> %a) {
2834 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i64:
2835 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2836 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2837 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
2838 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
2839 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
2840 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2841 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
2842 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
2843 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
2844 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2845 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
2846 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
2847 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
2848 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s0
2849 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
2850 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
2851 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
2852 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s1
2853 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
2854 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
2855 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s7
2856 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
2857 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
2858 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
2859 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
2860 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
2861 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
2862 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
2863 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
2864 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
2865 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
2866 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
2867 ; CHECK-SD-NOFP16-NEXT: ret
2868 ;
2869 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i64:
2870 ; CHECK-SD-FP16: // %bb.0: // %entry
2871 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2872 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
2873 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
2874 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
2875 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
2876 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
2877 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
2878 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
2879 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h1
2880 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h4
2881 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
2882 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h7
2883 ; CHECK-SD-FP16-NEXT: fmov d0, x9
2884 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
2885 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h5
2886 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
2887 ; CHECK-SD-FP16-NEXT: fmov d2, x8
2888 ; CHECK-SD-FP16-NEXT: fmov d1, x12
2889 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
2890 ; CHECK-SD-FP16-NEXT: fmov d3, x10
2891 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
2892 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
2893 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
2894 ; CHECK-SD-FP16-NEXT: ret
2895 ;
2896 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i64:
2897 ; CHECK-GI-NOFP16: // %bb.0: // %entry
2898 ; CHECK-GI-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2899 ; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[2]
2900 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[1]
2901 ; CHECK-GI-NOFP16-NEXT: mov h7, v0.h[3]
2902 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
2903 ; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[2]
2904 ; CHECK-GI-NOFP16-NEXT: mov h5, v1.h[1]
2905 ; CHECK-GI-NOFP16-NEXT: mov h6, v1.h[3]
2906 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
2907 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
2908 ; CHECK-GI-NOFP16-NEXT: fcvt s3, h3
2909 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h7
2910 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s0
2911 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
2912 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
2913 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h6
2914 ; CHECK-GI-NOFP16-NEXT: fcvtzu x8, s1
2915 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s4
2916 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s3
2917 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s7
2918 ; CHECK-GI-NOFP16-NEXT: fmov d0, x9
2919 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s2
2920 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s5
2921 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s6
2922 ; CHECK-GI-NOFP16-NEXT: fmov d2, x8
2923 ; CHECK-GI-NOFP16-NEXT: fmov d1, x12
2924 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
2925 ; CHECK-GI-NOFP16-NEXT: fmov d3, x10
2926 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x13
2927 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x15
2928 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x14
2929 ; CHECK-GI-NOFP16-NEXT: ret
2930 ;
2931 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i64:
2932 ; CHECK-GI-FP16: // %bb.0: // %entry
2933 ; CHECK-GI-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
2934 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
2935 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
2936 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[3]
2937 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h0
2938 ; CHECK-GI-FP16-NEXT: mov h2, v1.h[2]
2939 ; CHECK-GI-FP16-NEXT: mov h5, v1.h[1]
2940 ; CHECK-GI-FP16-NEXT: mov h6, v1.h[3]
2941 ; CHECK-GI-FP16-NEXT: fcvtzu x8, h1
2942 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h4
2943 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h3
2944 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h7
2945 ; CHECK-GI-FP16-NEXT: fmov d0, x9
2946 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h2
2947 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h5
2948 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h6
2949 ; CHECK-GI-FP16-NEXT: fmov d2, x8
2950 ; CHECK-GI-FP16-NEXT: fmov d1, x12
2951 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x11
2952 ; CHECK-GI-FP16-NEXT: fmov d3, x10
2953 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x13
2954 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x15
2955 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x14
2956 ; CHECK-GI-FP16-NEXT: ret
2957 entry:
2958 %c = fptoui <8 x half> %a to <8 x i64>
2959 ret <8 x i64> %c
2960 }
2962 define <16 x i64> @fptos_v16f16_v16i64(<16 x half> %a) {
2963 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i64:
2964 ; CHECK-SD-NOFP16: // %bb.0: // %entry
2965 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
2966 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
2967 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
2968 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
2969 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
2970 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
2971 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
2972 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
2973 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
2974 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
2975 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
2976 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
2977 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s5
2978 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
2979 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
2980 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
2981 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
2982 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s6
2983 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
2984 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
2985 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
2986 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
2987 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
2988 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
2989 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s4
2990 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
2991 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
2992 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
2993 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
2994 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s7
2995 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s6
2996 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
2997 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
2998 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s17
2999 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
3000 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
3001 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
3002 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
3003 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
3004 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
3005 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
3006 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
3007 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
3008 ; CHECK-SD-NOFP16-NEXT: fcvtzs x16, s5
3009 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s7
3010 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
3011 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
3012 ; CHECK-SD-NOFP16-NEXT: fcvtzs x17, s17
3013 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s4
3014 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
3015 ; CHECK-SD-NOFP16-NEXT: fcvtzs x18, s19
3016 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
3017 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
3018 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
3019 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
3020 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
3021 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
3022 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
3023 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
3024 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
3025 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
3026 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
3027 ; CHECK-SD-NOFP16-NEXT: ret
3028 ;
3029 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i64:
3030 ; CHECK-SD-FP16: // %bb.0: // %entry
3031 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3032 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3033 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
3034 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
3035 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
3036 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
3037 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
3038 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
3039 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
3040 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
3041 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h4
3042 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
3043 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
3044 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h5
3045 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
3046 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
3047 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h3
3048 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
3049 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
3050 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
3051 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
3052 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h16
3053 ; CHECK-SD-FP16-NEXT: fcvtzs x16, h0
3054 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h4
3055 ; CHECK-SD-FP16-NEXT: fcvtzs x17, h7
3056 ; CHECK-SD-FP16-NEXT: fmov d2, x11
3057 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h5
3058 ; CHECK-SD-FP16-NEXT: fcvtzs x18, h17
3059 ; CHECK-SD-FP16-NEXT: fmov d6, x13
3060 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h18
3061 ; CHECK-SD-FP16-NEXT: fmov d0, x8
3062 ; CHECK-SD-FP16-NEXT: fmov d4, x9
3063 ; CHECK-SD-FP16-NEXT: fmov d3, x14
3064 ; CHECK-SD-FP16-NEXT: fmov d7, x15
3065 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
3066 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h1
3067 ; CHECK-SD-FP16-NEXT: fmov d1, x12
3068 ; CHECK-SD-FP16-NEXT: fmov d5, x0
3069 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
3070 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
3071 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
3072 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
3073 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
3074 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
3075 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
3076 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
3077 ; CHECK-SD-FP16-NEXT: ret
3078 ;
3079 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i64:
3080 ; CHECK-GI-NOFP16: // %bb.0: // %entry
3081 ; CHECK-GI-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3082 ; CHECK-GI-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3083 ; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[1]
3084 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h0
3085 ; CHECK-GI-NOFP16-NEXT: mov h18, v0.h[2]
3086 ; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[3]
3087 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h2
3088 ; CHECK-GI-NOFP16-NEXT: mov h7, v2.h[1]
3089 ; CHECK-GI-NOFP16-NEXT: mov h16, v2.h[2]
3090 ; CHECK-GI-NOFP16-NEXT: mov h17, v3.h[2]
3091 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h3
3092 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
3093 ; CHECK-GI-NOFP16-NEXT: fcvtzs x8, s5
3094 ; CHECK-GI-NOFP16-NEXT: mov h5, v1.h[1]
3095 ; CHECK-GI-NOFP16-NEXT: mov h2, v2.h[3]
3096 ; CHECK-GI-NOFP16-NEXT: fcvt s18, h18
3097 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
3098 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s6
3099 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h7
3100 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h16
3101 ; CHECK-GI-NOFP16-NEXT: mov h16, v1.h[2]
3102 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h17
3103 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s19
3104 ; CHECK-GI-NOFP16-NEXT: mov h19, v3.h[1]
3105 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s4
3106 ; CHECK-GI-NOFP16-NEXT: mov h4, v1.h[3]
3107 ; CHECK-GI-NOFP16-NEXT: mov h3, v3.h[3]
3108 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
3109 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
3110 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s7
3111 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s6
3112 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s18
3113 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h16
3114 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s17
3115 ; CHECK-GI-NOFP16-NEXT: fcvt s16, h2
3116 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h19
3117 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
3118 ; CHECK-GI-NOFP16-NEXT: fmov d2, x9
3119 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h3
3120 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s1
3121 ; CHECK-GI-NOFP16-NEXT: fmov d6, x10
3122 ; CHECK-GI-NOFP16-NEXT: fmov d3, x13
3123 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s0
3124 ; CHECK-GI-NOFP16-NEXT: fcvtzs x16, s5
3125 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s7
3126 ; CHECK-GI-NOFP16-NEXT: fmov d7, x14
3127 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s16
3128 ; CHECK-GI-NOFP16-NEXT: fcvtzs x17, s17
3129 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s4
3130 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
3131 ; CHECK-GI-NOFP16-NEXT: fcvtzs x18, s19
3132 ; CHECK-GI-NOFP16-NEXT: fmov d1, x15
3133 ; CHECK-GI-NOFP16-NEXT: fmov d4, x9
3134 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x12
3135 ; CHECK-GI-NOFP16-NEXT: fmov d5, x10
3136 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
3137 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x14
3138 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x13
3139 ; CHECK-GI-NOFP16-NEXT: mov v4.d[1], x16
3140 ; CHECK-GI-NOFP16-NEXT: mov v6.d[1], x17
3141 ; CHECK-GI-NOFP16-NEXT: mov v7.d[1], x18
3142 ; CHECK-GI-NOFP16-NEXT: mov v5.d[1], x0
3143 ; CHECK-GI-NOFP16-NEXT: ret
3144 ;
3145 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i64:
3146 ; CHECK-GI-FP16: // %bb.0: // %entry
3147 ; CHECK-GI-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3148 ; CHECK-GI-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3149 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
3150 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
3151 ; CHECK-GI-FP16-NEXT: fcvtzs x8, h0
3152 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[3]
3153 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h1
3154 ; CHECK-GI-FP16-NEXT: mov h7, v1.h[1]
3155 ; CHECK-GI-FP16-NEXT: mov h6, v2.h[2]
3156 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
3157 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h4
3158 ; CHECK-GI-FP16-NEXT: mov h4, v1.h[2]
3159 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h2
3160 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h5
3161 ; CHECK-GI-FP16-NEXT: mov h5, v2.h[1]
3162 ; CHECK-GI-FP16-NEXT: mov h17, v2.h[3]
3163 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h3
3164 ; CHECK-GI-FP16-NEXT: mov h18, v3.h[1]
3165 ; CHECK-GI-FP16-NEXT: mov h1, v1.h[3]
3166 ; CHECK-GI-FP16-NEXT: mov h19, v3.h[3]
3167 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h6
3168 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h16
3169 ; CHECK-GI-FP16-NEXT: fcvtzs x16, h0
3170 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h4
3171 ; CHECK-GI-FP16-NEXT: fcvtzs x17, h7
3172 ; CHECK-GI-FP16-NEXT: fmov d2, x11
3173 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h5
3174 ; CHECK-GI-FP16-NEXT: fcvtzs x18, h17
3175 ; CHECK-GI-FP16-NEXT: fmov d6, x13
3176 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h18
3177 ; CHECK-GI-FP16-NEXT: fmov d0, x8
3178 ; CHECK-GI-FP16-NEXT: fmov d4, x9
3179 ; CHECK-GI-FP16-NEXT: fmov d3, x14
3180 ; CHECK-GI-FP16-NEXT: fmov d7, x15
3181 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h19
3182 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h1
3183 ; CHECK-GI-FP16-NEXT: fmov d1, x12
3184 ; CHECK-GI-FP16-NEXT: fmov d5, x0
3185 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x10
3186 ; CHECK-GI-FP16-NEXT: mov v4.d[1], x17
3187 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x11
3188 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x18
3189 ; CHECK-GI-FP16-NEXT: mov v6.d[1], x13
3190 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x16
3191 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x14
3192 ; CHECK-GI-FP16-NEXT: mov v5.d[1], x15
3193 ; CHECK-GI-FP16-NEXT: ret
3194 entry:
3195 %c = fptosi <16 x half> %a to <16 x i64>
3196 ret <16 x i64> %c
3197 }
3199 define <16 x i64> @fptou_v16f16_v16i64(<16 x half> %a) {
3200 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i64:
3201 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3202 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3203 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3204 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
3205 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
3206 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
3207 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
3208 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
3209 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
3210 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
3211 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
3212 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
3213 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
3214 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s5
3215 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
3216 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
3217 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
3218 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
3219 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s6
3220 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
3221 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
3222 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
3223 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
3224 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
3225 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
3226 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s4
3227 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
3228 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
3229 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3230 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
3231 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s7
3232 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s6
3233 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
3234 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
3235 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s17
3236 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
3237 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
3238 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
3239 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
3240 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
3241 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
3242 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
3243 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
3244 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
3245 ; CHECK-SD-NOFP16-NEXT: fcvtzu x16, s5
3246 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s7
3247 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
3248 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
3249 ; CHECK-SD-NOFP16-NEXT: fcvtzu x17, s17
3250 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s4
3251 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
3252 ; CHECK-SD-NOFP16-NEXT: fcvtzu x18, s19
3253 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
3254 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
3255 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
3256 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
3257 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
3258 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
3259 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
3260 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
3261 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
3262 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
3263 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
3264 ; CHECK-SD-NOFP16-NEXT: ret
3265 ;
3266 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i64:
3267 ; CHECK-SD-FP16: // %bb.0: // %entry
3268 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3269 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3270 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
3271 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
3272 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
3273 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
3274 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
3275 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
3276 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
3277 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
3278 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h4
3279 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
3280 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
3281 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h5
3282 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
3283 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
3284 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h3
3285 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
3286 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
3287 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
3288 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
3289 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h16
3290 ; CHECK-SD-FP16-NEXT: fcvtzu x16, h0
3291 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h4
3292 ; CHECK-SD-FP16-NEXT: fcvtzu x17, h7
3293 ; CHECK-SD-FP16-NEXT: fmov d2, x11
3294 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h5
3295 ; CHECK-SD-FP16-NEXT: fcvtzu x18, h17
3296 ; CHECK-SD-FP16-NEXT: fmov d6, x13
3297 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h18
3298 ; CHECK-SD-FP16-NEXT: fmov d0, x8
3299 ; CHECK-SD-FP16-NEXT: fmov d4, x9
3300 ; CHECK-SD-FP16-NEXT: fmov d3, x14
3301 ; CHECK-SD-FP16-NEXT: fmov d7, x15
3302 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
3303 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h1
3304 ; CHECK-SD-FP16-NEXT: fmov d1, x12
3305 ; CHECK-SD-FP16-NEXT: fmov d5, x0
3306 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
3307 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
3308 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
3309 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
3310 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
3311 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
3312 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
3313 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
3314 ; CHECK-SD-FP16-NEXT: ret
3315 ;
3316 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i64:
3317 ; CHECK-GI-NOFP16: // %bb.0: // %entry
3318 ; CHECK-GI-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3319 ; CHECK-GI-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3320 ; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[1]
3321 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h0
3322 ; CHECK-GI-NOFP16-NEXT: mov h18, v0.h[2]
3323 ; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[3]
3324 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h2
3325 ; CHECK-GI-NOFP16-NEXT: mov h7, v2.h[1]
3326 ; CHECK-GI-NOFP16-NEXT: mov h16, v2.h[2]
3327 ; CHECK-GI-NOFP16-NEXT: mov h17, v3.h[2]
3328 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h3
3329 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
3330 ; CHECK-GI-NOFP16-NEXT: fcvtzu x8, s5
3331 ; CHECK-GI-NOFP16-NEXT: mov h5, v1.h[1]
3332 ; CHECK-GI-NOFP16-NEXT: mov h2, v2.h[3]
3333 ; CHECK-GI-NOFP16-NEXT: fcvt s18, h18
3334 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
3335 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s6
3336 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h7
3337 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h16
3338 ; CHECK-GI-NOFP16-NEXT: mov h16, v1.h[2]
3339 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h17
3340 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s19
3341 ; CHECK-GI-NOFP16-NEXT: mov h19, v3.h[1]
3342 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s4
3343 ; CHECK-GI-NOFP16-NEXT: mov h4, v1.h[3]
3344 ; CHECK-GI-NOFP16-NEXT: mov h3, v3.h[3]
3345 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
3346 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
3347 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s7
3348 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s6
3349 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s18
3350 ; CHECK-GI-NOFP16-NEXT: fcvt s7, h16
3351 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s17
3352 ; CHECK-GI-NOFP16-NEXT: fcvt s16, h2
3353 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h19
3354 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
3355 ; CHECK-GI-NOFP16-NEXT: fmov d2, x9
3356 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h3
3357 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s1
3358 ; CHECK-GI-NOFP16-NEXT: fmov d6, x10
3359 ; CHECK-GI-NOFP16-NEXT: fmov d3, x13
3360 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s0
3361 ; CHECK-GI-NOFP16-NEXT: fcvtzu x16, s5
3362 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s7
3363 ; CHECK-GI-NOFP16-NEXT: fmov d7, x14
3364 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s16
3365 ; CHECK-GI-NOFP16-NEXT: fcvtzu x17, s17
3366 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s4
3367 ; CHECK-GI-NOFP16-NEXT: fmov d0, x8
3368 ; CHECK-GI-NOFP16-NEXT: fcvtzu x18, s19
3369 ; CHECK-GI-NOFP16-NEXT: fmov d1, x15
3370 ; CHECK-GI-NOFP16-NEXT: fmov d4, x9
3371 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x12
3372 ; CHECK-GI-NOFP16-NEXT: fmov d5, x10
3373 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
3374 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x14
3375 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x13
3376 ; CHECK-GI-NOFP16-NEXT: mov v4.d[1], x16
3377 ; CHECK-GI-NOFP16-NEXT: mov v6.d[1], x17
3378 ; CHECK-GI-NOFP16-NEXT: mov v7.d[1], x18
3379 ; CHECK-GI-NOFP16-NEXT: mov v5.d[1], x0
3380 ; CHECK-GI-NOFP16-NEXT: ret
3381 ;
3382 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i64:
3383 ; CHECK-GI-FP16: // %bb.0: // %entry
3384 ; CHECK-GI-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
3385 ; CHECK-GI-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
3386 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
3387 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
3388 ; CHECK-GI-FP16-NEXT: fcvtzu x8, h0
3389 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[3]
3390 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h1
3391 ; CHECK-GI-FP16-NEXT: mov h7, v1.h[1]
3392 ; CHECK-GI-FP16-NEXT: mov h6, v2.h[2]
3393 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
3394 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h4
3395 ; CHECK-GI-FP16-NEXT: mov h4, v1.h[2]
3396 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h2
3397 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h5
3398 ; CHECK-GI-FP16-NEXT: mov h5, v2.h[1]
3399 ; CHECK-GI-FP16-NEXT: mov h17, v2.h[3]
3400 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h3
3401 ; CHECK-GI-FP16-NEXT: mov h18, v3.h[1]
3402 ; CHECK-GI-FP16-NEXT: mov h1, v1.h[3]
3403 ; CHECK-GI-FP16-NEXT: mov h19, v3.h[3]
3404 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h6
3405 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h16
3406 ; CHECK-GI-FP16-NEXT: fcvtzu x16, h0
3407 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h4
3408 ; CHECK-GI-FP16-NEXT: fcvtzu x17, h7
3409 ; CHECK-GI-FP16-NEXT: fmov d2, x11
3410 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h5
3411 ; CHECK-GI-FP16-NEXT: fcvtzu x18, h17
3412 ; CHECK-GI-FP16-NEXT: fmov d6, x13
3413 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h18
3414 ; CHECK-GI-FP16-NEXT: fmov d0, x8
3415 ; CHECK-GI-FP16-NEXT: fmov d4, x9
3416 ; CHECK-GI-FP16-NEXT: fmov d3, x14
3417 ; CHECK-GI-FP16-NEXT: fmov d7, x15
3418 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h19
3419 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h1
3420 ; CHECK-GI-FP16-NEXT: fmov d1, x12
3421 ; CHECK-GI-FP16-NEXT: fmov d5, x0
3422 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x10
3423 ; CHECK-GI-FP16-NEXT: mov v4.d[1], x17
3424 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x11
3425 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x18
3426 ; CHECK-GI-FP16-NEXT: mov v6.d[1], x13
3427 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x16
3428 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x14
3429 ; CHECK-GI-FP16-NEXT: mov v5.d[1], x15
3430 ; CHECK-GI-FP16-NEXT: ret
3431 entry:
3432 %c = fptoui <16 x half> %a to <16 x i64>
3433 ret <16 x i64> %c
3434 }
3436 define <32 x i64> @fptos_v32f16_v32i64(<32 x half> %a) {
3437 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i64:
3438 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3439 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
3440 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
3441 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
3442 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
3443 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
3444 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
3445 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
3446 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
3447 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
3448 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
3449 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
3450 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
3451 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
3452 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
3453 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
3454 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
3455 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s21
3456 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
3457 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
3458 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
3459 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
3460 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
3461 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
3462 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
3463 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
3464 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
3465 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s24
3466 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
3467 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
3468 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
3469 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
3470 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
3471 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s22
3472 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
3473 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
3474 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
3475 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s17
3476 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
3477 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
3478 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
3479 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
3480 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
3481 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
3482 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
3483 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
3484 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
3485 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s21
3486 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
3487 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
3488 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s22
3489 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s27
3490 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
3491 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
3492 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
3493 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
3494 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
3495 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3496 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
3497 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s24
3498 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
3499 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
3500 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
3501 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
3502 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
3503 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s21
3504 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
3505 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
3506 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
3507 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
3508 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
3509 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
3510 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s1
3511 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
3512 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
3513 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
3514 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
3515 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
3516 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
3517 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
3518 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
3519 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
3520 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
3521 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
3522 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
3523 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3524 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
3525 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
3526 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
3527 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
3528 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
3529 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s20
3530 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
3531 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
3532 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
3533 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
3534 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
3535 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
3536 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
3537 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
3538 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
3539 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
3540 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
3541 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s6
3542 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
3543 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
3544 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s5
3545 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
3546 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
3547 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s22
3548 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
3549 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
3550 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
3551 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
3552 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s24
3553 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
3554 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
3555 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
3556 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
3557 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
3558 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
3559 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
3560 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
3561 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
3562 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
3563 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
3564 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
3565 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
3566 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
3567 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
3568 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
3569 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
3570 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
3571 ; CHECK-SD-NOFP16-NEXT: ret
3572 ;
3573 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i64:
3574 ; CHECK-SD-FP16: // %bb.0: // %entry
3575 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
3576 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
3577 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
3578 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
3579 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
3580 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
3581 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
3582 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h3
3583 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
3584 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
3585 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
3586 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
3587 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
3588 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
3589 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
3590 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h5
3591 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h16
3592 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h6
3593 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
3594 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
3595 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h17
3596 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h18
3597 ; CHECK-SD-FP16-NEXT: fmov d18, x9
3598 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h22
3599 ; CHECK-SD-FP16-NEXT: fmov d3, x10
3600 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h23
3601 ; CHECK-SD-FP16-NEXT: fmov d22, x12
3602 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h25
3603 ; CHECK-SD-FP16-NEXT: fmov d23, x15
3604 ; CHECK-SD-FP16-NEXT: fmov d16, x11
3605 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
3606 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
3607 ; CHECK-SD-FP16-NEXT: fmov d2, x13
3608 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h24
3609 ; CHECK-SD-FP16-NEXT: fmov d17, x14
3610 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
3611 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
3612 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
3613 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
3614 ; CHECK-SD-FP16-NEXT: fmov d19, x9
3615 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h26
3616 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
3617 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
3618 ; CHECK-SD-FP16-NEXT: fmov d21, x11
3619 ; CHECK-SD-FP16-NEXT: fmov d1, x13
3620 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h7
3621 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
3622 ; CHECK-SD-FP16-NEXT: fmov d7, x14
3623 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
3624 ; CHECK-SD-FP16-NEXT: fmov d22, x10
3625 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
3626 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
3627 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
3628 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h20
3629 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
3630 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3631 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
3632 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
3633 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
3634 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h24
3635 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
3636 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
3637 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
3638 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
3639 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
3640 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h0
3641 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
3642 ; CHECK-SD-FP16-NEXT: fmov d7, x9
3643 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h23
3644 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
3645 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
3646 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h6
3647 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
3648 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h5
3649 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
3650 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
3651 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
3652 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
3653 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
3654 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h4
3655 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
3656 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
3657 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
3658 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h22
3659 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
3660 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
3661 ; CHECK-SD-FP16-NEXT: fmov d4, x11
3662 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
3663 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h0
3664 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
3665 ; CHECK-SD-FP16-NEXT: fmov d0, x9
3666 ; CHECK-SD-FP16-NEXT: fmov d1, x12
3667 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
3668 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
3669 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
3670 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
3671 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
3672 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
3673 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
3674 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
3675 ; CHECK-SD-FP16-NEXT: ret
3676 ;
3677 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i64:
3678 ; CHECK-GI-NOFP16: // %bb.0: // %entry
3679 ; CHECK-GI-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
3680 ; CHECK-GI-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
3681 ; CHECK-GI-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
3682 ; CHECK-GI-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
3683 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h1
3684 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h2
3685 ; CHECK-GI-NOFP16-NEXT: mov h26, v2.h[2]
3686 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h0
3687 ; CHECK-GI-NOFP16-NEXT: mov h27, v3.h[2]
3688 ; CHECK-GI-NOFP16-NEXT: mov h20, v2.h[1]
3689 ; CHECK-GI-NOFP16-NEXT: mov h18, v1.h[1]
3690 ; CHECK-GI-NOFP16-NEXT: mov h16, v4.h[2]
3691 ; CHECK-GI-NOFP16-NEXT: mov h17, v5.h[2]
3692 ; CHECK-GI-NOFP16-NEXT: fcvt s23, h5
3693 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h6
3694 ; CHECK-GI-NOFP16-NEXT: mov h25, v6.h[2]
3695 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s21
3696 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s22
3697 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h7
3698 ; CHECK-GI-NOFP16-NEXT: mov h21, v3.h[3]
3699 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s19
3700 ; CHECK-GI-NOFP16-NEXT: fcvt s27, h27
3701 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
3702 ; CHECK-GI-NOFP16-NEXT: fcvt s16, h16
3703 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h17
3704 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s23
3705 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s24
3706 ; CHECK-GI-NOFP16-NEXT: fcvt s23, h25
3707 ; CHECK-GI-NOFP16-NEXT: fcvt s25, h26
3708 ; CHECK-GI-NOFP16-NEXT: mov h26, v3.h[1]
3709 ; CHECK-GI-NOFP16-NEXT: mov h24, v2.h[3]
3710 ; CHECK-GI-NOFP16-NEXT: fmov d19, x9
3711 ; CHECK-GI-NOFP16-NEXT: fcvtzs x9, s22
3712 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h3
3713 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h21
3714 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s16
3715 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s17
3716 ; CHECK-GI-NOFP16-NEXT: fmov d2, x12
3717 ; CHECK-GI-NOFP16-NEXT: fmov d16, x13
3718 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s23
3719 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s25
3720 ; CHECK-GI-NOFP16-NEXT: mov h23, v1.h[2]
3721 ; CHECK-GI-NOFP16-NEXT: fcvt s25, h26
3722 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h24
3723 ; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[3]
3724 ; CHECK-GI-NOFP16-NEXT: fmov d26, x11
3725 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s21
3726 ; CHECK-GI-NOFP16-NEXT: fmov d3, x14
3727 ; CHECK-GI-NOFP16-NEXT: fmov d17, x15
3728 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s22
3729 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s27
3730 ; CHECK-GI-NOFP16-NEXT: mov h22, v0.h[2]
3731 ; CHECK-GI-NOFP16-NEXT: fcvt s18, h18
3732 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h23
3733 ; CHECK-GI-NOFP16-NEXT: fmov d23, x13
3734 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s25
3735 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
3736 ; CHECK-GI-NOFP16-NEXT: fmov d25, x14
3737 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s24
3738 ; CHECK-GI-NOFP16-NEXT: fmov d24, x15
3739 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h22
3740 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s18
3741 ; CHECK-GI-NOFP16-NEXT: mov h18, v7.h[1]
3742 ; CHECK-GI-NOFP16-NEXT: mov v25.d[1], x13
3743 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s21
3744 ; CHECK-GI-NOFP16-NEXT: mov h21, v7.h[2]
3745 ; CHECK-GI-NOFP16-NEXT: mov v24.d[1], x11
3746 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s20
3747 ; CHECK-GI-NOFP16-NEXT: mov h20, v0.h[1]
3748 ; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[3]
3749 ; CHECK-GI-NOFP16-NEXT: mov v23.d[1], x14
3750 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s1
3751 ; CHECK-GI-NOFP16-NEXT: mov h1, v6.h[3]
3752 ; CHECK-GI-NOFP16-NEXT: mov h6, v6.h[1]
3753 ; CHECK-GI-NOFP16-NEXT: mov v19.d[1], x15
3754 ; CHECK-GI-NOFP16-NEXT: mov h7, v7.h[3]
3755 ; CHECK-GI-NOFP16-NEXT: stp q25, q24, [x8, #192]
3756 ; CHECK-GI-NOFP16-NEXT: fmov d24, x13
3757 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
3758 ; CHECK-GI-NOFP16-NEXT: mov v26.d[1], x11
3759 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s22
3760 ; CHECK-GI-NOFP16-NEXT: mov h22, v5.h[1]
3761 ; CHECK-GI-NOFP16-NEXT: mov h5, v5.h[3]
3762 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
3763 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
3764 ; CHECK-GI-NOFP16-NEXT: mov v24.d[1], x14
3765 ; CHECK-GI-NOFP16-NEXT: mov h25, v4.h[3]
3766 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h6
3767 ; CHECK-GI-NOFP16-NEXT: stp q26, q23, [x8, #128]
3768 ; CHECK-GI-NOFP16-NEXT: fmov d23, x12
3769 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s20
3770 ; CHECK-GI-NOFP16-NEXT: mov h20, v4.h[1]
3771 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
3772 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s0
3773 ; CHECK-GI-NOFP16-NEXT: stp q19, q24, [x8, #64]
3774 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h22
3775 ; CHECK-GI-NOFP16-NEXT: fmov d0, x10
3776 ; CHECK-GI-NOFP16-NEXT: fmov d19, x11
3777 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
3778 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s1
3779 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h21
3780 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h25
3781 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s6
3782 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
3783 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h7
3784 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s5
3785 ; CHECK-GI-NOFP16-NEXT: mov v19.d[1], x13
3786 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h18
3787 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s22
3788 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x12
3789 ; CHECK-GI-NOFP16-NEXT: fcvtzs x12, s4
3790 ; CHECK-GI-NOFP16-NEXT: mov v23.d[1], x10
3791 ; CHECK-GI-NOFP16-NEXT: fcvtzs x10, s1
3792 ; CHECK-GI-NOFP16-NEXT: fcvtzs x15, s24
3793 ; CHECK-GI-NOFP16-NEXT: mov v16.d[1], x11
3794 ; CHECK-GI-NOFP16-NEXT: fcvtzs x11, s20
3795 ; CHECK-GI-NOFP16-NEXT: mov v17.d[1], x14
3796 ; CHECK-GI-NOFP16-NEXT: fcvtzs x14, s6
3797 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x13
3798 ; CHECK-GI-NOFP16-NEXT: fcvtzs x13, s5
3799 ; CHECK-GI-NOFP16-NEXT: fmov d4, x9
3800 ; CHECK-GI-NOFP16-NEXT: stp q0, q19, [x8]
3801 ; CHECK-GI-NOFP16-NEXT: fmov d0, x12
3802 ; CHECK-GI-NOFP16-NEXT: stp q16, q23, [x8, #224]
3803 ; CHECK-GI-NOFP16-NEXT: fmov d1, x10
3804 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x15
3805 ; CHECK-GI-NOFP16-NEXT: stp q2, q17, [x8, #160]
3806 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
3807 ; CHECK-GI-NOFP16-NEXT: mov v4.d[1], x13
3808 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x14
3809 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #96]
3810 ; CHECK-GI-NOFP16-NEXT: stp q4, q1, [x8, #32]
3811 ; CHECK-GI-NOFP16-NEXT: ret
3812 ;
3813 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i64:
3814 ; CHECK-GI-FP16: // %bb.0: // %entry
3815 ; CHECK-GI-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
3816 ; CHECK-GI-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
3817 ; CHECK-GI-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
3818 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
3819 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h0
3820 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[3]
3821 ; CHECK-GI-FP16-NEXT: mov h25, v3.h[1]
3822 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h3
3823 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[2]
3824 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[2]
3825 ; CHECK-GI-FP16-NEXT: mov h21, v2.h[1]
3826 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[3]
3827 ; CHECK-GI-FP16-NEXT: mov h17, v4.h[2]
3828 ; CHECK-GI-FP16-NEXT: mov h18, v5.h[2]
3829 ; CHECK-GI-FP16-NEXT: mov h22, v6.h[2]
3830 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h5
3831 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h16
3832 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h6
3833 ; CHECK-GI-FP16-NEXT: mov h7, v1.h[1]
3834 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[3]
3835 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h17
3836 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h18
3837 ; CHECK-GI-FP16-NEXT: fmov d18, x9
3838 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h22
3839 ; CHECK-GI-FP16-NEXT: fmov d3, x10
3840 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h23
3841 ; CHECK-GI-FP16-NEXT: fmov d22, x12
3842 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h25
3843 ; CHECK-GI-FP16-NEXT: fmov d23, x15
3844 ; CHECK-GI-FP16-NEXT: fmov d16, x11
3845 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h2
3846 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h21
3847 ; CHECK-GI-FP16-NEXT: fmov d2, x13
3848 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h24
3849 ; CHECK-GI-FP16-NEXT: fmov d17, x14
3850 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h19
3851 ; CHECK-GI-FP16-NEXT: mov v22.d[1], x10
3852 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h1
3853 ; CHECK-GI-FP16-NEXT: mov v23.d[1], x12
3854 ; CHECK-GI-FP16-NEXT: fmov d19, x9
3855 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h26
3856 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h20
3857 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[2]
3858 ; CHECK-GI-FP16-NEXT: fmov d21, x11
3859 ; CHECK-GI-FP16-NEXT: fmov d1, x13
3860 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h7
3861 ; CHECK-GI-FP16-NEXT: mov h24, v0.h[3]
3862 ; CHECK-GI-FP16-NEXT: fmov d7, x14
3863 ; CHECK-GI-FP16-NEXT: stp q23, q22, [x8, #192]
3864 ; CHECK-GI-FP16-NEXT: fmov d22, x10
3865 ; CHECK-GI-FP16-NEXT: mov v21.d[1], x15
3866 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x9
3867 ; CHECK-GI-FP16-NEXT: mov h23, v0.h[1]
3868 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h20
3869 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x12
3870 ; CHECK-GI-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3871 ; CHECK-GI-FP16-NEXT: mov h20, v6.h[3]
3872 ; CHECK-GI-FP16-NEXT: mov v22.d[1], x13
3873 ; CHECK-GI-FP16-NEXT: mov h6, v6.h[1]
3874 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h24
3875 ; CHECK-GI-FP16-NEXT: stp q21, q1, [x8, #128]
3876 ; CHECK-GI-FP16-NEXT: mov h1, v5.h[1]
3877 ; CHECK-GI-FP16-NEXT: mov h5, v5.h[3]
3878 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h20
3879 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[2]
3880 ; CHECK-GI-FP16-NEXT: fcvtzs x11, h0
3881 ; CHECK-GI-FP16-NEXT: stp q22, q7, [x8, #64]
3882 ; CHECK-GI-FP16-NEXT: fmov d7, x9
3883 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h23
3884 ; CHECK-GI-FP16-NEXT: mov h21, v4.h[3]
3885 ; CHECK-GI-FP16-NEXT: mov h22, v4.h[1]
3886 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h6
3887 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
3888 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h5
3889 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[1]
3890 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x10
3891 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h1
3892 ; CHECK-GI-FP16-NEXT: mov v19.d[1], x12
3893 ; CHECK-GI-FP16-NEXT: mov v18.d[1], x9
3894 ; CHECK-GI-FP16-NEXT: fcvtzs x9, h4
3895 ; CHECK-GI-FP16-NEXT: fcvtzs x12, h20
3896 ; CHECK-GI-FP16-NEXT: fcvtzs x15, h21
3897 ; CHECK-GI-FP16-NEXT: mov v16.d[1], x13
3898 ; CHECK-GI-FP16-NEXT: fcvtzs x13, h22
3899 ; CHECK-GI-FP16-NEXT: mov v17.d[1], x14
3900 ; CHECK-GI-FP16-NEXT: fcvtzs x14, h6
3901 ; CHECK-GI-FP16-NEXT: fmov d4, x11
3902 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x10
3903 ; CHECK-GI-FP16-NEXT: fcvtzs x10, h0
3904 ; CHECK-GI-FP16-NEXT: stp q18, q7, [x8]
3905 ; CHECK-GI-FP16-NEXT: fmov d0, x9
3906 ; CHECK-GI-FP16-NEXT: fmov d1, x12
3907 ; CHECK-GI-FP16-NEXT: stp q16, q19, [x8, #224]
3908 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x15
3909 ; CHECK-GI-FP16-NEXT: stp q3, q17, [x8, #160]
3910 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x13
3911 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x14
3912 ; CHECK-GI-FP16-NEXT: mov v4.d[1], x10
3913 ; CHECK-GI-FP16-NEXT: stp q0, q2, [x8, #96]
3914 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #32]
3915 ; CHECK-GI-FP16-NEXT: ret
3916 entry:
3917 %c = fptosi <32 x half> %a to <32 x i64>
3918 ret <32 x i64> %c
3919 }
3921 define <32 x i64> @fptou_v32f16_v32i64(<32 x half> %a) {
3922 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i64:
3923 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3924 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
3925 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
3926 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
3927 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
3928 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
3929 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
3930 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
3931 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
3932 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
3933 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
3934 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
3935 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
3936 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
3937 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
3938 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
3939 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
3940 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s21
3941 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
3942 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
3943 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
3944 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
3945 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
3946 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
3947 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
3948 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
3949 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
3950 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s24
3951 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
3952 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
3953 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
3954 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
3955 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
3956 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s22
3957 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
3958 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
3959 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
3960 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s17
3961 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
3962 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
3963 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
3964 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
3965 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
3966 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
3967 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
3968 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
3969 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
3970 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s21
3971 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
3972 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
3973 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s22
3974 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s27
3975 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
3976 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
3977 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
3978 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
3979 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
3980 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3981 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
3982 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s24
3983 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
3984 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
3985 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
3986 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
3987 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
3988 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s21
3989 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
3990 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
3991 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
3992 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
3993 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
3994 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
3995 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s1
3996 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
3997 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
3998 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
3999 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
4000 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
4001 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
4002 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
4003 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
4004 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
4005 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
4006 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
4007 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4008 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4009 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
4010 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
4011 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4012 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
4013 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
4014 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s20
4015 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
4016 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4017 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
4018 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
4019 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
4020 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
4021 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
4022 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4023 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
4024 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
4025 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
4026 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s6
4027 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
4028 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
4029 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s5
4030 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
4031 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
4032 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s22
4033 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
4034 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
4035 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
4036 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
4037 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s24
4038 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
4039 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
4040 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
4041 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
4042 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
4043 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
4044 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
4045 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
4046 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
4047 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
4048 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
4049 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
4050 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
4051 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4052 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
4053 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
4054 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
4055 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
4056 ; CHECK-SD-NOFP16-NEXT: ret
4057 ;
4058 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i64:
4059 ; CHECK-SD-FP16: // %bb.0: // %entry
4060 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
4061 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
4062 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
4063 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
4064 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
4065 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
4066 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
4067 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h3
4068 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
4069 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
4070 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
4071 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
4072 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
4073 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
4074 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
4075 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h5
4076 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h16
4077 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h6
4078 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
4079 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
4080 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h17
4081 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h18
4082 ; CHECK-SD-FP16-NEXT: fmov d18, x9
4083 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h22
4084 ; CHECK-SD-FP16-NEXT: fmov d3, x10
4085 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h23
4086 ; CHECK-SD-FP16-NEXT: fmov d22, x12
4087 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h25
4088 ; CHECK-SD-FP16-NEXT: fmov d23, x15
4089 ; CHECK-SD-FP16-NEXT: fmov d16, x11
4090 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
4091 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
4092 ; CHECK-SD-FP16-NEXT: fmov d2, x13
4093 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h24
4094 ; CHECK-SD-FP16-NEXT: fmov d17, x14
4095 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
4096 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
4097 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
4098 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
4099 ; CHECK-SD-FP16-NEXT: fmov d19, x9
4100 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h26
4101 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
4102 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
4103 ; CHECK-SD-FP16-NEXT: fmov d21, x11
4104 ; CHECK-SD-FP16-NEXT: fmov d1, x13
4105 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h7
4106 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
4107 ; CHECK-SD-FP16-NEXT: fmov d7, x14
4108 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
4109 ; CHECK-SD-FP16-NEXT: fmov d22, x10
4110 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
4111 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
4112 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
4113 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h20
4114 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
4115 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
4116 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
4117 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
4118 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
4119 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h24
4120 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
4121 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
4122 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
4123 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
4124 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
4125 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h0
4126 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
4127 ; CHECK-SD-FP16-NEXT: fmov d7, x9
4128 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h23
4129 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
4130 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
4131 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h6
4132 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
4133 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h5
4134 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
4135 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
4136 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
4137 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
4138 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
4139 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h4
4140 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
4141 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
4142 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
4143 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h22
4144 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
4145 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
4146 ; CHECK-SD-FP16-NEXT: fmov d4, x11
4147 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
4148 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h0
4149 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
4150 ; CHECK-SD-FP16-NEXT: fmov d0, x9
4151 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4152 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
4153 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
4154 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
4155 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
4156 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
4157 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
4158 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
4159 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
4160 ; CHECK-SD-FP16-NEXT: ret
4161 ;
4162 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i64:
4163 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4164 ; CHECK-GI-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
4165 ; CHECK-GI-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
4166 ; CHECK-GI-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
4167 ; CHECK-GI-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
4168 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h1
4169 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h2
4170 ; CHECK-GI-NOFP16-NEXT: mov h26, v2.h[2]
4171 ; CHECK-GI-NOFP16-NEXT: fcvt s19, h0
4172 ; CHECK-GI-NOFP16-NEXT: mov h27, v3.h[2]
4173 ; CHECK-GI-NOFP16-NEXT: mov h20, v2.h[1]
4174 ; CHECK-GI-NOFP16-NEXT: mov h18, v1.h[1]
4175 ; CHECK-GI-NOFP16-NEXT: mov h16, v4.h[2]
4176 ; CHECK-GI-NOFP16-NEXT: mov h17, v5.h[2]
4177 ; CHECK-GI-NOFP16-NEXT: fcvt s23, h5
4178 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h6
4179 ; CHECK-GI-NOFP16-NEXT: mov h25, v6.h[2]
4180 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s21
4181 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s22
4182 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h7
4183 ; CHECK-GI-NOFP16-NEXT: mov h21, v3.h[3]
4184 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s19
4185 ; CHECK-GI-NOFP16-NEXT: fcvt s27, h27
4186 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
4187 ; CHECK-GI-NOFP16-NEXT: fcvt s16, h16
4188 ; CHECK-GI-NOFP16-NEXT: fcvt s17, h17
4189 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s23
4190 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s24
4191 ; CHECK-GI-NOFP16-NEXT: fcvt s23, h25
4192 ; CHECK-GI-NOFP16-NEXT: fcvt s25, h26
4193 ; CHECK-GI-NOFP16-NEXT: mov h26, v3.h[1]
4194 ; CHECK-GI-NOFP16-NEXT: mov h24, v2.h[3]
4195 ; CHECK-GI-NOFP16-NEXT: fmov d19, x9
4196 ; CHECK-GI-NOFP16-NEXT: fcvtzu x9, s22
4197 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h3
4198 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h21
4199 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s16
4200 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s17
4201 ; CHECK-GI-NOFP16-NEXT: fmov d2, x12
4202 ; CHECK-GI-NOFP16-NEXT: fmov d16, x13
4203 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s23
4204 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s25
4205 ; CHECK-GI-NOFP16-NEXT: mov h23, v1.h[2]
4206 ; CHECK-GI-NOFP16-NEXT: fcvt s25, h26
4207 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h24
4208 ; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[3]
4209 ; CHECK-GI-NOFP16-NEXT: fmov d26, x11
4210 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s21
4211 ; CHECK-GI-NOFP16-NEXT: fmov d3, x14
4212 ; CHECK-GI-NOFP16-NEXT: fmov d17, x15
4213 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s22
4214 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s27
4215 ; CHECK-GI-NOFP16-NEXT: mov h22, v0.h[2]
4216 ; CHECK-GI-NOFP16-NEXT: fcvt s18, h18
4217 ; CHECK-GI-NOFP16-NEXT: fcvt s21, h23
4218 ; CHECK-GI-NOFP16-NEXT: fmov d23, x13
4219 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s25
4220 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
4221 ; CHECK-GI-NOFP16-NEXT: fmov d25, x14
4222 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s24
4223 ; CHECK-GI-NOFP16-NEXT: fmov d24, x15
4224 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h22
4225 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s18
4226 ; CHECK-GI-NOFP16-NEXT: mov h18, v7.h[1]
4227 ; CHECK-GI-NOFP16-NEXT: mov v25.d[1], x13
4228 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s21
4229 ; CHECK-GI-NOFP16-NEXT: mov h21, v7.h[2]
4230 ; CHECK-GI-NOFP16-NEXT: mov v24.d[1], x11
4231 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s20
4232 ; CHECK-GI-NOFP16-NEXT: mov h20, v0.h[1]
4233 ; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[3]
4234 ; CHECK-GI-NOFP16-NEXT: mov v23.d[1], x14
4235 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s1
4236 ; CHECK-GI-NOFP16-NEXT: mov h1, v6.h[3]
4237 ; CHECK-GI-NOFP16-NEXT: mov h6, v6.h[1]
4238 ; CHECK-GI-NOFP16-NEXT: mov v19.d[1], x15
4239 ; CHECK-GI-NOFP16-NEXT: mov h7, v7.h[3]
4240 ; CHECK-GI-NOFP16-NEXT: stp q25, q24, [x8, #192]
4241 ; CHECK-GI-NOFP16-NEXT: fmov d24, x13
4242 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
4243 ; CHECK-GI-NOFP16-NEXT: mov v26.d[1], x11
4244 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s22
4245 ; CHECK-GI-NOFP16-NEXT: mov h22, v5.h[1]
4246 ; CHECK-GI-NOFP16-NEXT: mov h5, v5.h[3]
4247 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
4248 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
4249 ; CHECK-GI-NOFP16-NEXT: mov v24.d[1], x14
4250 ; CHECK-GI-NOFP16-NEXT: mov h25, v4.h[3]
4251 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h6
4252 ; CHECK-GI-NOFP16-NEXT: stp q26, q23, [x8, #128]
4253 ; CHECK-GI-NOFP16-NEXT: fmov d23, x12
4254 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s20
4255 ; CHECK-GI-NOFP16-NEXT: mov h20, v4.h[1]
4256 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h5
4257 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s0
4258 ; CHECK-GI-NOFP16-NEXT: stp q19, q24, [x8, #64]
4259 ; CHECK-GI-NOFP16-NEXT: fcvt s22, h22
4260 ; CHECK-GI-NOFP16-NEXT: fmov d0, x10
4261 ; CHECK-GI-NOFP16-NEXT: fmov d19, x11
4262 ; CHECK-GI-NOFP16-NEXT: fcvt s4, h4
4263 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s1
4264 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h21
4265 ; CHECK-GI-NOFP16-NEXT: fcvt s24, h25
4266 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s6
4267 ; CHECK-GI-NOFP16-NEXT: fcvt s20, h20
4268 ; CHECK-GI-NOFP16-NEXT: fcvt s6, h7
4269 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s5
4270 ; CHECK-GI-NOFP16-NEXT: mov v19.d[1], x13
4271 ; CHECK-GI-NOFP16-NEXT: fcvt s5, h18
4272 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s22
4273 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x12
4274 ; CHECK-GI-NOFP16-NEXT: fcvtzu x12, s4
4275 ; CHECK-GI-NOFP16-NEXT: mov v23.d[1], x10
4276 ; CHECK-GI-NOFP16-NEXT: fcvtzu x10, s1
4277 ; CHECK-GI-NOFP16-NEXT: fcvtzu x15, s24
4278 ; CHECK-GI-NOFP16-NEXT: mov v16.d[1], x11
4279 ; CHECK-GI-NOFP16-NEXT: fcvtzu x11, s20
4280 ; CHECK-GI-NOFP16-NEXT: mov v17.d[1], x14
4281 ; CHECK-GI-NOFP16-NEXT: fcvtzu x14, s6
4282 ; CHECK-GI-NOFP16-NEXT: mov v2.d[1], x13
4283 ; CHECK-GI-NOFP16-NEXT: fcvtzu x13, s5
4284 ; CHECK-GI-NOFP16-NEXT: fmov d4, x9
4285 ; CHECK-GI-NOFP16-NEXT: stp q0, q19, [x8]
4286 ; CHECK-GI-NOFP16-NEXT: fmov d0, x12
4287 ; CHECK-GI-NOFP16-NEXT: stp q16, q23, [x8, #224]
4288 ; CHECK-GI-NOFP16-NEXT: fmov d1, x10
4289 ; CHECK-GI-NOFP16-NEXT: mov v3.d[1], x15
4290 ; CHECK-GI-NOFP16-NEXT: stp q2, q17, [x8, #160]
4291 ; CHECK-GI-NOFP16-NEXT: mov v0.d[1], x11
4292 ; CHECK-GI-NOFP16-NEXT: mov v4.d[1], x13
4293 ; CHECK-GI-NOFP16-NEXT: mov v1.d[1], x14
4294 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #96]
4295 ; CHECK-GI-NOFP16-NEXT: stp q4, q1, [x8, #32]
4296 ; CHECK-GI-NOFP16-NEXT: ret
4297 ;
4298 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i64:
4299 ; CHECK-GI-FP16: // %bb.0: // %entry
4300 ; CHECK-GI-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
4301 ; CHECK-GI-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
4302 ; CHECK-GI-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
4303 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
4304 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h0
4305 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[3]
4306 ; CHECK-GI-FP16-NEXT: mov h25, v3.h[1]
4307 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h3
4308 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[2]
4309 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[2]
4310 ; CHECK-GI-FP16-NEXT: mov h21, v2.h[1]
4311 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[3]
4312 ; CHECK-GI-FP16-NEXT: mov h17, v4.h[2]
4313 ; CHECK-GI-FP16-NEXT: mov h18, v5.h[2]
4314 ; CHECK-GI-FP16-NEXT: mov h22, v6.h[2]
4315 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h5
4316 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h16
4317 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h6
4318 ; CHECK-GI-FP16-NEXT: mov h7, v1.h[1]
4319 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[3]
4320 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h17
4321 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h18
4322 ; CHECK-GI-FP16-NEXT: fmov d18, x9
4323 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h22
4324 ; CHECK-GI-FP16-NEXT: fmov d3, x10
4325 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h23
4326 ; CHECK-GI-FP16-NEXT: fmov d22, x12
4327 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h25
4328 ; CHECK-GI-FP16-NEXT: fmov d23, x15
4329 ; CHECK-GI-FP16-NEXT: fmov d16, x11
4330 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h2
4331 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h21
4332 ; CHECK-GI-FP16-NEXT: fmov d2, x13
4333 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h24
4334 ; CHECK-GI-FP16-NEXT: fmov d17, x14
4335 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h19
4336 ; CHECK-GI-FP16-NEXT: mov v22.d[1], x10
4337 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h1
4338 ; CHECK-GI-FP16-NEXT: mov v23.d[1], x12
4339 ; CHECK-GI-FP16-NEXT: fmov d19, x9
4340 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h26
4341 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h20
4342 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[2]
4343 ; CHECK-GI-FP16-NEXT: fmov d21, x11
4344 ; CHECK-GI-FP16-NEXT: fmov d1, x13
4345 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h7
4346 ; CHECK-GI-FP16-NEXT: mov h24, v0.h[3]
4347 ; CHECK-GI-FP16-NEXT: fmov d7, x14
4348 ; CHECK-GI-FP16-NEXT: stp q23, q22, [x8, #192]
4349 ; CHECK-GI-FP16-NEXT: fmov d22, x10
4350 ; CHECK-GI-FP16-NEXT: mov v21.d[1], x15
4351 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x9
4352 ; CHECK-GI-FP16-NEXT: mov h23, v0.h[1]
4353 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h20
4354 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x12
4355 ; CHECK-GI-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
4356 ; CHECK-GI-FP16-NEXT: mov h20, v6.h[3]
4357 ; CHECK-GI-FP16-NEXT: mov v22.d[1], x13
4358 ; CHECK-GI-FP16-NEXT: mov h6, v6.h[1]
4359 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h24
4360 ; CHECK-GI-FP16-NEXT: stp q21, q1, [x8, #128]
4361 ; CHECK-GI-FP16-NEXT: mov h1, v5.h[1]
4362 ; CHECK-GI-FP16-NEXT: mov h5, v5.h[3]
4363 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h20
4364 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[2]
4365 ; CHECK-GI-FP16-NEXT: fcvtzu x11, h0
4366 ; CHECK-GI-FP16-NEXT: stp q22, q7, [x8, #64]
4367 ; CHECK-GI-FP16-NEXT: fmov d7, x9
4368 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h23
4369 ; CHECK-GI-FP16-NEXT: mov h21, v4.h[3]
4370 ; CHECK-GI-FP16-NEXT: mov h22, v4.h[1]
4371 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h6
4372 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
4373 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h5
4374 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[1]
4375 ; CHECK-GI-FP16-NEXT: mov v7.d[1], x10
4376 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h1
4377 ; CHECK-GI-FP16-NEXT: mov v19.d[1], x12
4378 ; CHECK-GI-FP16-NEXT: mov v18.d[1], x9
4379 ; CHECK-GI-FP16-NEXT: fcvtzu x9, h4
4380 ; CHECK-GI-FP16-NEXT: fcvtzu x12, h20
4381 ; CHECK-GI-FP16-NEXT: fcvtzu x15, h21
4382 ; CHECK-GI-FP16-NEXT: mov v16.d[1], x13
4383 ; CHECK-GI-FP16-NEXT: fcvtzu x13, h22
4384 ; CHECK-GI-FP16-NEXT: mov v17.d[1], x14
4385 ; CHECK-GI-FP16-NEXT: fcvtzu x14, h6
4386 ; CHECK-GI-FP16-NEXT: fmov d4, x11
4387 ; CHECK-GI-FP16-NEXT: mov v3.d[1], x10
4388 ; CHECK-GI-FP16-NEXT: fcvtzu x10, h0
4389 ; CHECK-GI-FP16-NEXT: stp q18, q7, [x8]
4390 ; CHECK-GI-FP16-NEXT: fmov d0, x9
4391 ; CHECK-GI-FP16-NEXT: fmov d1, x12
4392 ; CHECK-GI-FP16-NEXT: stp q16, q19, [x8, #224]
4393 ; CHECK-GI-FP16-NEXT: mov v2.d[1], x15
4394 ; CHECK-GI-FP16-NEXT: stp q3, q17, [x8, #160]
4395 ; CHECK-GI-FP16-NEXT: mov v0.d[1], x13
4396 ; CHECK-GI-FP16-NEXT: mov v1.d[1], x14
4397 ; CHECK-GI-FP16-NEXT: mov v4.d[1], x10
4398 ; CHECK-GI-FP16-NEXT: stp q0, q2, [x8, #96]
4399 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #32]
4400 ; CHECK-GI-FP16-NEXT: ret
4401 entry:
4402 %c = fptoui <32 x half> %a to <32 x i64>
4403 ret <32 x i64> %c
4404 }
4406 define <2 x i32> @fptos_v2f16_v2i32(<2 x half> %a) {
4407 ; CHECK-LABEL: fptos_v2f16_v2i32:
4408 ; CHECK: // %bb.0: // %entry
4409 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4410 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4411 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
4412 ; CHECK-NEXT: ret
4413 entry:
4414 %c = fptosi <2 x half> %a to <2 x i32>
4415 ret <2 x i32> %c
4416 }
4418 define <2 x i32> @fptou_v2f16_v2i32(<2 x half> %a) {
4419 ; CHECK-LABEL: fptou_v2f16_v2i32:
4420 ; CHECK: // %bb.0: // %entry
4421 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4422 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
4423 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
4424 ; CHECK-NEXT: ret
4425 entry:
4426 %c = fptoui <2 x half> %a to <2 x i32>
4427 ret <2 x i32> %c
4428 }
4430 define <3 x i32> @fptos_v3f16_v3i32(<3 x half> %a) {
4431 ; CHECK-LABEL: fptos_v3f16_v3i32:
4432 ; CHECK: // %bb.0: // %entry
4433 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4434 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4435 ; CHECK-NEXT: ret
4436 entry:
4437 %c = fptosi <3 x half> %a to <3 x i32>
4438 ret <3 x i32> %c
4439 }
4441 define <3 x i32> @fptou_v3f16_v3i32(<3 x half> %a) {
4442 ; CHECK-LABEL: fptou_v3f16_v3i32:
4443 ; CHECK: // %bb.0: // %entry
4444 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4445 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
4446 ; CHECK-NEXT: ret
4447 entry:
4448 %c = fptoui <3 x half> %a to <3 x i32>
4449 ret <3 x i32> %c
4450 }
4452 define <4 x i32> @fptos_v4f16_v4i32(<4 x half> %a) {
4453 ; CHECK-LABEL: fptos_v4f16_v4i32:
4454 ; CHECK: // %bb.0: // %entry
4455 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4456 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4457 ; CHECK-NEXT: ret
4458 entry:
4459 %c = fptosi <4 x half> %a to <4 x i32>
4460 ret <4 x i32> %c
4461 }
4463 define <4 x i32> @fptou_v4f16_v4i32(<4 x half> %a) {
4464 ; CHECK-LABEL: fptou_v4f16_v4i32:
4465 ; CHECK: // %bb.0: // %entry
4466 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4467 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
4468 ; CHECK-NEXT: ret
4469 entry:
4470 %c = fptoui <4 x half> %a to <4 x i32>
4471 ret <4 x i32> %c
4472 }
4474 define <8 x i32> @fptos_v8f16_v8i32(<8 x half> %a) {
4475 ; CHECK-LABEL: fptos_v8f16_v8i32:
4476 ; CHECK: // %bb.0: // %entry
4477 ; CHECK-NEXT: fcvtl2 v1.4s, v0.8h
4478 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4479 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
4480 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4481 ; CHECK-NEXT: ret
4482 entry:
4483 %c = fptosi <8 x half> %a to <8 x i32>
4484 ret <8 x i32> %c
4485 }
4487 define <8 x i32> @fptou_v8f16_v8i32(<8 x half> %a) {
4488 ; CHECK-LABEL: fptou_v8f16_v8i32:
4489 ; CHECK: // %bb.0: // %entry
4490 ; CHECK-NEXT: fcvtl2 v1.4s, v0.8h
4491 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4492 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
4493 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
4494 ; CHECK-NEXT: ret
4495 entry:
4496 %c = fptoui <8 x half> %a to <8 x i32>
4497 ret <8 x i32> %c
4498 }
4500 define <16 x i32> @fptos_v16f16_v16i32(<16 x half> %a) {
4501 ; CHECK-LABEL: fptos_v16f16_v16i32:
4502 ; CHECK: // %bb.0: // %entry
4503 ; CHECK-NEXT: fcvtl v2.4s, v0.4h
4504 ; CHECK-NEXT: fcvtl2 v3.4s, v0.8h
4505 ; CHECK-NEXT: fcvtl2 v4.4s, v1.8h
4506 ; CHECK-NEXT: fcvtl v5.4s, v1.4h
4507 ; CHECK-NEXT: fcvtzs v0.4s, v2.4s
4508 ; CHECK-NEXT: fcvtzs v1.4s, v3.4s
4509 ; CHECK-NEXT: fcvtzs v3.4s, v4.4s
4510 ; CHECK-NEXT: fcvtzs v2.4s, v5.4s
4511 ; CHECK-NEXT: ret
4512 entry:
4513 %c = fptosi <16 x half> %a to <16 x i32>
4514 ret <16 x i32> %c
4515 }
4517 define <16 x i32> @fptou_v16f16_v16i32(<16 x half> %a) {
4518 ; CHECK-LABEL: fptou_v16f16_v16i32:
4519 ; CHECK: // %bb.0: // %entry
4520 ; CHECK-NEXT: fcvtl v2.4s, v0.4h
4521 ; CHECK-NEXT: fcvtl2 v3.4s, v0.8h
4522 ; CHECK-NEXT: fcvtl2 v4.4s, v1.8h
4523 ; CHECK-NEXT: fcvtl v5.4s, v1.4h
4524 ; CHECK-NEXT: fcvtzu v0.4s, v2.4s
4525 ; CHECK-NEXT: fcvtzu v1.4s, v3.4s
4526 ; CHECK-NEXT: fcvtzu v3.4s, v4.4s
4527 ; CHECK-NEXT: fcvtzu v2.4s, v5.4s
4528 ; CHECK-NEXT: ret
4529 entry:
4530 %c = fptoui <16 x half> %a to <16 x i32>
4531 ret <16 x i32> %c
4532 }
4534 define <32 x i32> @fptos_v32f16_v32i32(<32 x half> %a) {
4535 ; CHECK-LABEL: fptos_v32f16_v32i32:
4536 ; CHECK: // %bb.0: // %entry
4537 ; CHECK-NEXT: fcvtl2 v4.4s, v0.8h
4538 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4539 ; CHECK-NEXT: fcvtl2 v5.4s, v1.8h
4540 ; CHECK-NEXT: fcvtl v6.4s, v1.4h
4541 ; CHECK-NEXT: fcvtl v7.4s, v2.4h
4542 ; CHECK-NEXT: fcvtl2 v16.4s, v2.8h
4543 ; CHECK-NEXT: fcvtl2 v17.4s, v3.8h
4544 ; CHECK-NEXT: fcvtl v18.4s, v3.4h
4545 ; CHECK-NEXT: fcvtzs v1.4s, v4.4s
4546 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4547 ; CHECK-NEXT: fcvtzs v3.4s, v5.4s
4548 ; CHECK-NEXT: fcvtzs v2.4s, v6.4s
4549 ; CHECK-NEXT: fcvtzs v4.4s, v7.4s
4550 ; CHECK-NEXT: fcvtzs v5.4s, v16.4s
4551 ; CHECK-NEXT: fcvtzs v7.4s, v17.4s
4552 ; CHECK-NEXT: fcvtzs v6.4s, v18.4s
4553 ; CHECK-NEXT: ret
4554 entry:
4555 %c = fptosi <32 x half> %a to <32 x i32>
4556 ret <32 x i32> %c
4557 }
4559 define <32 x i32> @fptou_v32f16_v32i32(<32 x half> %a) {
4560 ; CHECK-LABEL: fptou_v32f16_v32i32:
4561 ; CHECK: // %bb.0: // %entry
4562 ; CHECK-NEXT: fcvtl2 v4.4s, v0.8h
4563 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4564 ; CHECK-NEXT: fcvtl2 v5.4s, v1.8h
4565 ; CHECK-NEXT: fcvtl v6.4s, v1.4h
4566 ; CHECK-NEXT: fcvtl v7.4s, v2.4h
4567 ; CHECK-NEXT: fcvtl2 v16.4s, v2.8h
4568 ; CHECK-NEXT: fcvtl2 v17.4s, v3.8h
4569 ; CHECK-NEXT: fcvtl v18.4s, v3.4h
4570 ; CHECK-NEXT: fcvtzu v1.4s, v4.4s
4571 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
4572 ; CHECK-NEXT: fcvtzu v3.4s, v5.4s
4573 ; CHECK-NEXT: fcvtzu v2.4s, v6.4s
4574 ; CHECK-NEXT: fcvtzu v4.4s, v7.4s
4575 ; CHECK-NEXT: fcvtzu v5.4s, v16.4s
4576 ; CHECK-NEXT: fcvtzu v7.4s, v17.4s
4577 ; CHECK-NEXT: fcvtzu v6.4s, v18.4s
4578 ; CHECK-NEXT: ret
4579 entry:
4580 %c = fptoui <32 x half> %a to <32 x i32>
4581 ret <32 x i32> %c
4582 }
4584 define <2 x i16> @fptos_v2f16_v2i16(<2 x half> %a) {
4585 ; CHECK-LABEL: fptos_v2f16_v2i16:
4586 ; CHECK: // %bb.0: // %entry
4587 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4588 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4589 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
4590 ; CHECK-NEXT: ret
4591 entry:
4592 %c = fptosi <2 x half> %a to <2 x i16>
4593 ret <2 x i16> %c
4594 }
4596 define <2 x i16> @fptou_v2f16_v2i16(<2 x half> %a) {
4597 ; CHECK-LABEL: fptou_v2f16_v2i16:
4598 ; CHECK: // %bb.0: // %entry
4599 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
4600 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
4601 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
4602 ; CHECK-NEXT: ret
4603 entry:
4604 %c = fptoui <2 x half> %a to <2 x i16>
4605 ret <2 x i16> %c
4606 }
4608 define <3 x i16> @fptos_v3f16_v3i16(<3 x half> %a) {
4609 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i16:
4610 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4611 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4612 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4613 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
4614 ; CHECK-SD-NOFP16-NEXT: ret
4615 ;
4616 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i16:
4617 ; CHECK-SD-FP16: // %bb.0: // %entry
4618 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
4619 ; CHECK-SD-FP16-NEXT: ret
4620 ;
4621 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i16:
4622 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4623 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4624 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4625 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
4626 ; CHECK-GI-NOFP16-NEXT: ret
4627 ;
4628 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i16:
4629 ; CHECK-GI-FP16: // %bb.0: // %entry
4630 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
4631 ; CHECK-GI-FP16-NEXT: ret
4632 entry:
4633 %c = fptosi <3 x half> %a to <3 x i16>
4634 ret <3 x i16> %c
4635 }
4637 define <3 x i16> @fptou_v3f16_v3i16(<3 x half> %a) {
4638 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i16:
4639 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4640 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4641 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4642 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
4643 ; CHECK-SD-NOFP16-NEXT: ret
4644 ;
4645 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i16:
4646 ; CHECK-SD-FP16: // %bb.0: // %entry
4647 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
4648 ; CHECK-SD-FP16-NEXT: ret
4649 ;
4650 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i16:
4651 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4652 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4653 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4654 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
4655 ; CHECK-GI-NOFP16-NEXT: ret
4656 ;
4657 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i16:
4658 ; CHECK-GI-FP16: // %bb.0: // %entry
4659 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
4660 ; CHECK-GI-FP16-NEXT: ret
4661 entry:
4662 %c = fptoui <3 x half> %a to <3 x i16>
4663 ret <3 x i16> %c
4664 }
4666 define <4 x i16> @fptos_v4f16_v4i16(<4 x half> %a) {
4667 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i16:
4668 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4669 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4670 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4671 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
4672 ; CHECK-SD-NOFP16-NEXT: ret
4673 ;
4674 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i16:
4675 ; CHECK-SD-FP16: // %bb.0: // %entry
4676 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
4677 ; CHECK-SD-FP16-NEXT: ret
4678 ;
4679 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i16:
4680 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4681 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4682 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4683 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
4684 ; CHECK-GI-NOFP16-NEXT: ret
4685 ;
4686 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i16:
4687 ; CHECK-GI-FP16: // %bb.0: // %entry
4688 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
4689 ; CHECK-GI-FP16-NEXT: ret
4690 entry:
4691 %c = fptosi <4 x half> %a to <4 x i16>
4692 ret <4 x i16> %c
4693 }
4695 define <4 x i16> @fptou_v4f16_v4i16(<4 x half> %a) {
4696 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i16:
4697 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4698 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4699 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4700 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
4701 ; CHECK-SD-NOFP16-NEXT: ret
4702 ;
4703 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i16:
4704 ; CHECK-SD-FP16: // %bb.0: // %entry
4705 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
4706 ; CHECK-SD-FP16-NEXT: ret
4707 ;
4708 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i16:
4709 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4710 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4711 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4712 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
4713 ; CHECK-GI-NOFP16-NEXT: ret
4714 ;
4715 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i16:
4716 ; CHECK-GI-FP16: // %bb.0: // %entry
4717 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
4718 ; CHECK-GI-FP16-NEXT: ret
4719 entry:
4720 %c = fptoui <4 x half> %a to <4 x i16>
4721 ret <4 x i16> %c
4722 }
4724 define <8 x i16> @fptos_v8f16_v8i16(<8 x half> %a) {
4725 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i16:
4726 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4727 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
4728 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4729 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4730 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4731 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
4732 ; CHECK-SD-NOFP16-NEXT: ret
4733 ;
4734 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i16:
4735 ; CHECK-SD-FP16: // %bb.0: // %entry
4736 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
4737 ; CHECK-SD-FP16-NEXT: ret
4738 ;
4739 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i16:
4740 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4741 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
4742 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4743 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4744 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4745 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
4746 ; CHECK-GI-NOFP16-NEXT: ret
4747 ;
4748 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i16:
4749 ; CHECK-GI-FP16: // %bb.0: // %entry
4750 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
4751 ; CHECK-GI-FP16-NEXT: ret
4752 entry:
4753 %c = fptosi <8 x half> %a to <8 x i16>
4754 ret <8 x i16> %c
4755 }
4757 define <8 x i16> @fptou_v8f16_v8i16(<8 x half> %a) {
4758 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i16:
4759 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4760 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
4761 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4762 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4763 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4764 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
4765 ; CHECK-SD-NOFP16-NEXT: ret
4766 ;
4767 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i16:
4768 ; CHECK-SD-FP16: // %bb.0: // %entry
4769 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
4770 ; CHECK-SD-FP16-NEXT: ret
4771 ;
4772 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i16:
4773 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4774 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
4775 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4776 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4777 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4778 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
4779 ; CHECK-GI-NOFP16-NEXT: ret
4780 ;
4781 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i16:
4782 ; CHECK-GI-FP16: // %bb.0: // %entry
4783 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
4784 ; CHECK-GI-FP16-NEXT: ret
4785 entry:
4786 %c = fptoui <8 x half> %a to <8 x i16>
4787 ret <8 x i16> %c
4788 }
4790 define <16 x i16> @fptos_v16f16_v16i16(<16 x half> %a) {
4791 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i16:
4792 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4793 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
4794 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4795 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
4796 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4797 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
4798 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4799 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
4800 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4801 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
4802 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
4803 ; CHECK-SD-NOFP16-NEXT: ret
4804 ;
4805 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i16:
4806 ; CHECK-SD-FP16: // %bb.0: // %entry
4807 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
4808 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
4809 ; CHECK-SD-FP16-NEXT: ret
4810 ;
4811 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i16:
4812 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4813 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
4814 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4815 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
4816 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4817 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
4818 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4819 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
4820 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4821 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
4822 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
4823 ; CHECK-GI-NOFP16-NEXT: ret
4824 ;
4825 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i16:
4826 ; CHECK-GI-FP16: // %bb.0: // %entry
4827 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
4828 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
4829 ; CHECK-GI-FP16-NEXT: ret
4830 entry:
4831 %c = fptosi <16 x half> %a to <16 x i16>
4832 ret <16 x i16> %c
4833 }
4835 define <16 x i16> @fptou_v16f16_v16i16(<16 x half> %a) {
4836 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i16:
4837 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4838 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
4839 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4840 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
4841 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4842 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
4843 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4844 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
4845 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4846 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
4847 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
4848 ; CHECK-SD-NOFP16-NEXT: ret
4849 ;
4850 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i16:
4851 ; CHECK-SD-FP16: // %bb.0: // %entry
4852 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
4853 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
4854 ; CHECK-SD-FP16-NEXT: ret
4855 ;
4856 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i16:
4857 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4858 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
4859 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4860 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
4861 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4862 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
4863 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4864 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
4865 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4866 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
4867 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
4868 ; CHECK-GI-NOFP16-NEXT: ret
4869 ;
4870 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i16:
4871 ; CHECK-GI-FP16: // %bb.0: // %entry
4872 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
4873 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
4874 ; CHECK-GI-FP16-NEXT: ret
4875 entry:
4876 %c = fptoui <16 x half> %a to <16 x i16>
4877 ret <16 x i16> %c
4878 }
4880 define <32 x i16> @fptos_v32f16_v32i16(<32 x half> %a) {
4881 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i16:
4882 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4883 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
4884 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4885 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
4886 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4887 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
4888 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
4889 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
4890 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
4891 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
4892 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4893 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
4894 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4895 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
4896 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
4897 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
4898 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
4899 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
4900 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
4901 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
4902 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
4903 ; CHECK-SD-NOFP16-NEXT: ret
4904 ;
4905 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i16:
4906 ; CHECK-SD-FP16: // %bb.0: // %entry
4907 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
4908 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
4909 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
4910 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
4911 ; CHECK-SD-FP16-NEXT: ret
4912 ;
4913 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i16:
4914 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4915 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
4916 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4917 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
4918 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4919 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
4920 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
4921 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
4922 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v3.4h
4923 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
4924 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
4925 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
4926 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
4927 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
4928 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
4929 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
4930 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
4931 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
4932 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
4933 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
4934 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
4935 ; CHECK-GI-NOFP16-NEXT: ret
4936 ;
4937 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i16:
4938 ; CHECK-GI-FP16: // %bb.0: // %entry
4939 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
4940 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
4941 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
4942 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
4943 ; CHECK-GI-FP16-NEXT: ret
4944 entry:
4945 %c = fptosi <32 x half> %a to <32 x i16>
4946 ret <32 x i16> %c
4947 }
4949 define <32 x i16> @fptou_v32f16_v32i16(<32 x half> %a) {
4950 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i16:
4951 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4952 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
4953 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4954 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
4955 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4956 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
4957 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
4958 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
4959 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
4960 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
4961 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4962 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
4963 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4964 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
4965 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
4966 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
4967 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
4968 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
4969 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
4970 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
4971 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
4972 ; CHECK-SD-NOFP16-NEXT: ret
4973 ;
4974 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i16:
4975 ; CHECK-SD-FP16: // %bb.0: // %entry
4976 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
4977 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
4978 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
4979 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
4980 ; CHECK-SD-FP16-NEXT: ret
4981 ;
4982 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i16:
4983 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4984 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
4985 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4986 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
4987 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
4988 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
4989 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
4990 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
4991 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v3.4h
4992 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
4993 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
4994 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
4995 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
4996 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
4997 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
4998 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
4999 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
5000 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
5001 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
5002 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
5003 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
5004 ; CHECK-GI-NOFP16-NEXT: ret
5005 ;
5006 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i16:
5007 ; CHECK-GI-FP16: // %bb.0: // %entry
5008 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
5009 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
5010 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
5011 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
5012 ; CHECK-GI-FP16-NEXT: ret
5013 entry:
5014 %c = fptoui <32 x half> %a to <32 x i16>
5015 ret <32 x i16> %c
5016 }
5018 define <2 x i8> @fptos_v2f16_v2i8(<2 x half> %a) {
5019 ; CHECK-LABEL: fptos_v2f16_v2i8:
5020 ; CHECK: // %bb.0: // %entry
5021 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5022 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5023 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
5024 ; CHECK-NEXT: ret
5025 entry:
5026 %c = fptosi <2 x half> %a to <2 x i8>
5027 ret <2 x i8> %c
5028 }
5030 define <2 x i8> @fptou_v2f16_v2i8(<2 x half> %a) {
5031 ; CHECK-LABEL: fptou_v2f16_v2i8:
5032 ; CHECK: // %bb.0: // %entry
5033 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5034 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5035 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
5036 ; CHECK-NEXT: ret
5037 entry:
5038 %c = fptoui <2 x half> %a to <2 x i8>
5039 ret <2 x i8> %c
5040 }
5042 define <3 x i8> @fptos_v3f16_v3i8(<3 x half> %a) {
5043 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i8:
5044 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5045 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5046 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5047 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
5048 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
5049 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
5050 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
5051 ; CHECK-SD-NOFP16-NEXT: ret
5052 ;
5053 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i8:
5054 ; CHECK-SD-FP16: // %bb.0: // %entry
5055 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
5056 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
5057 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
5058 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
5059 ; CHECK-SD-FP16-NEXT: ret
5060 ;
5061 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i8:
5062 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5063 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5064 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5065 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
5066 ; CHECK-GI-NOFP16-NEXT: umov w0, v0.h[0]
5067 ; CHECK-GI-NOFP16-NEXT: umov w1, v0.h[1]
5068 ; CHECK-GI-NOFP16-NEXT: umov w2, v0.h[2]
5069 ; CHECK-GI-NOFP16-NEXT: ret
5070 ;
5071 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i8:
5072 ; CHECK-GI-FP16: // %bb.0: // %entry
5073 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
5074 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
5075 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
5076 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
5077 ; CHECK-GI-FP16-NEXT: ret
5078 entry:
5079 %c = fptosi <3 x half> %a to <3 x i8>
5080 ret <3 x i8> %c
5081 }
5083 define <3 x i8> @fptou_v3f16_v3i8(<3 x half> %a) {
5084 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i8:
5085 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5086 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5087 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5088 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
5089 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
5090 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
5091 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
5092 ; CHECK-SD-NOFP16-NEXT: ret
5093 ;
5094 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i8:
5095 ; CHECK-SD-FP16: // %bb.0: // %entry
5096 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
5097 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
5098 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
5099 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
5100 ; CHECK-SD-FP16-NEXT: ret
5101 ;
5102 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i8:
5103 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5104 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5105 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5106 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
5107 ; CHECK-GI-NOFP16-NEXT: umov w0, v0.h[0]
5108 ; CHECK-GI-NOFP16-NEXT: umov w1, v0.h[1]
5109 ; CHECK-GI-NOFP16-NEXT: umov w2, v0.h[2]
5110 ; CHECK-GI-NOFP16-NEXT: ret
5111 ;
5112 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i8:
5113 ; CHECK-GI-FP16: // %bb.0: // %entry
5114 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
5115 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
5116 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
5117 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
5118 ; CHECK-GI-FP16-NEXT: ret
5119 entry:
5120 %c = fptoui <3 x half> %a to <3 x i8>
5121 ret <3 x i8> %c
5122 }
5124 define <4 x i8> @fptos_v4f16_v4i8(<4 x half> %a) {
5125 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i8:
5126 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5127 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5128 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5129 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
5130 ; CHECK-SD-NOFP16-NEXT: ret
5131 ;
5132 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i8:
5133 ; CHECK-SD-FP16: // %bb.0: // %entry
5134 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
5135 ; CHECK-SD-FP16-NEXT: ret
5136 ;
5137 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i8:
5138 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5139 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5140 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5141 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
5142 ; CHECK-GI-NOFP16-NEXT: ret
5143 ;
5144 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i8:
5145 ; CHECK-GI-FP16: // %bb.0: // %entry
5146 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
5147 ; CHECK-GI-FP16-NEXT: ret
5148 entry:
5149 %c = fptosi <4 x half> %a to <4 x i8>
5150 ret <4 x i8> %c
5151 }
5153 define <4 x i8> @fptou_v4f16_v4i8(<4 x half> %a) {
5154 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i8:
5155 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5156 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5157 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5158 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
5159 ; CHECK-SD-NOFP16-NEXT: ret
5160 ;
5161 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i8:
5162 ; CHECK-SD-FP16: // %bb.0: // %entry
5163 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
5164 ; CHECK-SD-FP16-NEXT: ret
5165 ;
5166 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i8:
5167 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5168 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5169 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5170 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
5171 ; CHECK-GI-NOFP16-NEXT: ret
5172 ;
5173 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i8:
5174 ; CHECK-GI-FP16: // %bb.0: // %entry
5175 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
5176 ; CHECK-GI-FP16-NEXT: ret
5177 entry:
5178 %c = fptoui <4 x half> %a to <4 x i8>
5179 ret <4 x i8> %c
5180 }
5182 define <8 x i8> @fptos_v8f16_v8i8(<8 x half> %a) {
5183 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i8:
5184 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5185 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
5186 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5187 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5188 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5189 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
5190 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
5191 ; CHECK-SD-NOFP16-NEXT: ret
5192 ;
5193 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i8:
5194 ; CHECK-SD-FP16: // %bb.0: // %entry
5195 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
5196 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
5197 ; CHECK-SD-FP16-NEXT: ret
5198 ;
5199 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i8:
5200 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5201 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
5202 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5203 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5204 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5205 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
5206 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
5207 ; CHECK-GI-NOFP16-NEXT: ret
5208 ;
5209 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i8:
5210 ; CHECK-GI-FP16: // %bb.0: // %entry
5211 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
5212 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
5213 ; CHECK-GI-FP16-NEXT: ret
5214 entry:
5215 %c = fptosi <8 x half> %a to <8 x i8>
5216 ret <8 x i8> %c
5217 }
5219 define <8 x i8> @fptou_v8f16_v8i8(<8 x half> %a) {
5220 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i8:
5221 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5222 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
5223 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5224 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5225 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5226 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
5227 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
5228 ; CHECK-SD-NOFP16-NEXT: ret
5229 ;
5230 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i8:
5231 ; CHECK-SD-FP16: // %bb.0: // %entry
5232 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
5233 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
5234 ; CHECK-SD-FP16-NEXT: ret
5235 ;
5236 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i8:
5237 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5238 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
5239 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5240 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5241 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5242 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
5243 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
5244 ; CHECK-GI-NOFP16-NEXT: ret
5245 ;
5246 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i8:
5247 ; CHECK-GI-FP16: // %bb.0: // %entry
5248 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
5249 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
5250 ; CHECK-GI-FP16-NEXT: ret
5251 entry:
5252 %c = fptoui <8 x half> %a to <8 x i8>
5253 ret <8 x i8> %c
5254 }
5256 define <16 x i8> @fptos_v16f16_v16i8(<16 x half> %a) {
5257 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i8:
5258 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5259 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
5260 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5261 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
5262 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5263 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
5264 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5265 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
5266 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5267 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
5268 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
5269 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5270 ; CHECK-SD-NOFP16-NEXT: ret
5271 ;
5272 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i8:
5273 ; CHECK-SD-FP16: // %bb.0: // %entry
5274 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
5275 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
5276 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5277 ; CHECK-SD-FP16-NEXT: ret
5278 ;
5279 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i8:
5280 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5281 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
5282 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5283 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
5284 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5285 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
5286 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5287 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
5288 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5289 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
5290 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
5291 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5292 ; CHECK-GI-NOFP16-NEXT: ret
5293 ;
5294 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i8:
5295 ; CHECK-GI-FP16: // %bb.0: // %entry
5296 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
5297 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
5298 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5299 ; CHECK-GI-FP16-NEXT: ret
5300 entry:
5301 %c = fptosi <16 x half> %a to <16 x i8>
5302 ret <16 x i8> %c
5303 }
5305 define <16 x i8> @fptou_v16f16_v16i8(<16 x half> %a) {
5306 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i8:
5307 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5308 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
5309 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5310 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
5311 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5312 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
5313 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5314 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
5315 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5316 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
5317 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
5318 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5319 ; CHECK-SD-NOFP16-NEXT: ret
5320 ;
5321 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i8:
5322 ; CHECK-SD-FP16: // %bb.0: // %entry
5323 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
5324 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
5325 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5326 ; CHECK-SD-FP16-NEXT: ret
5327 ;
5328 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i8:
5329 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5330 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
5331 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5332 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
5333 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5334 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
5335 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5336 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
5337 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5338 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
5339 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
5340 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5341 ; CHECK-GI-NOFP16-NEXT: ret
5342 ;
5343 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i8:
5344 ; CHECK-GI-FP16: // %bb.0: // %entry
5345 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
5346 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
5347 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5348 ; CHECK-GI-FP16-NEXT: ret
5349 entry:
5350 %c = fptoui <16 x half> %a to <16 x i8>
5351 ret <16 x i8> %c
5352 }
5354 define <32 x i8> @fptos_v32f16_v32i8(<32 x half> %a) {
5355 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i8:
5356 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5357 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
5358 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5359 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
5360 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5361 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
5362 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
5363 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
5364 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
5365 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
5366 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5367 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
5368 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5369 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
5370 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
5371 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
5372 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
5373 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
5374 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
5375 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
5376 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
5377 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5378 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5379 ; CHECK-SD-NOFP16-NEXT: ret
5380 ;
5381 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i8:
5382 ; CHECK-SD-FP16: // %bb.0: // %entry
5383 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
5384 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
5385 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
5386 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
5387 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5388 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5389 ; CHECK-SD-FP16-NEXT: ret
5390 ;
5391 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i8:
5392 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5393 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
5394 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5395 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
5396 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5397 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
5398 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v3.4h
5399 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
5400 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
5401 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
5402 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
5403 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
5404 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
5405 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
5406 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
5407 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
5408 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
5409 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
5410 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
5411 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
5412 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
5413 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5414 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5415 ; CHECK-GI-NOFP16-NEXT: ret
5416 ;
5417 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i8:
5418 ; CHECK-GI-FP16: // %bb.0: // %entry
5419 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
5420 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
5421 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
5422 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
5423 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5424 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5425 ; CHECK-GI-FP16-NEXT: ret
5426 entry:
5427 %c = fptosi <32 x half> %a to <32 x i8>
5428 ret <32 x i8> %c
5429 }
5431 define <32 x i8> @fptou_v32f16_v32i8(<32 x half> %a) {
5432 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i8:
5433 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5434 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
5435 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5436 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
5437 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5438 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
5439 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
5440 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
5441 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
5442 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
5443 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5444 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
5445 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5446 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
5447 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
5448 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
5449 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
5450 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
5451 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
5452 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
5453 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
5454 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5455 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5456 ; CHECK-SD-NOFP16-NEXT: ret
5457 ;
5458 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i8:
5459 ; CHECK-SD-FP16: // %bb.0: // %entry
5460 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
5461 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
5462 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
5463 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
5464 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5465 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5466 ; CHECK-SD-FP16-NEXT: ret
5467 ;
5468 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i8:
5469 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5470 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
5471 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
5472 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
5473 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5474 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
5475 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v3.4h
5476 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
5477 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
5478 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
5479 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
5480 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
5481 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
5482 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
5483 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
5484 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
5485 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
5486 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
5487 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
5488 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
5489 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
5490 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5491 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5492 ; CHECK-GI-NOFP16-NEXT: ret
5493 ;
5494 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i8:
5495 ; CHECK-GI-FP16: // %bb.0: // %entry
5496 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
5497 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
5498 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
5499 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
5500 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
5501 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
5502 ; CHECK-GI-FP16-NEXT: ret
5503 entry:
5504 %c = fptoui <32 x half> %a to <32 x i8>
5505 ret <32 x i8> %c
5506 }