| blob | dd72c2b2bd01094bc1e234093e7b37049563b73a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mattr=+sve -force-streaming-compatible-sve < %s | FileCheck %s
3 ; RUN: llc -mattr=+sme -force-streaming-compatible-sve < %s | FileCheck %s
5 target triple = "aarch64-unknown-linux-gnu"
7 define void @bitcast_v4i8(ptr %a, ptr %b) {
8 ; CHECK-LABEL: bitcast_v4i8:
9 ; CHECK: // %bb.0:
10 ; CHECK-NEXT: ptrue p0.h, vl4
11 ; CHECK-NEXT: ld1b { z0.h }, p0/z, [x0]
12 ; CHECK-NEXT: st1b { z0.h }, p0, [x1]
13 ; CHECK-NEXT: ret
14 %load = load volatile <4 x i8>, ptr %a
15 %cast = bitcast <4 x i8> %load to <4 x i8>
16 store volatile <4 x i8> %cast, ptr %b
17 ret void
18 }
20 define void @bitcast_v8i8(ptr %a, ptr %b) {
21 ; CHECK-LABEL: bitcast_v8i8:
22 ; CHECK: // %bb.0:
23 ; CHECK-NEXT: ldr d0, [x0]
24 ; CHECK-NEXT: str d0, [x1]
25 ; CHECK-NEXT: ret
26 %load = load volatile <8 x i8>, ptr %a
27 %cast = bitcast <8 x i8> %load to <8 x i8>
28 store volatile <8 x i8> %cast, ptr %b
29 ret void
30 }
32 define void @bitcast_v16i8(ptr %a, ptr %b) {
33 ; CHECK-LABEL: bitcast_v16i8:
34 ; CHECK: // %bb.0:
35 ; CHECK-NEXT: ldr q0, [x0]
36 ; CHECK-NEXT: str q0, [x1]
37 ; CHECK-NEXT: ret
38 %load = load volatile <16 x i8>, ptr %a
39 %cast = bitcast <16 x i8> %load to <16 x i8>
40 store volatile <16 x i8> %cast, ptr %b
41 ret void
42 }
44 define void @bitcast_v32i8(ptr %a, ptr %b) {
45 ; CHECK-LABEL: bitcast_v32i8:
46 ; CHECK: // %bb.0:
47 ; CHECK-NEXT: ldr q0, [x0]
48 ; CHECK-NEXT: ldr q1, [x0, #16]
49 ; CHECK-NEXT: str q1, [x1, #16]
50 ; CHECK-NEXT: str q0, [x1]
51 ; CHECK-NEXT: ret
52 %load = load volatile <32 x i8>, ptr %a
53 %cast = bitcast <32 x i8> %load to <32 x i8>
54 store volatile <32 x i8> %cast, ptr %b
55 ret void
56 }
58 define void @bitcast_v2i16(ptr %a, ptr %b) {
59 ; CHECK-LABEL: bitcast_v2i16:
60 ; CHECK: // %bb.0:
61 ; CHECK-NEXT: sub sp, sp, #16
62 ; CHECK-NEXT: .cfi_def_cfa_offset 16
63 ; CHECK-NEXT: ldrh w8, [x0, #2]
64 ; CHECK-NEXT: str w8, [sp, #4]
65 ; CHECK-NEXT: ldrh w8, [x0]
66 ; CHECK-NEXT: str w8, [sp]
67 ; CHECK-NEXT: ldr d0, [sp]
68 ; CHECK-NEXT: mov z1.s, z0.s[1]
69 ; CHECK-NEXT: fmov w8, s0
70 ; CHECK-NEXT: strh w8, [sp, #8]
71 ; CHECK-NEXT: fmov w8, s1
72 ; CHECK-NEXT: strh w8, [sp, #10]
73 ; CHECK-NEXT: ldr d0, [sp, #8]
74 ; CHECK-NEXT: fmov w8, s0
75 ; CHECK-NEXT: str w8, [x1]
76 ; CHECK-NEXT: add sp, sp, #16
77 ; CHECK-NEXT: ret
78 %load = load volatile <2 x i16>, ptr %a
79 %cast = bitcast <2 x i16> %load to <2 x half>
80 store volatile <2 x half> %cast, ptr %b
81 ret void
82 }
84 define void @bitcast_v4i16(ptr %a, ptr %b) {
85 ; CHECK-LABEL: bitcast_v4i16:
86 ; CHECK: // %bb.0:
87 ; CHECK-NEXT: ldr d0, [x0]
88 ; CHECK-NEXT: str d0, [x1]
89 ; CHECK-NEXT: ret
90 %load = load volatile <4 x i16>, ptr %a
91 %cast = bitcast <4 x i16> %load to <4 x half>
92 store volatile <4 x half> %cast, ptr %b
93 ret void
94 }
96 define void @bitcast_v8i16(ptr %a, ptr %b) {
97 ; CHECK-LABEL: bitcast_v8i16:
98 ; CHECK: // %bb.0:
99 ; CHECK-NEXT: ldr q0, [x0]
100 ; CHECK-NEXT: str q0, [x1]
101 ; CHECK-NEXT: ret
102 %load = load volatile <8 x i16>, ptr %a
103 %cast = bitcast <8 x i16> %load to <8 x half>
104 store volatile <8 x half> %cast, ptr %b
105 ret void
106 }
108 define void @bitcast_v16i16(ptr %a, ptr %b) {
109 ; CHECK-LABEL: bitcast_v16i16:
110 ; CHECK: // %bb.0:
111 ; CHECK-NEXT: ldr q0, [x0]
112 ; CHECK-NEXT: ldr q1, [x0, #16]
113 ; CHECK-NEXT: str q1, [x1, #16]
114 ; CHECK-NEXT: str q0, [x1]
115 ; CHECK-NEXT: ret
116 %load = load volatile <16 x i16>, ptr %a
117 %cast = bitcast <16 x i16> %load to <16 x half>
118 store volatile <16 x half> %cast, ptr %b
119 ret void
120 }
122 define void @bitcast_v2i32(ptr %a, ptr %b) {
123 ; CHECK-LABEL: bitcast_v2i32:
124 ; CHECK: // %bb.0:
125 ; CHECK-NEXT: ldr d0, [x0]
126 ; CHECK-NEXT: str d0, [x1]
127 ; CHECK-NEXT: ret
128 %load = load volatile <2 x i32>, ptr %a
129 %cast = bitcast <2 x i32> %load to <2 x float>
130 store volatile <2 x float> %cast, ptr %b
131 ret void
132 }
134 define void @bitcast_v4i32(ptr %a, ptr %b) {
135 ; CHECK-LABEL: bitcast_v4i32:
136 ; CHECK: // %bb.0:
137 ; CHECK-NEXT: ldr q0, [x0]
138 ; CHECK-NEXT: str q0, [x1]
139 ; CHECK-NEXT: ret
140 %load = load volatile <4 x i32>, ptr %a
141 %cast = bitcast <4 x i32> %load to <4 x float>
142 store volatile <4 x float> %cast, ptr %b
143 ret void
144 }
146 define void @bitcast_v8i32(ptr %a, ptr %b) {
147 ; CHECK-LABEL: bitcast_v8i32:
148 ; CHECK: // %bb.0:
149 ; CHECK-NEXT: ldr q0, [x0]
150 ; CHECK-NEXT: ldr q1, [x0, #16]
151 ; CHECK-NEXT: str q1, [x1, #16]
152 ; CHECK-NEXT: str q0, [x1]
153 ; CHECK-NEXT: ret
154 %load = load volatile <8 x i32>, ptr %a
155 %cast = bitcast <8 x i32> %load to <8 x float>
156 store volatile <8 x float> %cast, ptr %b
157 ret void
158 }
160 define void @bitcast_v1i64(ptr %a, ptr %b) {
161 ; CHECK-LABEL: bitcast_v1i64:
162 ; CHECK: // %bb.0:
163 ; CHECK-NEXT: ldr d0, [x0]
164 ; CHECK-NEXT: str d0, [x1]
165 ; CHECK-NEXT: ret
166 %load = load volatile <1 x i64>, ptr %a
167 %cast = bitcast <1 x i64> %load to <1 x double>
168 store volatile <1 x double> %cast, ptr %b
169 ret void
170 }
172 define void @bitcast_v2i64(ptr %a, ptr %b) {
173 ; CHECK-LABEL: bitcast_v2i64:
174 ; CHECK: // %bb.0:
175 ; CHECK-NEXT: ldr q0, [x0]
176 ; CHECK-NEXT: str q0, [x1]
177 ; CHECK-NEXT: ret
178 %load = load volatile <2 x i64>, ptr %a
179 %cast = bitcast <2 x i64> %load to <2 x double>
180 store volatile <2 x double> %cast, ptr %b
181 ret void
182 }
184 define void @bitcast_v4i64(ptr %a, ptr %b) {
185 ; CHECK-LABEL: bitcast_v4i64:
186 ; CHECK: // %bb.0:
187 ; CHECK-NEXT: ldr q0, [x0]
188 ; CHECK-NEXT: ldr q1, [x0, #16]
189 ; CHECK-NEXT: str q1, [x1, #16]
190 ; CHECK-NEXT: str q0, [x1]
191 ; CHECK-NEXT: ret
192 %load = load volatile <4 x i64>, ptr %a
193 %cast = bitcast <4 x i64> %load to <4 x double>
194 store volatile <4 x double> %cast, ptr %b
195 ret void
196 }