| blob | 7beaf3103586375c1edacb32c5d7c064c86a3d56 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX11 %s
3 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GISEL-GFX10 %s
4 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX11 %s
5 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=DAGISEL-GFX10 %s
7 declare amdgpu_gfx void @use(...)
9 ; FIXME: The values of the counters are undefined on entry to amdgpu_cs_chain functions, so these waits are unnecessary.
11 define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) {
12 ; GISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack:
13 ; GISEL-GFX11: ; %bb.0:
14 ; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
15 ; GISEL-GFX11-NEXT: s_endpgm
16 ;
17 ; GISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack:
18 ; GISEL-GFX10: ; %bb.0:
19 ; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
20 ; GISEL-GFX10-NEXT: s_endpgm
21 ;
22 ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack:
23 ; DAGISEL-GFX11: ; %bb.0:
24 ; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
25 ; DAGISEL-GFX11-NEXT: s_endpgm
26 ;
27 ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_no_stack:
28 ; DAGISEL-GFX10: ; %bb.0:
29 ; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
30 ; DAGISEL-GFX10-NEXT: s_endpgm
31 ret void
32 }
34 define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr, <4 x i32> %vgpr) {
35 ; GISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
36 ; GISEL-GFX11: ; %bb.0:
37 ; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
38 ; GISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
39 ; GISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
40 ; GISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
41 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
42 ; GISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
43 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
44 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
45 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
46 ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
47 ; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
48 ; GISEL-GFX11-NEXT: s_endpgm
49 ;
50 ; GISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
51 ; GISEL-GFX10: ; %bb.0:
52 ; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
53 ; GISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
54 ; GISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
55 ; GISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
56 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
57 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
58 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
59 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
60 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
61 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0
62 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1
63 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2
64 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3
65 ; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
66 ; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
67 ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
68 ; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
69 ; GISEL-GFX10-NEXT: s_endpgm
70 ;
71 ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
72 ; DAGISEL-GFX11: ; %bb.0:
73 ; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
74 ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[4:5]
75 ; DAGISEL-GFX11-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
76 ; DAGISEL-GFX11-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
77 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v6, v10
78 ; DAGISEL-GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
79 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v4, v8
80 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
81 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
82 ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
83 ; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
84 ; DAGISEL-GFX11-NEXT: s_endpgm
85 ;
86 ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
87 ; DAGISEL-GFX10: ; %bb.0:
88 ; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
89 ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[4:5]
90 ; DAGISEL-GFX10-NEXT: s_add_u32 s4, s4, use@gotpcrel32@lo+4
91 ; DAGISEL-GFX10-NEXT: s_addc_u32 s5, s5, use@gotpcrel32@hi+12
92 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
93 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
94 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
95 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
96 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
97 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0
98 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1
99 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2
100 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3
101 ; DAGISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
102 ; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
103 ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
104 ; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
105 ; DAGISEL-GFX10-NEXT: s_endpgm
106 call amdgpu_gfx void @use(<4 x i32> %sgpr, <4 x i32> %vgpr)
107 ret void
108 }
110 ; FIXME: Setup s32.
112 define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24 x i32> %vgprs) {
113 ; GISEL-GFX11-LABEL: amdgpu_cs_chain_spill:
114 ; GISEL-GFX11: ; %bb.0:
115 ; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
116 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 4
117 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
118 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v17, s24
119 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 8
120 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 12
121 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v18, s24
122 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v19, s25
123 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 16
124 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 20
125 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v20, s24
126 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v21, s25
127 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 24
128 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 28
129 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v22, s24
130 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v23, s25
131 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 32
132 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 36
133 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
134 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v25, s25
135 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 40
136 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 44
137 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v26, s24
138 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v27, s25
139 ; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 48
140 ; GISEL-GFX11-NEXT: s_add_u32 s25, s32, 52
141 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v28, s24
142 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v29, s25
143 ; GISEL-GFX11-NEXT: s_getpc_b64 s[24:25]
144 ; GISEL-GFX11-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
145 ; GISEL-GFX11-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
146 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
147 ; GISEL-GFX11-NEXT: s_load_b64 s[24:25], s[24:25], 0x0
148 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v34, v10 :: v_dual_mov_b32 v35, v11
149 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v36, v12 :: v_dual_mov_b32 v37, v13
150 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v38, v14 :: v_dual_mov_b32 v39, v15
151 ; GISEL-GFX11-NEXT: s_add_u32 s26, s32, 56
152 ; GISEL-GFX11-NEXT: s_add_u32 s27, s32, 60
153 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v30, s26
154 ; GISEL-GFX11-NEXT: scratch_store_b32 off, v31, s27
155 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
156 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
157 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
158 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
159 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
160 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
161 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
162 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
163 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
164 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
165 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
166 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
167 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v24, v32 :: v_dual_mov_b32 v25, v33
168 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v26, v34 :: v_dual_mov_b32 v27, v35
169 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v28, v36 :: v_dual_mov_b32 v29, v37
170 ; GISEL-GFX11-NEXT: v_dual_mov_b32 v30, v38 :: v_dual_mov_b32 v31, v39
171 ; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
172 ; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25]
173 ; GISEL-GFX11-NEXT: s_endpgm
174 ;
175 ; GISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
176 ; GISEL-GFX10: ; %bb.0:
177 ; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
178 ; GISEL-GFX10-NEXT: s_getpc_b64 s[24:25]
179 ; GISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
180 ; GISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
181 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v32, v8
182 ; GISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0
183 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v33, v9
184 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v34, v10
185 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v35, v11
186 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v36, v12
187 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v37, v13
188 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v38, v14
189 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v39, v15
190 ; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
191 ; GISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
192 ; GISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
193 ; GISEL-GFX10-NEXT: buffer_store_dword v19, off, s[48:51], s32 offset:12
194 ; GISEL-GFX10-NEXT: buffer_store_dword v20, off, s[48:51], s32 offset:16
195 ; GISEL-GFX10-NEXT: buffer_store_dword v21, off, s[48:51], s32 offset:20
196 ; GISEL-GFX10-NEXT: buffer_store_dword v22, off, s[48:51], s32 offset:24
197 ; GISEL-GFX10-NEXT: buffer_store_dword v23, off, s[48:51], s32 offset:28
198 ; GISEL-GFX10-NEXT: buffer_store_dword v24, off, s[48:51], s32 offset:32
199 ; GISEL-GFX10-NEXT: buffer_store_dword v25, off, s[48:51], s32 offset:36
200 ; GISEL-GFX10-NEXT: buffer_store_dword v26, off, s[48:51], s32 offset:40
201 ; GISEL-GFX10-NEXT: buffer_store_dword v27, off, s[48:51], s32 offset:44
202 ; GISEL-GFX10-NEXT: buffer_store_dword v28, off, s[48:51], s32 offset:48
203 ; GISEL-GFX10-NEXT: buffer_store_dword v29, off, s[48:51], s32 offset:52
204 ; GISEL-GFX10-NEXT: buffer_store_dword v30, off, s[48:51], s32 offset:56
205 ; GISEL-GFX10-NEXT: buffer_store_dword v31, off, s[48:51], s32 offset:60
206 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0
207 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1
208 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2
209 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3
210 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, s4
211 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, s5
212 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, s6
213 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v7, s7
214 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v8, s8
215 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v9, s9
216 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v10, s10
217 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v11, s11
218 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v12, s12
219 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v13, s13
220 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v14, s14
221 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v15, s15
222 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v16, s16
223 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v17, s17
224 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v18, s18
225 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v19, s19
226 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v20, s20
227 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v21, s21
228 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v22, s22
229 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v23, s23
230 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v24, v32
231 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v25, v33
232 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v26, v34
233 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v27, v35
234 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v28, v36
235 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v29, v37
236 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v30, v38
237 ; GISEL-GFX10-NEXT: v_mov_b32_e32 v31, v39
238 ; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
239 ; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
240 ; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
241 ; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[24:25]
242 ; GISEL-GFX10-NEXT: s_endpgm
243 ;
244 ; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_spill:
245 ; DAGISEL-GFX11: ; %bb.0:
246 ; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
247 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 60
248 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
249 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v31, s24
250 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 56
251 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 52
252 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v30, s24
253 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v29, s25
254 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 48
255 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 44
256 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v28, s24
257 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v27, s25
258 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 40
259 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 36
260 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v26, s24
261 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v25, s25
262 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 32
263 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 28
264 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
265 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v23, s25
266 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 24
267 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 20
268 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v22, s24
269 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v21, s25
270 ; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 16
271 ; DAGISEL-GFX11-NEXT: s_add_i32 s25, s32, 12
272 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v20, s24
273 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v19, s25
274 ; DAGISEL-GFX11-NEXT: s_getpc_b64 s[24:25]
275 ; DAGISEL-GFX11-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
276 ; DAGISEL-GFX11-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
277 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
278 ; DAGISEL-GFX11-NEXT: s_load_b64 s[24:25], s[24:25], 0x0
279 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v34, v13 :: v_dual_mov_b32 v35, v12
280 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v36, v11 :: v_dual_mov_b32 v37, v10
281 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v38, v9 :: v_dual_mov_b32 v39, v8
282 ; DAGISEL-GFX11-NEXT: s_add_i32 s26, s32, 8
283 ; DAGISEL-GFX11-NEXT: s_add_i32 s27, s32, 4
284 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v18, s26
285 ; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v17, s27
286 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
287 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
288 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
289 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
290 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
291 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
292 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
293 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
294 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
295 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
296 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
297 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
298 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v24, v39 :: v_dual_mov_b32 v25, v38
299 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v26, v37 :: v_dual_mov_b32 v27, v36
300 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v28, v35 :: v_dual_mov_b32 v29, v34
301 ; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v30, v33 :: v_dual_mov_b32 v31, v32
302 ; DAGISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0)
303 ; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[24:25]
304 ; DAGISEL-GFX11-NEXT: s_endpgm
305 ;
306 ; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
307 ; DAGISEL-GFX10: ; %bb.0:
308 ; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
309 ; DAGISEL-GFX10-NEXT: s_getpc_b64 s[24:25]
310 ; DAGISEL-GFX10-NEXT: s_add_u32 s24, s24, use@gotpcrel32@lo+4
311 ; DAGISEL-GFX10-NEXT: s_addc_u32 s25, s25, use@gotpcrel32@hi+12
312 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v32, v15
313 ; DAGISEL-GFX10-NEXT: s_load_dwordx2 s[24:25], s[24:25], 0x0
314 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v33, v14
315 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v34, v13
316 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v35, v12
317 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v36, v11
318 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v37, v10
319 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v38, v9
320 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v39, v8
321 ; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
322 ; DAGISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
323 ; DAGISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
324 ; DAGISEL-GFX10-NEXT: buffer_store_dword v19, off, s[48:51], s32 offset:12
325 ; DAGISEL-GFX10-NEXT: buffer_store_dword v20, off, s[48:51], s32 offset:16
326 ; DAGISEL-GFX10-NEXT: buffer_store_dword v21, off, s[48:51], s32 offset:20
327 ; DAGISEL-GFX10-NEXT: buffer_store_dword v22, off, s[48:51], s32 offset:24
328 ; DAGISEL-GFX10-NEXT: buffer_store_dword v23, off, s[48:51], s32 offset:28
329 ; DAGISEL-GFX10-NEXT: buffer_store_dword v24, off, s[48:51], s32 offset:32
330 ; DAGISEL-GFX10-NEXT: buffer_store_dword v25, off, s[48:51], s32 offset:36
331 ; DAGISEL-GFX10-NEXT: buffer_store_dword v26, off, s[48:51], s32 offset:40
332 ; DAGISEL-GFX10-NEXT: buffer_store_dword v27, off, s[48:51], s32 offset:44
333 ; DAGISEL-GFX10-NEXT: buffer_store_dword v28, off, s[48:51], s32 offset:48
334 ; DAGISEL-GFX10-NEXT: buffer_store_dword v29, off, s[48:51], s32 offset:52
335 ; DAGISEL-GFX10-NEXT: buffer_store_dword v30, off, s[48:51], s32 offset:56
336 ; DAGISEL-GFX10-NEXT: buffer_store_dword v31, off, s[48:51], s32 offset:60
337 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, s0
338 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v1, s1
339 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v2, s2
340 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v3, s3
341 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v4, s4
342 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, s5
343 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, s6
344 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, s7
345 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v8, s8
346 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v9, s9
347 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v10, s10
348 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v11, s11
349 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v12, s12
350 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v13, s13
351 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v14, s14
352 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v15, s15
353 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v16, s16
354 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v17, s17
355 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v18, s18
356 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v19, s19
357 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v20, s20
358 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v21, s21
359 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v22, s22
360 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v23, s23
361 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v24, v39
362 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v25, v38
363 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v26, v37
364 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v27, v36
365 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v28, v35
366 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v29, v34
367 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v30, v33
368 ; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v31, v32
369 ; DAGISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
370 ; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
371 ; DAGISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0)
372 ; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[24:25]
373 ; DAGISEL-GFX10-NEXT: s_endpgm
374 call amdgpu_gfx void @use(<24 x i32> %sgprs, <24 x i32> %vgprs)
375 ret void
376 }