1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3 ; GCN-LABEL: {{^}}test_bitcast_return_type_noinline:
5 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@lo+4
6 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@hi+12
8 define amdgpu_kernel void @test_bitcast_return_type_noinline() #0 {
9 %val = call float @ret_i32_noinline()
10 %op = fadd float %val, 1.0
11 store volatile float %op, ptr addrspace(1) undef
15 ; GCN-LABEL: {{^}}test_bitcast_return_type_alwaysinline:
17 define amdgpu_kernel void @test_bitcast_return_type_alwaysinline() #0 {
18 %val = call float @ret_i32_alwaysinline()
19 %op = fadd float %val, 1.0
20 store volatile float %op, ptr addrspace(1) undef
24 ; GCN-LABEL: {{^}}test_bitcast_argument_type:
26 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
27 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
29 define amdgpu_kernel void @test_bitcast_argument_type() #0 {
30 %val = call i32 @ident_i32(float 2.0)
32 store volatile i32 %op, ptr addrspace(1) undef
36 ; GCN-LABEL: {{^}}test_bitcast_argument_and_return_types:
38 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
39 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
41 define amdgpu_kernel void @test_bitcast_argument_and_return_types() #0 {
42 %val = call float @ident_i32(float 2.0)
43 %op = fadd float %val, 1.0
44 store volatile float %op, ptr addrspace(1) undef
48 ; GCN-LABEL: {{^}}use_workitem_id_x:
50 ; GCN-NEXT: v_and_b32_e32 [[TMP:v[0-9]+]], 0x3ff, v31
51 ; GCN-NEXT: v_add_i32_e32 v0, vcc, [[TMP]], v0
52 ; GCN-NEXT: s_setpc_b64
53 define hidden i32 @use_workitem_id_x(i32 %arg0) #0 {
54 %id = call i32 @llvm.amdgcn.workitem.id.x()
55 %op = add i32 %id, %arg0
59 ; GCN-LABEL: {{^}}test_bitcast_use_workitem_id_x:
60 ; GCN: v_mov_b32_e32 v31, v0
62 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, use_workitem_id_x@rel32@lo+4
63 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, use_workitem_id_x@rel32@hi+12
64 ; GCN: v_mov_b32_e32 v0, 9
67 define amdgpu_kernel void @test_bitcast_use_workitem_id_x() #0 {
68 %val = call float @use_workitem_id_x(i32 9)
69 %op = fadd float %val, 1.0
70 store volatile float %op, ptr addrspace(1) undef
74 ; GCN-LABEL: {{^}}test_invoke:
76 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
77 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
79 @_ZTIi = external global ptr
80 declare i32 @__gxx_personality_v0(...)
81 define amdgpu_kernel void @test_invoke() #0 personality ptr @__gxx_personality_v0 {
82 %val = invoke float @ident_i32(float 2.0)
83 to label %continue unwind label %broken
86 landingpad { ptr, i32 } catch ptr @_ZTIi
90 %op = fadd float %val, 1.0
91 store volatile float %op, ptr addrspace(1) undef
95 ; Callees appears last in source file to test that we still lower their
96 ; arguments before we lower any calls to them.
98 define hidden i32 @ret_i32_noinline() #0 {
102 define hidden i32 @ret_i32_alwaysinline() #1 {
106 define hidden i32 @ident_i32(i32 %i) #0 {
110 declare i32 @llvm.amdgcn.workitem.id.x() #2
112 attributes #0 = { nounwind noinline }
113 attributes #1 = { alwaysinline nounwind }
114 attributes #2 = { nounwind readnone speculatable }